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Tom Rini83d290c2018-05-06 17:58:06 -04001# SPDX-License-Identifier: GPL-2.0+
wdenkc6097192002-11-03 00:24:07 +00002#
Wolfgang Denkeca3aeb2013-06-21 10:22:36 +02003# (C) Copyright 2000 - 2013
wdenkc6097192002-11-03 00:24:07 +00004# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
wdenkc6097192002-11-03 00:24:07 +00005
6Summary:
7========
8
wdenk24ee89b2002-11-03 17:56:27 +00009This directory contains the source code for U-Boot, a boot loader for
wdenke86e5a02004-10-17 21:12:06 +000010Embedded boards based on PowerPC, ARM, MIPS and several other
11processors, which can be installed in a boot ROM and used to
12initialize and test the hardware or to download and run application
13code.
wdenkc6097192002-11-03 00:24:07 +000014
15The development of U-Boot is closely related to Linux: some parts of
wdenk24ee89b2002-11-03 17:56:27 +000016the source code originate in the Linux source tree, we have some
17header files in common, and special provision has been made to
wdenkc6097192002-11-03 00:24:07 +000018support booting of Linux images.
19
20Some attention has been paid to make this software easily
21configurable and extendable. For instance, all monitor commands are
22implemented with the same call interface, so that it's very easy to
23add new commands. Also, instead of permanently adding rarely used
24code (for instance hardware test utilities) to the monitor, you can
25load and run it dynamically.
26
27
28Status:
29=======
30
31In general, all boards for which a configuration option exists in the
wdenk24ee89b2002-11-03 17:56:27 +000032Makefile have been tested to some extent and can be considered
wdenkc6097192002-11-03 00:24:07 +000033"working". In fact, many of them are used in production systems.
34
Robert P. J. Day7207b362015-12-19 07:16:10 -050035In case of problems see the CHANGELOG file to find out who contributed
36the specific port. In addition, there are various MAINTAINERS files
37scattered throughout the U-Boot source identifying the people or
38companies responsible for various boards and subsystems.
wdenkc6097192002-11-03 00:24:07 +000039
Robert P. J. Day7207b362015-12-19 07:16:10 -050040Note: As of August, 2010, there is no longer a CHANGELOG file in the
41actual U-Boot source tree; however, it can be created dynamically
42from the Git log using:
Robert P. J. Dayadb9d852012-11-14 02:03:20 +000043
44 make CHANGELOG
45
wdenkc6097192002-11-03 00:24:07 +000046
47Where to get help:
48==================
49
wdenk24ee89b2002-11-03 17:56:27 +000050In case you have questions about, problems with or contributions for
Robert P. J. Day7207b362015-12-19 07:16:10 -050051U-Boot, you should send a message to the U-Boot mailing list at
Peter Tyser0c325652008-09-10 09:18:34 -050052<u-boot@lists.denx.de>. There is also an archive of previous traffic
53on the mailing list - please search the archive before asking FAQ's.
54Please see http://lists.denx.de/pipermail/u-boot and
55http://dir.gmane.org/gmane.comp.boot-loaders.u-boot
wdenkc6097192002-11-03 00:24:07 +000056
57
Wolfgang Denk218ca722008-03-26 10:40:12 +010058Where to get source code:
59=========================
60
Robert P. J. Day7207b362015-12-19 07:16:10 -050061The U-Boot source code is maintained in the Git repository at
Wolfgang Denk218ca722008-03-26 10:40:12 +010062git://www.denx.de/git/u-boot.git ; you can browse it online at
63http://www.denx.de/cgi-bin/gitweb.cgi?p=u-boot.git;a=summary
64
65The "snapshot" links on this page allow you to download tarballs of
Marcel Ziswiler11ccc332008-07-09 08:17:15 +020066any version you might be interested in. Official releases are also
Wolfgang Denk218ca722008-03-26 10:40:12 +010067available for FTP download from the ftp://ftp.denx.de/pub/u-boot/
68directory.
69
Anatolij Gustschind4ee7112008-03-26 18:13:33 +010070Pre-built (and tested) images are available from
Wolfgang Denk218ca722008-03-26 10:40:12 +010071ftp://ftp.denx.de/pub/u-boot/images/
72
73
wdenkc6097192002-11-03 00:24:07 +000074Where we come from:
75===================
76
77- start from 8xxrom sources
wdenk24ee89b2002-11-03 17:56:27 +000078- create PPCBoot project (http://sourceforge.net/projects/ppcboot)
wdenkc6097192002-11-03 00:24:07 +000079- clean up code
80- make it easier to add custom boards
81- make it possible to add other [PowerPC] CPUs
82- extend functions, especially:
83 * Provide extended interface to Linux boot loader
84 * S-Record download
85 * network boot
Marcel Ziswiler11ccc332008-07-09 08:17:15 +020086 * PCMCIA / CompactFlash / ATA disk / SCSI ... boot
wdenk24ee89b2002-11-03 17:56:27 +000087- create ARMBoot project (http://sourceforge.net/projects/armboot)
wdenkc6097192002-11-03 00:24:07 +000088- add other CPU families (starting with ARM)
wdenk24ee89b2002-11-03 17:56:27 +000089- create U-Boot project (http://sourceforge.net/projects/u-boot)
Magnus Lilja0d28f342008-08-06 19:32:33 +020090- current project page: see http://www.denx.de/wiki/U-Boot
wdenk24ee89b2002-11-03 17:56:27 +000091
92
93Names and Spelling:
94===================
95
96The "official" name of this project is "Das U-Boot". The spelling
97"U-Boot" shall be used in all written text (documentation, comments
98in source files etc.). Example:
99
100 This is the README file for the U-Boot project.
101
102File names etc. shall be based on the string "u-boot". Examples:
103
104 include/asm-ppc/u-boot.h
105
106 #include <asm/u-boot.h>
107
108Variable names, preprocessor constants etc. shall be either based on
109the string "u_boot" or on "U_BOOT". Example:
110
111 U_BOOT_VERSION u_boot_logo
112 IH_OS_U_BOOT u_boot_hush_start
wdenkc6097192002-11-03 00:24:07 +0000113
114
wdenk93f19cc2002-12-17 17:55:09 +0000115Versioning:
116===========
117
Thomas Weber360d8832010-09-28 08:06:25 +0200118Starting with the release in October 2008, the names of the releases
119were changed from numerical release numbers without deeper meaning
120into a time stamp based numbering. Regular releases are identified by
121names consisting of the calendar year and month of the release date.
122Additional fields (if present) indicate release candidates or bug fix
123releases in "stable" maintenance trees.
wdenk93f19cc2002-12-17 17:55:09 +0000124
Thomas Weber360d8832010-09-28 08:06:25 +0200125Examples:
Wolfgang Denkc0f40852011-10-26 10:21:21 +0000126 U-Boot v2009.11 - Release November 2009
Thomas Weber360d8832010-09-28 08:06:25 +0200127 U-Boot v2009.11.1 - Release 1 in version November 2009 stable tree
Jelle van der Waa0de21ec2016-10-30 17:30:30 +0100128 U-Boot v2010.09-rc1 - Release candidate 1 for September 2010 release
wdenk93f19cc2002-12-17 17:55:09 +0000129
130
wdenkc6097192002-11-03 00:24:07 +0000131Directory Hierarchy:
132====================
133
Peter Tyser8d321b82010-04-12 22:28:21 -0500134/arch Architecture specific files
Masahiro Yamada6eae68e2014-03-07 18:02:02 +0900135 /arc Files generic to ARC architecture
Peter Tyser8d321b82010-04-12 22:28:21 -0500136 /arm Files generic to ARM architecture
Peter Tyser8d321b82010-04-12 22:28:21 -0500137 /m68k Files generic to m68k architecture
Peter Tyser8d321b82010-04-12 22:28:21 -0500138 /microblaze Files generic to microblaze architecture
Peter Tyser8d321b82010-04-12 22:28:21 -0500139 /mips Files generic to MIPS architecture
Macpaul Linafc1ce82011-10-19 20:41:11 +0000140 /nds32 Files generic to NDS32 architecture
Peter Tyser8d321b82010-04-12 22:28:21 -0500141 /nios2 Files generic to Altera NIOS2 architecture
Robert P. J. Day33c77312013-09-15 18:34:15 -0400142 /openrisc Files generic to OpenRISC architecture
Stefan Roesea47a12b2010-04-15 16:07:28 +0200143 /powerpc Files generic to PowerPC architecture
Rick Chen3fafced2017-12-26 13:55:59 +0800144 /riscv Files generic to RISC-V architecture
Robert P. J. Day7207b362015-12-19 07:16:10 -0500145 /sandbox Files generic to HW-independent "sandbox"
Peter Tyser8d321b82010-04-12 22:28:21 -0500146 /sh Files generic to SH architecture
Robert P. J. Day33c77312013-09-15 18:34:15 -0400147 /x86 Files generic to x86 architecture
Peter Tyser8d321b82010-04-12 22:28:21 -0500148/api Machine/arch independent API for external apps
149/board Board dependent files
Xu Ziyuan740f7e52016-08-26 19:54:49 +0800150/cmd U-Boot commands functions
Peter Tyser8d321b82010-04-12 22:28:21 -0500151/common Misc architecture independent functions
Robert P. J. Day7207b362015-12-19 07:16:10 -0500152/configs Board default configuration files
Peter Tyser8d321b82010-04-12 22:28:21 -0500153/disk Code for disk drive partition handling
154/doc Documentation (don't expect too much)
155/drivers Commonly used device drivers
Robert P. J. Day33c77312013-09-15 18:34:15 -0400156/dts Contains Makefile for building internal U-Boot fdt.
Peter Tyser8d321b82010-04-12 22:28:21 -0500157/examples Example code for standalone applications, etc.
158/fs Filesystem code (cramfs, ext2, jffs2, etc.)
159/include Header Files
Robert P. J. Day7207b362015-12-19 07:16:10 -0500160/lib Library routines generic to all architectures
161/Licenses Various license files
Peter Tyser8d321b82010-04-12 22:28:21 -0500162/net Networking code
163/post Power On Self Test
Robert P. J. Day7207b362015-12-19 07:16:10 -0500164/scripts Various build scripts and Makefiles
165/test Various unit test files
Peter Tyser8d321b82010-04-12 22:28:21 -0500166/tools Tools to build S-Record or U-Boot images, etc.
wdenkc6097192002-11-03 00:24:07 +0000167
wdenkc6097192002-11-03 00:24:07 +0000168Software Configuration:
169=======================
170
171Configuration is usually done using C preprocessor defines; the
172rationale behind that is to avoid dead code whenever possible.
173
174There are two classes of configuration variables:
175
176* Configuration _OPTIONS_:
177 These are selectable by the user and have names beginning with
178 "CONFIG_".
179
180* Configuration _SETTINGS_:
181 These depend on the hardware etc. and should not be meddled with if
182 you don't know what you're doing; they have names beginning with
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200183 "CONFIG_SYS_".
wdenkc6097192002-11-03 00:24:07 +0000184
Robert P. J. Day7207b362015-12-19 07:16:10 -0500185Previously, all configuration was done by hand, which involved creating
186symbolic links and editing configuration files manually. More recently,
187U-Boot has added the Kbuild infrastructure used by the Linux kernel,
188allowing you to use the "make menuconfig" command to configure your
189build.
wdenkc6097192002-11-03 00:24:07 +0000190
191
192Selection of Processor Architecture and Board Type:
193---------------------------------------------------
194
195For all supported boards there are ready-to-use default
Holger Freytherab584d62014-08-04 09:26:05 +0200196configurations available; just type "make <board_name>_defconfig".
wdenkc6097192002-11-03 00:24:07 +0000197
198Example: For a TQM823L module type:
199
200 cd u-boot
Holger Freytherab584d62014-08-04 09:26:05 +0200201 make TQM823L_defconfig
wdenkc6097192002-11-03 00:24:07 +0000202
Robert P. J. Day7207b362015-12-19 07:16:10 -0500203Note: If you're looking for the default configuration file for a board
204you're sure used to be there but is now missing, check the file
205doc/README.scrapyard for a list of no longer supported boards.
wdenkc6097192002-11-03 00:24:07 +0000206
Simon Glass75b3c3a2014-03-22 17:12:59 -0600207Sandbox Environment:
208--------------------
209
210U-Boot can be built natively to run on a Linux host using the 'sandbox'
211board. This allows feature development which is not board- or architecture-
212specific to be undertaken on a native platform. The sandbox is also used to
213run some of U-Boot's tests.
214
Jagannadha Sutradharudu Teki6b1978f2014-08-31 21:19:43 +0530215See board/sandbox/README.sandbox for more details.
Simon Glass75b3c3a2014-03-22 17:12:59 -0600216
217
Simon Glassdb910352015-03-03 08:03:00 -0700218Board Initialisation Flow:
219--------------------------
220
221This is the intended start-up flow for boards. This should apply for both
Robert P. J. Day7207b362015-12-19 07:16:10 -0500222SPL and U-Boot proper (i.e. they both follow the same rules).
Simon Glassdb910352015-03-03 08:03:00 -0700223
Robert P. J. Day7207b362015-12-19 07:16:10 -0500224Note: "SPL" stands for "Secondary Program Loader," which is explained in
225more detail later in this file.
226
227At present, SPL mostly uses a separate code path, but the function names
228and roles of each function are the same. Some boards or architectures
229may not conform to this. At least most ARM boards which use
230CONFIG_SPL_FRAMEWORK conform to this.
231
232Execution typically starts with an architecture-specific (and possibly
233CPU-specific) start.S file, such as:
234
235 - arch/arm/cpu/armv7/start.S
236 - arch/powerpc/cpu/mpc83xx/start.S
237 - arch/mips/cpu/start.S
238
239and so on. From there, three functions are called; the purpose and
240limitations of each of these functions are described below.
Simon Glassdb910352015-03-03 08:03:00 -0700241
242lowlevel_init():
243 - purpose: essential init to permit execution to reach board_init_f()
244 - no global_data or BSS
245 - there is no stack (ARMv7 may have one but it will soon be removed)
246 - must not set up SDRAM or use console
247 - must only do the bare minimum to allow execution to continue to
248 board_init_f()
249 - this is almost never needed
250 - return normally from this function
251
252board_init_f():
253 - purpose: set up the machine ready for running board_init_r():
254 i.e. SDRAM and serial UART
255 - global_data is available
256 - stack is in SRAM
257 - BSS is not available, so you cannot use global/static variables,
258 only stack variables and global_data
259
260 Non-SPL-specific notes:
261 - dram_init() is called to set up DRAM. If already done in SPL this
262 can do nothing
263
264 SPL-specific notes:
265 - you can override the entire board_init_f() function with your own
266 version as needed.
267 - preloader_console_init() can be called here in extremis
268 - should set up SDRAM, and anything needed to make the UART work
269 - these is no need to clear BSS, it will be done by crt0.S
270 - must return normally from this function (don't call board_init_r()
271 directly)
272
273Here the BSS is cleared. For SPL, if CONFIG_SPL_STACK_R is defined, then at
274this point the stack and global_data are relocated to below
275CONFIG_SPL_STACK_R_ADDR. For non-SPL, U-Boot is relocated to run at the top of
276memory.
277
278board_init_r():
279 - purpose: main execution, common code
280 - global_data is available
281 - SDRAM is available
282 - BSS is available, all static/global variables can be used
283 - execution eventually continues to main_loop()
284
285 Non-SPL-specific notes:
286 - U-Boot is relocated to the top of memory and is now running from
287 there.
288
289 SPL-specific notes:
290 - stack is optionally in SDRAM, if CONFIG_SPL_STACK_R is defined and
291 CONFIG_SPL_STACK_R_ADDR points into SDRAM
292 - preloader_console_init() can be called here - typically this is
Ley Foon Tan0680f1b2017-05-03 17:13:32 +0800293 done by selecting CONFIG_SPL_BOARD_INIT and then supplying a
Simon Glassdb910352015-03-03 08:03:00 -0700294 spl_board_init() function containing this call
295 - loads U-Boot or (in falcon mode) Linux
296
297
298
wdenkc6097192002-11-03 00:24:07 +0000299Configuration Options:
300----------------------
301
302Configuration depends on the combination of board and CPU type; all
303such information is kept in a configuration file
304"include/configs/<board_name>.h".
305
306Example: For a TQM823L module, all configuration settings are in
307"include/configs/TQM823L.h".
308
309
wdenk7f6c2cb2002-11-10 22:06:23 +0000310Many of the options are named exactly as the corresponding Linux
311kernel configuration options. The intention is to make it easier to
312build a config tool - later.
313
Ashish Kumar63b23162017-08-11 11:09:14 +0530314- ARM Platform Bus Type(CCI):
315 CoreLink Cache Coherent Interconnect (CCI) is ARM BUS which
316 provides full cache coherency between two clusters of multi-core
317 CPUs and I/O coherency for devices and I/O masters
318
319 CONFIG_SYS_FSL_HAS_CCI400
320
321 Defined For SoC that has cache coherent interconnect
322 CCN-400
wdenk7f6c2cb2002-11-10 22:06:23 +0000323
Ashish Kumarc055cee2017-08-18 10:54:36 +0530324 CONFIG_SYS_FSL_HAS_CCN504
325
326 Defined for SoC that has cache coherent interconnect CCN-504
327
wdenkc6097192002-11-03 00:24:07 +0000328The following options need to be configured:
329
Kim Phillips26281142007-08-10 13:28:25 -0500330- CPU Type: Define exactly one, e.g. CONFIG_MPC85XX.
wdenkc6097192002-11-03 00:24:07 +0000331
Kim Phillips26281142007-08-10 13:28:25 -0500332- Board Type: Define exactly one, e.g. CONFIG_MPC8540ADS.
Wolfgang Denk6ccec442006-10-24 14:42:37 +0200333
Kumar Gala66412c62011-02-18 05:40:54 -0600334- 85xx CPU Options:
York Sunffd06e02012-10-08 07:44:30 +0000335 CONFIG_SYS_PPC64
336
337 Specifies that the core is a 64-bit PowerPC implementation (implements
338 the "64" category of the Power ISA). This is necessary for ePAPR
339 compliance, among other possible reasons.
340
Kumar Gala66412c62011-02-18 05:40:54 -0600341 CONFIG_SYS_FSL_TBCLK_DIV
342
343 Defines the core time base clock divider ratio compared to the
344 system clock. On most PQ3 devices this is 8, on newer QorIQ
345 devices it can be 16 or 32. The ratio varies from SoC to Soc.
346
Kumar Gala8f290842011-05-20 00:39:21 -0500347 CONFIG_SYS_FSL_PCIE_COMPAT
348
349 Defines the string to utilize when trying to match PCIe device
350 tree nodes for the given platform.
351
Scott Wood33eee332012-08-14 10:14:53 +0000352 CONFIG_SYS_FSL_ERRATUM_A004510
353
354 Enables a workaround for erratum A004510. If set,
355 then CONFIG_SYS_FSL_ERRATUM_A004510_SVR_REV and
356 CONFIG_SYS_FSL_CORENET_SNOOPVEC_COREONLY must be set.
357
358 CONFIG_SYS_FSL_ERRATUM_A004510_SVR_REV
359 CONFIG_SYS_FSL_ERRATUM_A004510_SVR_REV2 (optional)
360
361 Defines one or two SoC revisions (low 8 bits of SVR)
362 for which the A004510 workaround should be applied.
363
364 The rest of SVR is either not relevant to the decision
365 of whether the erratum is present (e.g. p2040 versus
366 p2041) or is implied by the build target, which controls
367 whether CONFIG_SYS_FSL_ERRATUM_A004510 is set.
368
369 See Freescale App Note 4493 for more information about
370 this erratum.
371
Prabhakar Kushwaha74fa22e2013-04-16 13:27:44 +0530372 CONFIG_A003399_NOR_WORKAROUND
373 Enables a workaround for IFC erratum A003399. It is only
Jeremiah Mahlerb445bbb2015-01-04 18:56:50 -0800374 required during NOR boot.
Prabhakar Kushwaha74fa22e2013-04-16 13:27:44 +0530375
Prabhakar Kushwaha9f074e62014-10-29 22:33:09 +0530376 CONFIG_A008044_WORKAROUND
377 Enables a workaround for T1040/T1042 erratum A008044. It is only
Jeremiah Mahlerb445bbb2015-01-04 18:56:50 -0800378 required during NAND boot and valid for Rev 1.0 SoC revision
Prabhakar Kushwaha9f074e62014-10-29 22:33:09 +0530379
Scott Wood33eee332012-08-14 10:14:53 +0000380 CONFIG_SYS_FSL_CORENET_SNOOPVEC_COREONLY
381
382 This is the value to write into CCSR offset 0x18600
383 according to the A004510 workaround.
384
Priyanka Jain64501c62013-07-02 09:21:04 +0530385 CONFIG_SYS_FSL_DSP_DDR_ADDR
386 This value denotes start offset of DDR memory which is
387 connected exclusively to the DSP cores.
388
Priyanka Jain765b0bd2013-04-04 09:31:54 +0530389 CONFIG_SYS_FSL_DSP_M2_RAM_ADDR
390 This value denotes start offset of M2 memory
391 which is directly connected to the DSP core.
392
Priyanka Jain64501c62013-07-02 09:21:04 +0530393 CONFIG_SYS_FSL_DSP_M3_RAM_ADDR
394 This value denotes start offset of M3 memory which is directly
395 connected to the DSP core.
396
Priyanka Jain765b0bd2013-04-04 09:31:54 +0530397 CONFIG_SYS_FSL_DSP_CCSRBAR_DEFAULT
398 This value denotes start offset of DSP CCSR space.
399
Priyanka Jainb1359912013-12-17 14:25:52 +0530400 CONFIG_SYS_FSL_SINGLE_SOURCE_CLK
401 Single Source Clock is clocking mode present in some of FSL SoC's.
402 In this mode, a single differential clock is used to supply
403 clocks to the sysclock, ddrclock and usbclock.
404
Aneesh Bansalfb4a2402014-03-18 23:40:26 +0530405 CONFIG_SYS_CPC_REINIT_F
406 This CONFIG is defined when the CPC is configured as SRAM at the
Bin Menga1875592016-02-05 19:30:11 -0800407 time of U-Boot entry and is required to be re-initialized.
Aneesh Bansalfb4a2402014-03-18 23:40:26 +0530408
Tang Yuantianaade2002014-04-17 15:33:46 +0800409 CONFIG_DEEP_SLEEP
Jeremiah Mahlerb445bbb2015-01-04 18:56:50 -0800410 Indicates this SoC supports deep sleep feature. If deep sleep is
Tang Yuantianaade2002014-04-17 15:33:46 +0800411 supported, core will start to execute uboot when wakes up.
412
Daniel Schwierzeck6cb461b2012-04-02 02:57:56 +0000413- Generic CPU options:
414 CONFIG_SYS_BIG_ENDIAN, CONFIG_SYS_LITTLE_ENDIAN
415
416 Defines the endianess of the CPU. Implementation of those
417 values is arch specific.
418
York Sun5614e712013-09-30 09:22:09 -0700419 CONFIG_SYS_FSL_DDR
420 Freescale DDR driver in use. This type of DDR controller is
421 found in mpc83xx, mpc85xx, mpc86xx as well as some ARM core
422 SoCs.
423
424 CONFIG_SYS_FSL_DDR_ADDR
425 Freescale DDR memory-mapped register base.
426
427 CONFIG_SYS_FSL_DDR_EMU
428 Specify emulator support for DDR. Some DDR features such as
429 deskew training are not available.
430
431 CONFIG_SYS_FSL_DDRC_GEN1
432 Freescale DDR1 controller.
433
434 CONFIG_SYS_FSL_DDRC_GEN2
435 Freescale DDR2 controller.
436
437 CONFIG_SYS_FSL_DDRC_GEN3
438 Freescale DDR3 controller.
439
York Sun34e026f2014-03-27 17:54:47 -0700440 CONFIG_SYS_FSL_DDRC_GEN4
441 Freescale DDR4 controller.
442
York Sun9ac4ffb2013-09-30 14:20:51 -0700443 CONFIG_SYS_FSL_DDRC_ARM_GEN3
444 Freescale DDR3 controller for ARM-based SoCs.
445
York Sun5614e712013-09-30 09:22:09 -0700446 CONFIG_SYS_FSL_DDR1
447 Board config to use DDR1. It can be enabled for SoCs with
448 Freescale DDR1 or DDR2 controllers, depending on the board
449 implemetation.
450
451 CONFIG_SYS_FSL_DDR2
Robert P. J. Day62a3b7d2016-07-15 13:44:45 -0400452 Board config to use DDR2. It can be enabled for SoCs with
York Sun5614e712013-09-30 09:22:09 -0700453 Freescale DDR2 or DDR3 controllers, depending on the board
454 implementation.
455
456 CONFIG_SYS_FSL_DDR3
457 Board config to use DDR3. It can be enabled for SoCs with
York Sun34e026f2014-03-27 17:54:47 -0700458 Freescale DDR3 or DDR3L controllers.
459
460 CONFIG_SYS_FSL_DDR3L
461 Board config to use DDR3L. It can be enabled for SoCs with
462 DDR3L controllers.
463
464 CONFIG_SYS_FSL_DDR4
465 Board config to use DDR4. It can be enabled for SoCs with
466 DDR4 controllers.
York Sun5614e712013-09-30 09:22:09 -0700467
Prabhakar Kushwaha1b4175d2014-01-18 12:28:30 +0530468 CONFIG_SYS_FSL_IFC_BE
469 Defines the IFC controller register space as Big Endian
470
471 CONFIG_SYS_FSL_IFC_LE
472 Defines the IFC controller register space as Little Endian
473
Prabhakar Kushwaha1c407072017-02-02 15:01:26 +0530474 CONFIG_SYS_FSL_IFC_CLK_DIV
475 Defines divider of platform clock(clock input to IFC controller).
476
Prabhakar Kushwahaadd63f92017-02-02 15:02:00 +0530477 CONFIG_SYS_FSL_LBC_CLK_DIV
478 Defines divider of platform clock(clock input to eLBC controller).
479
Prabhakar Kushwaha690e4252014-01-13 11:28:04 +0530480 CONFIG_SYS_FSL_PBL_PBI
481 It enables addition of RCW (Power on reset configuration) in built image.
482 Please refer doc/README.pblimage for more details
483
484 CONFIG_SYS_FSL_PBL_RCW
485 It adds PBI(pre-boot instructions) commands in u-boot build image.
486 PBI commands can be used to configure SoC before it starts the execution.
487 Please refer doc/README.pblimage for more details
488
Prabhakar Kushwaha89ad7be2014-04-08 19:13:34 +0530489 CONFIG_SPL_FSL_PBL
490 It adds a target to create boot binary having SPL binary in PBI format
491 concatenated with u-boot binary.
492
York Sun4e5b1bd2014-02-10 13:59:42 -0800493 CONFIG_SYS_FSL_DDR_BE
494 Defines the DDR controller register space as Big Endian
495
496 CONFIG_SYS_FSL_DDR_LE
497 Defines the DDR controller register space as Little Endian
498
York Sun6b9e3092014-02-10 13:59:43 -0800499 CONFIG_SYS_FSL_DDR_SDRAM_BASE_PHY
500 Physical address from the view of DDR controllers. It is the
501 same as CONFIG_SYS_DDR_SDRAM_BASE for all Power SoCs. But
502 it could be different for ARM SoCs.
503
York Sun6b1e1252014-02-10 13:59:44 -0800504 CONFIG_SYS_FSL_DDR_INTLV_256B
505 DDR controller interleaving on 256-byte. This is a special
506 interleaving mode, handled by Dickens for Freescale layerscape
507 SoCs with ARM core.
508
York Sun1d71efb2014-08-01 15:51:00 -0700509 CONFIG_SYS_FSL_DDR_MAIN_NUM_CTRLS
510 Number of controllers used as main memory.
511
512 CONFIG_SYS_FSL_OTHER_DDR_NUM_CTRLS
513 Number of controllers used for other than main memory.
514
Prabhakar Kushwaha44937212015-11-09 16:42:07 +0530515 CONFIG_SYS_FSL_HAS_DP_DDR
516 Defines the SoC has DP-DDR used for DPAA.
517
Ruchika Gupta028dbb82014-09-09 11:50:31 +0530518 CONFIG_SYS_FSL_SEC_BE
519 Defines the SEC controller register space as Big Endian
520
521 CONFIG_SYS_FSL_SEC_LE
522 Defines the SEC controller register space as Little Endian
523
Daniel Schwierzeck92bbd642011-07-27 13:22:39 +0200524- MIPS CPU options:
525 CONFIG_SYS_INIT_SP_OFFSET
526
527 Offset relative to CONFIG_SYS_SDRAM_BASE for initial stack
528 pointer. This is needed for the temporary stack before
529 relocation.
530
531 CONFIG_SYS_MIPS_CACHE_MODE
532
533 Cache operation mode for the MIPS CPU.
534 See also arch/mips/include/asm/mipsregs.h.
535 Possible values are:
536 CONF_CM_CACHABLE_NO_WA
537 CONF_CM_CACHABLE_WA
538 CONF_CM_UNCACHED
539 CONF_CM_CACHABLE_NONCOHERENT
540 CONF_CM_CACHABLE_CE
541 CONF_CM_CACHABLE_COW
542 CONF_CM_CACHABLE_CUW
543 CONF_CM_CACHABLE_ACCELERATED
544
545 CONFIG_SYS_XWAY_EBU_BOOTCFG
546
547 Special option for Lantiq XWAY SoCs for booting from NOR flash.
548 See also arch/mips/cpu/mips32/start.S.
549
550 CONFIG_XWAY_SWAP_BYTES
551
552 Enable compilation of tools/xway-swap-bytes needed for Lantiq
553 XWAY SoCs for booting from NOR flash. The U-Boot image needs to
554 be swapped if a flash programmer is used.
555
Christian Rieschb67d8812012-02-02 00:44:39 +0000556- ARM options:
557 CONFIG_SYS_EXCEPTION_VECTORS_HIGH
558
559 Select high exception vectors of the ARM core, e.g., do not
560 clear the V bit of the c1 register of CP15.
561
York Sun207774b2015-03-20 19:28:08 -0700562 COUNTER_FREQUENCY
563 Generic timer clock source frequency.
564
565 COUNTER_FREQUENCY_REAL
566 Generic timer clock source frequency if the real clock is
567 different from COUNTER_FREQUENCY, and can only be determined
568 at run time.
569
Stephen Warren73c38932015-01-19 16:25:52 -0700570- Tegra SoC options:
571 CONFIG_TEGRA_SUPPORT_NON_SECURE
572
573 Support executing U-Boot in non-secure (NS) mode. Certain
574 impossible actions will be skipped if the CPU is in NS mode,
575 such as ARM architectural timer initialization.
576
wdenk5da627a2003-10-09 20:09:04 +0000577- Linux Kernel Interface:
wdenkc6097192002-11-03 00:24:07 +0000578 CONFIG_CLOCKS_IN_MHZ
579
580 U-Boot stores all clock information in Hz
581 internally. For binary compatibility with older Linux
582 kernels (which expect the clocks passed in the
583 bd_info data to be in MHz) the environment variable
584 "clocks_in_mhz" can be defined so that U-Boot
585 converts clock data to MHZ before passing it to the
586 Linux kernel.
wdenkc6097192002-11-03 00:24:07 +0000587 When CONFIG_CLOCKS_IN_MHZ is defined, a definition of
Wolfgang Denk218ca722008-03-26 10:40:12 +0100588 "clocks_in_mhz=1" is automatically included in the
wdenkc6097192002-11-03 00:24:07 +0000589 default environment.
590
wdenk5da627a2003-10-09 20:09:04 +0000591 CONFIG_MEMSIZE_IN_BYTES [relevant for MIPS only]
592
Jeremiah Mahlerb445bbb2015-01-04 18:56:50 -0800593 When transferring memsize parameter to Linux, some versions
wdenk5da627a2003-10-09 20:09:04 +0000594 expect it to be in bytes, others in MB.
595 Define CONFIG_MEMSIZE_IN_BYTES to make it in bytes.
596
Gerald Van Barenfec6d9e2008-06-03 20:34:45 -0400597 CONFIG_OF_LIBFDT
Wolfgang Denkf57f70a2005-10-13 01:45:54 +0200598
599 New kernel versions are expecting firmware settings to be
Gerald Van Baren213bf8c2007-03-31 12:23:51 -0400600 passed using flattened device trees (based on open firmware
601 concepts).
602
603 CONFIG_OF_LIBFDT
604 * New libfdt-based support
605 * Adds the "fdt" command
Kim Phillips3bb342f2007-08-10 14:34:14 -0500606 * The bootm command automatically updates the fdt
Gerald Van Baren213bf8c2007-03-31 12:23:51 -0400607
Wolfgang Denkf57f70a2005-10-13 01:45:54 +0200608 OF_TBCLK - The timebase frequency.
Kumar Galac2871f02006-01-11 13:59:02 -0600609 OF_STDOUT_PATH - The path to the console device
Wolfgang Denkf57f70a2005-10-13 01:45:54 +0200610
Marcel Ziswiler11ccc332008-07-09 08:17:15 +0200611 boards with QUICC Engines require OF_QE to set UCC MAC
612 addresses
Kim Phillips3bb342f2007-08-10 14:34:14 -0500613
Kumar Gala4e253132006-01-11 13:54:17 -0600614 CONFIG_OF_BOARD_SETUP
615
616 Board code has addition modification that it wants to make
617 to the flat device tree before handing it off to the kernel
wdenk6705d812004-08-02 23:22:59 +0000618
Simon Glassc654b512014-10-23 18:58:54 -0600619 CONFIG_OF_SYSTEM_SETUP
620
621 Other code has addition modification that it wants to make
622 to the flat device tree before handing it off to the kernel.
623 This causes ft_system_setup() to be called before booting
624 the kernel.
625
Heiko Schocher3887c3f2009-09-23 07:56:08 +0200626 CONFIG_OF_IDE_FIXUP
627
628 U-Boot can detect if an IDE device is present or not.
629 If not, and this new config option is activated, U-Boot
630 removes the ATA node from the DTS before booting Linux,
631 so the Linux IDE driver does not probe the device and
632 crash. This is needed for buggy hardware (uc101) where
633 no pull down resistor is connected to the signal IDE5V_DD7.
634
Igor Grinberg7eb29392011-07-14 05:45:07 +0000635 CONFIG_MACH_TYPE [relevant for ARM only][mandatory]
636
637 This setting is mandatory for all boards that have only one
638 machine type and must be used to specify the machine type
639 number as it appears in the ARM machine registry
640 (see http://www.arm.linux.org.uk/developer/machines/).
641 Only boards that have multiple machine types supported
642 in a single configuration file and the machine type is
643 runtime discoverable, do not have to use this setting.
644
Niklaus Giger0b2f4ec2008-11-03 22:13:47 +0100645- vxWorks boot parameters:
646
647 bootvx constructs a valid bootline using the following
Bin Meng9e98b7e2015-10-07 20:19:17 -0700648 environments variables: bootdev, bootfile, ipaddr, netmask,
649 serverip, gatewayip, hostname, othbootargs.
Niklaus Giger0b2f4ec2008-11-03 22:13:47 +0100650 It loads the vxWorks image pointed bootfile.
651
Niklaus Giger0b2f4ec2008-11-03 22:13:47 +0100652 Note: If a "bootargs" environment is defined, it will overwride
653 the defaults discussed just above.
654
Aneesh V2c451f72011-06-16 23:30:47 +0000655- Cache Configuration:
656 CONFIG_SYS_ICACHE_OFF - Do not enable instruction cache in U-Boot
657 CONFIG_SYS_DCACHE_OFF - Do not enable data cache in U-Boot
658 CONFIG_SYS_L2CACHE_OFF- Do not enable L2 cache in U-Boot
659
Aneesh V93bc2192011-06-16 23:30:51 +0000660- Cache Configuration for ARM:
661 CONFIG_SYS_L2_PL310 - Enable support for ARM PL310 L2 cache
662 controller
663 CONFIG_SYS_PL310_BASE - Physical base address of PL310
664 controller register space
665
wdenk6705d812004-08-02 23:22:59 +0000666- Serial Ports:
Andreas Engel48d01922008-09-08 14:30:53 +0200667 CONFIG_PL010_SERIAL
wdenk6705d812004-08-02 23:22:59 +0000668
669 Define this if you want support for Amba PrimeCell PL010 UARTs.
670
Andreas Engel48d01922008-09-08 14:30:53 +0200671 CONFIG_PL011_SERIAL
wdenk6705d812004-08-02 23:22:59 +0000672
673 Define this if you want support for Amba PrimeCell PL011 UARTs.
674
675 CONFIG_PL011_CLOCK
676
677 If you have Amba PrimeCell PL011 UARTs, set this variable to
678 the clock speed of the UARTs.
679
680 CONFIG_PL01x_PORTS
681
682 If you have Amba PrimeCell PL010 or PL011 UARTs on your board,
683 define this to a list of base addresses for each (supported)
684 port. See e.g. include/configs/versatile.h
685
Karicheri, Muralidharand57dee52014-04-09 15:38:46 -0400686 CONFIG_SERIAL_HW_FLOW_CONTROL
687
688 Define this variable to enable hw flow control in serial driver.
689 Current user of this option is drivers/serial/nsl16550.c driver
wdenk6705d812004-08-02 23:22:59 +0000690
wdenkc6097192002-11-03 00:24:07 +0000691- Console Baudrate:
692 CONFIG_BAUDRATE - in bps
693 Select one of the baudrates listed in
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200694 CONFIG_SYS_BAUDRATE_TABLE, see below.
wdenkc6097192002-11-03 00:24:07 +0000695
wdenkc6097192002-11-03 00:24:07 +0000696- Autoboot Command:
697 CONFIG_BOOTCOMMAND
698 Only needed when CONFIG_BOOTDELAY is enabled;
699 define a command string that is automatically executed
700 when no character is read on the console interface
701 within "Boot Delay" after reset.
702
wdenkc6097192002-11-03 00:24:07 +0000703 CONFIG_RAMBOOT and CONFIG_NFSBOOT
wdenk43d96162003-03-06 00:02:04 +0000704 The value of these goes into the environment as
705 "ramboot" and "nfsboot" respectively, and can be used
706 as a convenience, when switching between booting from
Marcel Ziswiler11ccc332008-07-09 08:17:15 +0200707 RAM and NFS.
wdenkc6097192002-11-03 00:24:07 +0000708
709- Pre-Boot Commands:
710 CONFIG_PREBOOT
711
712 When this option is #defined, the existence of the
713 environment variable "preboot" will be checked
714 immediately before starting the CONFIG_BOOTDELAY
715 countdown and/or running the auto-boot command resp.
716 entering interactive mode.
717
718 This feature is especially useful when "preboot" is
719 automatically generated or modified. For an example
720 see the LWMON board specific code: here "preboot" is
721 modified when the user holds down a certain
722 combination of keys on the (special) keyboard when
723 booting the systems
724
725- Serial Download Echo Mode:
726 CONFIG_LOADS_ECHO
727 If defined to 1, all characters received during a
728 serial download (using the "loads" command) are
729 echoed back. This might be needed by some terminal
730 emulations (like "cu"), but may as well just take
731 time on others. This setting #define's the initial
732 value of the "loads_echo" environment variable.
733
Jon Loeliger602ad3b2007-06-11 19:03:39 -0500734- Kgdb Serial Baudrate: (if CONFIG_CMD_KGDB is defined)
wdenkc6097192002-11-03 00:24:07 +0000735 CONFIG_KGDB_BAUDRATE
736 Select one of the baudrates listed in
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200737 CONFIG_SYS_BAUDRATE_TABLE, see below.
wdenkc6097192002-11-03 00:24:07 +0000738
Simon Glass302a6482016-03-13 19:07:28 -0600739- Removal of commands
740 If no commands are needed to boot, you can disable
741 CONFIG_CMDLINE to remove them. In this case, the command line
742 will not be available, and when U-Boot wants to execute the
743 boot command (on start-up) it will call board_run_command()
744 instead. This can reduce image size significantly for very
745 simple boot procedures.
746
Wolfgang Denka5ecbe62013-03-23 23:50:31 +0000747- Regular expression support:
748 CONFIG_REGEX
Wolfgang Denk93e14592013-10-04 17:43:24 +0200749 If this variable is defined, U-Boot is linked against
750 the SLRE (Super Light Regular Expression) library,
751 which adds regex support to some commands, as for
752 example "env grep" and "setexpr".
Wolfgang Denka5ecbe62013-03-23 23:50:31 +0000753
Simon Glass45ba8072011-10-15 05:48:20 +0000754- Device tree:
755 CONFIG_OF_CONTROL
756 If this variable is defined, U-Boot will use a device tree
757 to configure its devices, instead of relying on statically
758 compiled #defines in the board file. This option is
759 experimental and only available on a few boards. The device
760 tree is available in the global data as gd->fdt_blob.
761
Simon Glass2c0f79e2011-10-24 19:15:31 +0000762 U-Boot needs to get its device tree from somewhere. This can
Alex Deymo82f766d2017-04-02 01:25:20 -0700763 be done using one of the three options below:
Simon Glassbbb0b122011-10-15 05:48:21 +0000764
765 CONFIG_OF_EMBED
766 If this variable is defined, U-Boot will embed a device tree
767 binary in its image. This device tree file should be in the
768 board directory and called <soc>-<board>.dts. The binary file
769 is then picked up in board_init_f() and made available through
Nobuhiro Iwamatsueb3eb602017-08-26 07:34:14 +0900770 the global data structure as gd->fdt_blob.
Simon Glass45ba8072011-10-15 05:48:20 +0000771
Simon Glass2c0f79e2011-10-24 19:15:31 +0000772 CONFIG_OF_SEPARATE
773 If this variable is defined, U-Boot will build a device tree
774 binary. It will be called u-boot.dtb. Architecture-specific
775 code will locate it at run-time. Generally this works by:
776
777 cat u-boot.bin u-boot.dtb >image.bin
778
779 and in fact, U-Boot does this for you, creating a file called
780 u-boot-dtb.bin which is useful in the common case. You can
781 still use the individual files if you need something more
782 exotic.
783
Alex Deymo82f766d2017-04-02 01:25:20 -0700784 CONFIG_OF_BOARD
785 If this variable is defined, U-Boot will use the device tree
786 provided by the board at runtime instead of embedding one with
787 the image. Only boards defining board_fdt_blob_setup() support
788 this option (see include/fdtdec.h file).
789
wdenkc6097192002-11-03 00:24:07 +0000790- Watchdog:
791 CONFIG_WATCHDOG
792 If this variable is defined, it enables watchdog
Detlev Zundel6abe6fb2011-04-27 05:25:59 +0000793 support for the SoC. There must be support in the SoC
Christophe Leroy907208c2017-07-06 10:23:22 +0200794 specific code for a watchdog. For the 8xx
795 CPUs, the SIU Watchdog feature is enabled in the SYPCR
796 register. When supported for a specific SoC is
797 available, then no further board specific code should
798 be needed to use it.
Detlev Zundel6abe6fb2011-04-27 05:25:59 +0000799
800 CONFIG_HW_WATCHDOG
801 When using a watchdog circuitry external to the used
802 SoC, then define this variable and provide board
803 specific code for the "hw_watchdog_reset" function.
wdenkc6097192002-11-03 00:24:07 +0000804
Heiko Schocher7bae0d62015-01-21 08:38:22 +0100805 CONFIG_AT91_HW_WDT_TIMEOUT
806 specify the timeout in seconds. default 2 seconds.
807
wdenkc6097192002-11-03 00:24:07 +0000808- Real-Time Clock:
809
Jon Loeliger602ad3b2007-06-11 19:03:39 -0500810 When CONFIG_CMD_DATE is selected, the type of the RTC
wdenkc6097192002-11-03 00:24:07 +0000811 has to be selected, too. Define exactly one of the
812 following options:
813
wdenkc6097192002-11-03 00:24:07 +0000814 CONFIG_RTC_PCF8563 - use Philips PCF8563 RTC
Fabio Estevam4e8b7542011-10-24 06:44:15 +0000815 CONFIG_RTC_MC13XXX - use MC13783 or MC13892 RTC
wdenkc6097192002-11-03 00:24:07 +0000816 CONFIG_RTC_MC146818 - use MC146818 RTC
wdenk1cb8e982003-03-06 21:55:29 +0000817 CONFIG_RTC_DS1307 - use Maxim, Inc. DS1307 RTC
wdenkc6097192002-11-03 00:24:07 +0000818 CONFIG_RTC_DS1337 - use Maxim, Inc. DS1337 RTC
wdenk7f70e852003-05-20 14:25:27 +0000819 CONFIG_RTC_DS1338 - use Maxim, Inc. DS1338 RTC
Markus Niebel412921d2014-07-21 11:06:16 +0200820 CONFIG_RTC_DS1339 - use Maxim, Inc. DS1339 RTC
wdenk3bac3512003-03-12 10:41:04 +0000821 CONFIG_RTC_DS164x - use Dallas DS164x RTC
Tor Krill9536dfc2008-03-15 15:40:26 +0100822 CONFIG_RTC_ISL1208 - use Intersil ISL1208 RTC
wdenk4c0d4c32004-06-09 17:34:58 +0000823 CONFIG_RTC_MAX6900 - use Maxim, Inc. MAX6900 RTC
Chris Packham2bd3cab2017-05-30 12:03:33 +1200824 CONFIG_RTC_DS1337_NOOSC - Turn off the OSC output for DS1337
Heiko Schocher71d19f32011-03-28 09:24:22 +0200825 CONFIG_SYS_RV3029_TCR - enable trickle charger on
826 RV3029 RTC.
wdenkc6097192002-11-03 00:24:07 +0000827
wdenkb37c7e52003-06-30 16:24:52 +0000828 Note that if the RTC uses I2C, then the I2C interface
829 must also be configured. See I2C Support, below.
830
Peter Tysere92739d2008-12-17 16:36:21 -0600831- GPIO Support:
832 CONFIG_PCA953X - use NXP's PCA953X series I2C GPIO
Peter Tysere92739d2008-12-17 16:36:21 -0600833
Chris Packham5dec49c2010-12-19 10:12:13 +0000834 The CONFIG_SYS_I2C_PCA953X_WIDTH option specifies a list of
835 chip-ngpio pairs that tell the PCA953X driver the number of
836 pins supported by a particular chip.
837
Peter Tysere92739d2008-12-17 16:36:21 -0600838 Note that if the GPIO device uses I2C, then the I2C interface
839 must also be configured. See I2C Support, below.
840
Simon Glassaa532332014-06-11 23:29:41 -0600841- I/O tracing:
842 When CONFIG_IO_TRACE is selected, U-Boot intercepts all I/O
843 accesses and can checksum them or write a list of them out
844 to memory. See the 'iotrace' command for details. This is
845 useful for testing device drivers since it can confirm that
846 the driver behaves the same way before and after a code
847 change. Currently this is supported on sandbox and arm. To
848 add support for your architecture, add '#include <iotrace.h>'
849 to the bottom of arch/<arch>/include/asm/io.h and test.
850
851 Example output from the 'iotrace stats' command is below.
852 Note that if the trace buffer is exhausted, the checksum will
853 still continue to operate.
854
855 iotrace is enabled
856 Start: 10000000 (buffer start address)
857 Size: 00010000 (buffer size)
858 Offset: 00000120 (current buffer offset)
859 Output: 10000120 (start + offset)
860 Count: 00000018 (number of trace records)
861 CRC32: 9526fb66 (CRC32 of all trace records)
862
wdenkc6097192002-11-03 00:24:07 +0000863- Timestamp Support:
864
wdenk43d96162003-03-06 00:02:04 +0000865 When CONFIG_TIMESTAMP is selected, the timestamp
866 (date and time) of an image is printed by image
867 commands like bootm or iminfo. This option is
Jon Loeliger602ad3b2007-06-11 19:03:39 -0500868 automatically enabled when you select CONFIG_CMD_DATE .
wdenkc6097192002-11-03 00:24:07 +0000869
Karl O. Pinc923c46f2012-08-16 06:20:15 +0000870- Partition Labels (disklabels) Supported:
871 Zero or more of the following:
872 CONFIG_MAC_PARTITION Apple's MacOS partition table.
Karl O. Pinc923c46f2012-08-16 06:20:15 +0000873 CONFIG_ISO_PARTITION ISO partition table, used on CDROM etc.
874 CONFIG_EFI_PARTITION GPT partition table, common when EFI is the
875 bootloader. Note 2TB partition limit; see
876 disk/part_efi.c
877 CONFIG_MTD_PARTITIONS Memory Technology Device partition table.
wdenkc6097192002-11-03 00:24:07 +0000878
Simon Glassfc843a02017-05-17 03:25:30 -0600879 If IDE or SCSI support is enabled (CONFIG_IDE or
Simon Glassc649e3c2016-05-01 11:36:02 -0600880 CONFIG_SCSI) you must configure support for at
Karl O. Pinc923c46f2012-08-16 06:20:15 +0000881 least one non-MTD partition type as well.
wdenkc6097192002-11-03 00:24:07 +0000882
883- IDE Reset method:
wdenk4d13cba2004-03-14 14:09:05 +0000884 CONFIG_IDE_RESET_ROUTINE - this is defined in several
885 board configurations files but used nowhere!
wdenkc6097192002-11-03 00:24:07 +0000886
wdenk4d13cba2004-03-14 14:09:05 +0000887 CONFIG_IDE_RESET - is this is defined, IDE Reset will
888 be performed by calling the function
889 ide_set_reset(int reset)
890 which has to be defined in a board specific file
wdenkc6097192002-11-03 00:24:07 +0000891
892- ATAPI Support:
893 CONFIG_ATAPI
894
895 Set this to enable ATAPI support.
896
wdenkc40b2952004-03-13 23:29:43 +0000897- LBA48 Support
898 CONFIG_LBA48
899
900 Set this to enable support for disks larger than 137GB
Heiko Schocher4b142fe2009-12-03 11:21:21 +0100901 Also look at CONFIG_SYS_64BIT_LBA.
wdenkc40b2952004-03-13 23:29:43 +0000902 Whithout these , LBA48 support uses 32bit variables and will 'only'
903 support disks up to 2.1TB.
904
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200905 CONFIG_SYS_64BIT_LBA:
wdenkc40b2952004-03-13 23:29:43 +0000906 When enabled, makes the IDE subsystem use 64bit sector addresses.
907 Default is 32bit.
908
wdenkc6097192002-11-03 00:24:07 +0000909- SCSI Support:
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200910 CONFIG_SYS_SCSI_MAX_LUN [8], CONFIG_SYS_SCSI_MAX_SCSI_ID [7] and
911 CONFIG_SYS_SCSI_MAX_DEVICE [CONFIG_SYS_SCSI_MAX_SCSI_ID *
912 CONFIG_SYS_SCSI_MAX_LUN] can be adjusted to define the
wdenkc6097192002-11-03 00:24:07 +0000913 maximum numbers of LUNs, SCSI ID's and target
914 devices.
wdenkc6097192002-11-03 00:24:07 +0000915
Wolfgang Denk93e14592013-10-04 17:43:24 +0200916 The environment variable 'scsidevs' is set to the number of
917 SCSI devices found during the last scan.
Stefan Reinauer447c0312012-10-29 05:23:48 +0000918
wdenkc6097192002-11-03 00:24:07 +0000919- NETWORK Support (PCI):
wdenk682011f2003-06-03 23:54:09 +0000920 CONFIG_E1000
Kyle Moffettce5207e2011-10-18 11:05:29 +0000921 Support for Intel 8254x/8257x gigabit chips.
922
923 CONFIG_E1000_SPI
924 Utility code for direct access to the SPI bus on Intel 8257x.
925 This does not do anything useful unless you set at least one
926 of CONFIG_CMD_E1000 or CONFIG_E1000_SPI_GENERIC.
927
928 CONFIG_E1000_SPI_GENERIC
929 Allow generic access to the SPI bus on the Intel 8257x, for
930 example with the "sspi" command.
931
wdenkc6097192002-11-03 00:24:07 +0000932 CONFIG_EEPRO100
933 Support for Intel 82557/82559/82559ER chips.
Marcel Ziswiler11ccc332008-07-09 08:17:15 +0200934 Optional CONFIG_EEPRO100_SROM_WRITE enables EEPROM
wdenkc6097192002-11-03 00:24:07 +0000935 write routine for first time initialisation.
936
937 CONFIG_TULIP
938 Support for Digital 2114x chips.
939 Optional CONFIG_TULIP_SELECT_MEDIA for board specific
940 modem chip initialisation (KS8761/QS6611).
941
942 CONFIG_NATSEMI
943 Support for National dp83815 chips.
944
945 CONFIG_NS8382X
946 Support for National dp8382[01] gigabit chips.
947
wdenk45219c42003-05-12 21:50:16 +0000948- NETWORK Support (other):
949
Jens Scharsigc041e9d2010-01-23 12:03:45 +0100950 CONFIG_DRIVER_AT91EMAC
951 Support for AT91RM9200 EMAC.
952
953 CONFIG_RMII
954 Define this to use reduced MII inteface
955
956 CONFIG_DRIVER_AT91EMAC_QUIET
957 If this defined, the driver is quiet.
958 The driver doen't show link status messages.
959
Rob Herringefdd7312011-12-15 11:15:49 +0000960 CONFIG_CALXEDA_XGMAC
961 Support for the Calxeda XGMAC device
962
Ashok3bb46d22012-10-15 06:20:47 +0000963 CONFIG_LAN91C96
wdenk45219c42003-05-12 21:50:16 +0000964 Support for SMSC's LAN91C96 chips.
965
wdenk45219c42003-05-12 21:50:16 +0000966 CONFIG_LAN91C96_USE_32_BIT
967 Define this to enable 32 bit addressing
968
Ashok3bb46d22012-10-15 06:20:47 +0000969 CONFIG_SMC91111
wdenkf39748a2004-06-09 13:37:52 +0000970 Support for SMSC's LAN91C111 chip
971
972 CONFIG_SMC91111_BASE
973 Define this to hold the physical address
974 of the device (I/O space)
975
976 CONFIG_SMC_USE_32_BIT
977 Define this if data bus is 32 bits
978
979 CONFIG_SMC_USE_IOFUNCS
980 Define this to use i/o functions instead of macros
981 (some hardware wont work with macros)
982
Heiko Schocherdc02bad2011-11-15 10:00:04 -0500983 CONFIG_DRIVER_TI_EMAC
984 Support for davinci emac
985
986 CONFIG_SYS_DAVINCI_EMAC_PHY_COUNT
987 Define this if you have more then 3 PHYs.
988
Macpaul Linb3dbf4a52010-12-21 16:59:46 +0800989 CONFIG_FTGMAC100
990 Support for Faraday's FTGMAC100 Gigabit SoC Ethernet
991
992 CONFIG_FTGMAC100_EGIGA
993 Define this to use GE link update with gigabit PHY.
994 Define this if FTGMAC100 is connected to gigabit PHY.
995 If your system has 10/100 PHY only, it might not occur
996 wrong behavior. Because PHY usually return timeout or
997 useless data when polling gigabit status and gigabit
998 control registers. This behavior won't affect the
999 correctnessof 10/100 link speed update.
1000
Yoshihiro Shimoda3d0075f2011-01-27 10:06:03 +09001001 CONFIG_SH_ETHER
1002 Support for Renesas on-chip Ethernet controller
1003
1004 CONFIG_SH_ETHER_USE_PORT
1005 Define the number of ports to be used
1006
1007 CONFIG_SH_ETHER_PHY_ADDR
1008 Define the ETH PHY's address
1009
Yoshihiro Shimoda68260aa2011-01-27 10:06:08 +09001010 CONFIG_SH_ETHER_CACHE_WRITEBACK
1011 If this option is set, the driver enables cache flush.
1012
Heiko Schocherb2f97cf2014-07-18 06:07:19 +02001013- PWM Support:
1014 CONFIG_PWM_IMX
Robert P. J. Day5052e812016-09-13 08:35:18 -04001015 Support for PWM module on the imx6.
Heiko Schocherb2f97cf2014-07-18 06:07:19 +02001016
Vadim Bendebury5e124722011-10-17 08:36:14 +00001017- TPM Support:
Che-liang Chiou90899cc2013-04-12 11:04:34 +00001018 CONFIG_TPM
1019 Support TPM devices.
1020
Christophe Ricard0766ad22015-10-06 22:54:41 +02001021 CONFIG_TPM_TIS_INFINEON
1022 Support for Infineon i2c bus TPM devices. Only one device
Tom Wai-Hong Tam1b393db2013-04-12 11:04:37 +00001023 per system is supported at this time.
1024
Tom Wai-Hong Tam1b393db2013-04-12 11:04:37 +00001025 CONFIG_TPM_TIS_I2C_BURST_LIMITATION
1026 Define the burst count bytes upper limit
1027
Christophe Ricard3aa74082016-01-21 23:27:13 +01001028 CONFIG_TPM_ST33ZP24
1029 Support for STMicroelectronics TPM devices. Requires DM_TPM support.
1030
1031 CONFIG_TPM_ST33ZP24_I2C
1032 Support for STMicroelectronics ST33ZP24 I2C devices.
1033 Requires TPM_ST33ZP24 and I2C.
1034
Christophe Ricardb75fdc12016-01-21 23:27:14 +01001035 CONFIG_TPM_ST33ZP24_SPI
1036 Support for STMicroelectronics ST33ZP24 SPI devices.
1037 Requires TPM_ST33ZP24 and SPI.
1038
Dirk Eibachc01939c2013-06-26 15:55:15 +02001039 CONFIG_TPM_ATMEL_TWI
1040 Support for Atmel TWI TPM device. Requires I2C support.
1041
Che-liang Chiou90899cc2013-04-12 11:04:34 +00001042 CONFIG_TPM_TIS_LPC
Vadim Bendebury5e124722011-10-17 08:36:14 +00001043 Support for generic parallel port TPM devices. Only one device
1044 per system is supported at this time.
1045
1046 CONFIG_TPM_TIS_BASE_ADDRESS
1047 Base address where the generic TPM device is mapped
1048 to. Contemporary x86 systems usually map it at
1049 0xfed40000.
1050
Reinhard Pfaube6c1522013-06-26 15:55:13 +02001051 CONFIG_TPM
1052 Define this to enable the TPM support library which provides
1053 functional interfaces to some TPM commands.
1054 Requires support for a TPM device.
1055
1056 CONFIG_TPM_AUTH_SESSIONS
1057 Define this to enable authorized functions in the TPM library.
1058 Requires CONFIG_TPM and CONFIG_SHA1.
1059
wdenkc6097192002-11-03 00:24:07 +00001060- USB Support:
1061 At the moment only the UHCI host controller is
Heiko Schocher064b55c2017-06-14 05:49:40 +02001062 supported (PIP405, MIP405); define
wdenkc6097192002-11-03 00:24:07 +00001063 CONFIG_USB_UHCI to enable it.
1064 define CONFIG_USB_KEYBOARD to enable the USB Keyboard
wdenk30d56fa2004-10-09 22:44:59 +00001065 and define CONFIG_USB_STORAGE to enable the USB
wdenkc6097192002-11-03 00:24:07 +00001066 storage devices.
1067 Note:
1068 Supported are USB Keyboards and USB Floppy drives
1069 (TEAC FD-05PUB).
wdenk4d13cba2004-03-14 14:09:05 +00001070
Simon Glass9ab4ce22012-02-27 10:52:47 +00001071 CONFIG_USB_EHCI_TXFIFO_THRESH enables setting of the
1072 txfilltuning field in the EHCI controller on reset.
1073
Oleksandr Tymoshenko6e9e0622014-02-01 21:51:25 -07001074 CONFIG_USB_DWC2_REG_ADDR the physical CPU address of the DWC2
1075 HW module registers.
1076
Wolfgang Denk16c8d5e2006-06-14 17:45:53 +02001077- USB Device:
1078 Define the below if you wish to use the USB console.
1079 Once firmware is rebuilt from a serial console issue the
1080 command "setenv stdin usbtty; setenv stdout usbtty" and
Marcel Ziswiler11ccc332008-07-09 08:17:15 +02001081 attach your USB cable. The Unix command "dmesg" should print
Wolfgang Denk16c8d5e2006-06-14 17:45:53 +02001082 it has found a new device. The environment variable usbtty
1083 can be set to gserial or cdc_acm to enable your device to
Wolfgang Denk386eda02006-06-14 18:14:56 +02001084 appear to a USB host as a Linux gserial device or a
Wolfgang Denk16c8d5e2006-06-14 17:45:53 +02001085 Common Device Class Abstract Control Model serial device.
1086 If you select usbtty = gserial you should be able to enumerate
1087 a Linux host by
1088 # modprobe usbserial vendor=0xVendorID product=0xProductID
1089 else if using cdc_acm, simply setting the environment
1090 variable usbtty to be cdc_acm should suffice. The following
1091 might be defined in YourBoardName.h
Wolfgang Denk386eda02006-06-14 18:14:56 +02001092
Wolfgang Denk16c8d5e2006-06-14 17:45:53 +02001093 CONFIG_USB_DEVICE
1094 Define this to build a UDC device
wdenkc6097192002-11-03 00:24:07 +00001095
Wolfgang Denk16c8d5e2006-06-14 17:45:53 +02001096 CONFIG_USB_TTY
1097 Define this to have a tty type of device available to
1098 talk to the UDC device
Wolfgang Denk386eda02006-06-14 18:14:56 +02001099
Vipin KUMARf9da0f82012-03-26 15:38:06 +05301100 CONFIG_USBD_HS
1101 Define this to enable the high speed support for usb
1102 device and usbtty. If this feature is enabled, a routine
1103 int is_usbd_high_speed(void)
1104 also needs to be defined by the driver to dynamically poll
1105 whether the enumeration has succeded at high speed or full
1106 speed.
1107
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +02001108 CONFIG_SYS_CONSOLE_IS_IN_ENV
Wolfgang Denk16c8d5e2006-06-14 17:45:53 +02001109 Define this if you want stdin, stdout &/or stderr to
1110 be set to usbtty.
1111
Wolfgang Denk386eda02006-06-14 18:14:56 +02001112 If you have a USB-IF assigned VendorID then you may wish to
Wolfgang Denk16c8d5e2006-06-14 17:45:53 +02001113 define your own vendor specific values either in BoardName.h
Wolfgang Denk386eda02006-06-14 18:14:56 +02001114 or directly in usbd_vendor_info.h. If you don't define
Wolfgang Denk16c8d5e2006-06-14 17:45:53 +02001115 CONFIG_USBD_MANUFACTURER, CONFIG_USBD_PRODUCT_NAME,
1116 CONFIG_USBD_VENDORID and CONFIG_USBD_PRODUCTID, then U-Boot
1117 should pretend to be a Linux device to it's target host.
1118
1119 CONFIG_USBD_MANUFACTURER
1120 Define this string as the name of your company for
1121 - CONFIG_USBD_MANUFACTURER "my company"
Wolfgang Denk386eda02006-06-14 18:14:56 +02001122
Wolfgang Denk16c8d5e2006-06-14 17:45:53 +02001123 CONFIG_USBD_PRODUCT_NAME
1124 Define this string as the name of your product
1125 - CONFIG_USBD_PRODUCT_NAME "acme usb device"
1126
1127 CONFIG_USBD_VENDORID
1128 Define this as your assigned Vendor ID from the USB
1129 Implementors Forum. This *must* be a genuine Vendor ID
1130 to avoid polluting the USB namespace.
1131 - CONFIG_USBD_VENDORID 0xFFFF
Wolfgang Denk386eda02006-06-14 18:14:56 +02001132
Wolfgang Denk16c8d5e2006-06-14 17:45:53 +02001133 CONFIG_USBD_PRODUCTID
1134 Define this as the unique Product ID
1135 for your device
1136 - CONFIG_USBD_PRODUCTID 0xFFFF
wdenkc6097192002-11-03 00:24:07 +00001137
Igor Grinbergd70a5602011-12-12 12:08:35 +02001138- ULPI Layer Support:
1139 The ULPI (UTMI Low Pin (count) Interface) PHYs are supported via
1140 the generic ULPI layer. The generic layer accesses the ULPI PHY
1141 via the platform viewport, so you need both the genric layer and
1142 the viewport enabled. Currently only Chipidea/ARC based
1143 viewport is supported.
1144 To enable the ULPI layer support, define CONFIG_USB_ULPI and
1145 CONFIG_USB_ULPI_VIEWPORT in your board configuration file.
Lucas Stach6d365ea2012-10-01 00:44:35 +02001146 If your ULPI phy needs a different reference clock than the
1147 standard 24 MHz then you have to define CONFIG_ULPI_REF_CLK to
1148 the appropriate value in Hz.
wdenkc6097192002-11-03 00:24:07 +00001149
1150- MMC Support:
1151 The MMC controller on the Intel PXA is supported. To
1152 enable this define CONFIG_MMC. The MMC can be
1153 accessed from the boot prompt by mapping the device
1154 to physical memory similar to flash. Command line is
Jon Loeliger602ad3b2007-06-11 19:03:39 -05001155 enabled with CONFIG_CMD_MMC. The MMC driver also works with
1156 the FAT fs. This is enabled with CONFIG_CMD_FAT.
wdenkc6097192002-11-03 00:24:07 +00001157
Yoshihiro Shimodaafb35662011-07-04 22:21:22 +00001158 CONFIG_SH_MMCIF
1159 Support for Renesas on-chip MMCIF controller
1160
1161 CONFIG_SH_MMCIF_ADDR
1162 Define the base address of MMCIF registers
1163
1164 CONFIG_SH_MMCIF_CLK
1165 Define the clock frequency for MMCIF
1166
Pierre Aubert1fd93c62014-04-24 10:30:08 +02001167 CONFIG_SUPPORT_EMMC_BOOT
1168 Enable some additional features of the eMMC boot partitions.
1169
Tom Rinib3ba6e92013-03-14 05:32:47 +00001170- USB Device Firmware Update (DFU) class support:
Marek Vasutbb4059a2018-02-16 16:41:18 +01001171 CONFIG_DFU_OVER_USB
Tom Rinib3ba6e92013-03-14 05:32:47 +00001172 This enables the USB portion of the DFU USB class
1173
Tom Rinib3ba6e92013-03-14 05:32:47 +00001174 CONFIG_DFU_MMC
1175 This enables support for exposing (e)MMC devices via DFU.
1176
Pantelis Antoniouc6631762013-03-14 05:32:52 +00001177 CONFIG_DFU_NAND
1178 This enables support for exposing NAND devices via DFU.
1179
Afzal Mohammeda9479f02013-09-18 01:15:24 +05301180 CONFIG_DFU_RAM
1181 This enables support for exposing RAM via DFU.
1182 Note: DFU spec refer to non-volatile memory usage, but
1183 allow usages beyond the scope of spec - here RAM usage,
1184 one that would help mostly the developer.
1185
Heiko Schochere7e75c72013-06-12 06:05:51 +02001186 CONFIG_SYS_DFU_DATA_BUF_SIZE
1187 Dfu transfer uses a buffer before writing data to the
1188 raw storage device. Make the size (in bytes) of this buffer
1189 configurable. The size of this buffer is also configurable
1190 through the "dfu_bufsiz" environment variable.
1191
Pantelis Antoniouea2453d2013-03-14 05:32:48 +00001192 CONFIG_SYS_DFU_MAX_FILE_SIZE
1193 When updating files rather than the raw storage device,
1194 we use a static buffer to copy the file into and then write
1195 the buffer once we've been given the whole file. Define
1196 this to the maximum filesize (in bytes) for the buffer.
1197 Default is 4 MiB if undefined.
1198
Heiko Schocher001a8312014-03-18 08:09:56 +01001199 DFU_DEFAULT_POLL_TIMEOUT
1200 Poll timeout [ms], is the timeout a device can send to the
1201 host. The host must wait for this timeout before sending
1202 a subsequent DFU_GET_STATUS request to the device.
1203
1204 DFU_MANIFEST_POLL_TIMEOUT
1205 Poll timeout [ms], which the device sends to the host when
1206 entering dfuMANIFEST state. Host waits this timeout, before
1207 sending again an USB request to the device.
1208
wdenk6705d812004-08-02 23:22:59 +00001209- Journaling Flash filesystem support:
Simon Glassb2482df2016-10-02 18:00:59 -06001210 CONFIG_JFFS2_NAND
wdenk6705d812004-08-02 23:22:59 +00001211 Define these for a default partition on a NAND device
1212
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +02001213 CONFIG_SYS_JFFS2_FIRST_SECTOR,
1214 CONFIG_SYS_JFFS2_FIRST_BANK, CONFIG_SYS_JFFS2_NUM_BANKS
wdenk6705d812004-08-02 23:22:59 +00001215 Define these for a default partition on a NOR device
1216
wdenkc6097192002-11-03 00:24:07 +00001217- Keyboard Support:
Simon Glass39f615e2015-11-11 10:05:47 -07001218 See Kconfig help for available keyboard drivers.
1219
1220 CONFIG_KEYBOARD
1221
1222 Define this to enable a custom keyboard support.
1223 This simply calls drv_keyboard_init() which must be
1224 defined in your board-specific files. This option is deprecated
1225 and is only used by novena. For new boards, use driver model
1226 instead.
wdenkc6097192002-11-03 00:24:07 +00001227
1228- Video support:
Timur Tabi7d3053f2011-02-15 17:09:19 -06001229 CONFIG_FSL_DIU_FB
Wolfgang Denk04e5ae72011-09-11 21:24:09 +02001230 Enable the Freescale DIU video driver. Reference boards for
Timur Tabi7d3053f2011-02-15 17:09:19 -06001231 SOCs that have a DIU should define this macro to enable DIU
1232 support, and should also define these other macros:
1233
1234 CONFIG_SYS_DIU_ADDR
1235 CONFIG_VIDEO
Timur Tabi7d3053f2011-02-15 17:09:19 -06001236 CONFIG_CFB_CONSOLE
1237 CONFIG_VIDEO_SW_CURSOR
1238 CONFIG_VGA_AS_SINGLE_DEVICE
1239 CONFIG_VIDEO_LOGO
1240 CONFIG_VIDEO_BMP_LOGO
1241
Timur Tabiba8e76b2011-04-11 14:18:22 -05001242 The DIU driver will look for the 'video-mode' environment
1243 variable, and if defined, enable the DIU as a console during
Fabio Estevam8eca9432016-04-02 11:53:18 -03001244 boot. See the documentation file doc/README.video for a
Timur Tabiba8e76b2011-04-11 14:18:22 -05001245 description of this variable.
Timur Tabi7d3053f2011-02-15 17:09:19 -06001246
wdenkc6097192002-11-03 00:24:07 +00001247- LCD Support: CONFIG_LCD
1248
1249 Define this to enable LCD support (for output to LCD
1250 display); also select one of the supported displays
1251 by defining one of these:
1252
Stelian Pop39cf4802008-05-09 21:57:18 +02001253 CONFIG_ATMEL_LCD:
1254
1255 HITACHI TX09D70VM1CCA, 3.5", 240x320.
1256
wdenkfd3103b2003-11-25 16:55:19 +00001257 CONFIG_NEC_NL6448AC33:
wdenkc6097192002-11-03 00:24:07 +00001258
wdenkfd3103b2003-11-25 16:55:19 +00001259 NEC NL6448AC33-18. Active, color, single scan.
wdenkc6097192002-11-03 00:24:07 +00001260
wdenkfd3103b2003-11-25 16:55:19 +00001261 CONFIG_NEC_NL6448BC20
wdenkc6097192002-11-03 00:24:07 +00001262
wdenkfd3103b2003-11-25 16:55:19 +00001263 NEC NL6448BC20-08. 6.5", 640x480.
1264 Active, color, single scan.
1265
1266 CONFIG_NEC_NL6448BC33_54
1267
1268 NEC NL6448BC33-54. 10.4", 640x480.
wdenkc6097192002-11-03 00:24:07 +00001269 Active, color, single scan.
1270
1271 CONFIG_SHARP_16x9
1272
1273 Sharp 320x240. Active, color, single scan.
1274 It isn't 16x9, and I am not sure what it is.
1275
1276 CONFIG_SHARP_LQ64D341
1277
1278 Sharp LQ64D341 display, 640x480.
1279 Active, color, single scan.
1280
1281 CONFIG_HLD1045
1282
1283 HLD1045 display, 640x480.
1284 Active, color, single scan.
1285
1286 CONFIG_OPTREX_BW
1287
1288 Optrex CBL50840-2 NF-FW 99 22 M5
1289 or
1290 Hitachi LMG6912RPFC-00T
1291 or
1292 Hitachi SP14Q002
1293
1294 320x240. Black & white.
1295
Simon Glass676d3192012-10-17 13:24:54 +00001296 CONFIG_LCD_ALIGNMENT
1297
Jeremiah Mahlerb445bbb2015-01-04 18:56:50 -08001298 Normally the LCD is page-aligned (typically 4KB). If this is
Simon Glass676d3192012-10-17 13:24:54 +00001299 defined then the LCD will be aligned to this value instead.
1300 For ARM it is sometimes useful to use MMU_SECTION_SIZE
1301 here, since it is cheaper to change data cache settings on
1302 a per-section basis.
1303
1304
Hannes Petermaier604c7d42015-03-27 08:01:38 +01001305 CONFIG_LCD_ROTATION
1306
1307 Sometimes, for example if the display is mounted in portrait
1308 mode or even if it's mounted landscape but rotated by 180degree,
1309 we need to rotate our content of the display relative to the
1310 framebuffer, so that user can read the messages which are
1311 printed out.
1312 Once CONFIG_LCD_ROTATION is defined, the lcd_console will be
1313 initialized with a given rotation from "vl_rot" out of
1314 "vidinfo_t" which is provided by the board specific code.
1315 The value for vl_rot is coded as following (matching to
1316 fbcon=rotate:<n> linux-kernel commandline):
1317 0 = no rotation respectively 0 degree
1318 1 = 90 degree rotation
1319 2 = 180 degree rotation
1320 3 = 270 degree rotation
1321
1322 If CONFIG_LCD_ROTATION is not defined, the console will be
1323 initialized with 0degree rotation.
1324
Tom Wai-Hong Tam45d7f522012-09-28 15:11:16 +00001325 CONFIG_LCD_BMP_RLE8
1326
1327 Support drawing of RLE8-compressed bitmaps on the LCD.
1328
Tom Wai-Hong Tam735987c2012-12-05 14:46:40 +00001329 CONFIG_I2C_EDID
1330
1331 Enables an 'i2c edid' command which can read EDID
1332 information over I2C from an attached LCD display.
1333
wdenk7152b1d2003-09-05 23:19:14 +00001334- Splash Screen Support: CONFIG_SPLASH_SCREEN
wdenkd791b1d2003-04-20 14:04:18 +00001335
wdenk8bde7f72003-06-27 21:31:46 +00001336 If this option is set, the environment is checked for
1337 a variable "splashimage". If found, the usual display
1338 of logo, copyright and system information on the LCD
wdenke94d2cd2004-06-30 22:59:18 +00001339 is suppressed and the BMP image at the address
wdenk8bde7f72003-06-27 21:31:46 +00001340 specified in "splashimage" is loaded instead. The
1341 console is redirected to the "nulldev", too. This
1342 allows for a "silent" boot where a splash screen is
1343 loaded very quickly after power-on.
wdenkd791b1d2003-04-20 14:04:18 +00001344
Nikita Kiryanovc0880482013-02-24 21:28:43 +00001345 CONFIG_SPLASHIMAGE_GUARD
1346
1347 If this option is set, then U-Boot will prevent the environment
1348 variable "splashimage" from being set to a problematic address
Fabio Estevamab5645f2016-03-23 12:46:12 -03001349 (see doc/README.displaying-bmps).
Nikita Kiryanovc0880482013-02-24 21:28:43 +00001350 This option is useful for targets where, due to alignment
1351 restrictions, an improperly aligned BMP image will cause a data
1352 abort. If you think you will not have problems with unaligned
1353 accesses (for example because your toolchain prevents them)
1354 there is no need to set this option.
1355
Matthias Weisser1ca298c2009-07-09 16:07:30 +02001356 CONFIG_SPLASH_SCREEN_ALIGN
1357
1358 If this option is set the splash image can be freely positioned
1359 on the screen. Environment variable "splashpos" specifies the
1360 position as "x,y". If a positive number is given it is used as
1361 number of pixel from left/top. If a negative number is given it
1362 is used as number of pixel from right/bottom. You can also
1363 specify 'm' for centering the image.
1364
1365 Example:
1366 setenv splashpos m,m
1367 => image at center of screen
1368
1369 setenv splashpos 30,20
1370 => image at x = 30 and y = 20
1371
1372 setenv splashpos -10,m
1373 => vertically centered image
1374 at x = dspWidth - bmpWidth - 9
1375
Stefan Roese98f4a3d2005-09-22 09:04:17 +02001376- Gzip compressed BMP image support: CONFIG_VIDEO_BMP_GZIP
1377
1378 If this option is set, additionally to standard BMP
1379 images, gzipped BMP images can be displayed via the
1380 splashscreen support or the bmp command.
1381
Anatolij Gustschind5011762010-03-15 14:50:25 +01001382- Run length encoded BMP image (RLE8) support: CONFIG_VIDEO_BMP_RLE8
1383
1384 If this option is set, 8-bit RLE compressed BMP images
1385 can be displayed via the splashscreen support or the
1386 bmp command.
1387
wdenkc29fdfc2003-08-29 20:57:53 +00001388- Compression support:
Kees Cook8ef70472013-08-16 07:59:12 -07001389 CONFIG_GZIP
1390
1391 Enabled by default to support gzip compressed images.
1392
wdenkc29fdfc2003-08-29 20:57:53 +00001393 CONFIG_BZIP2
1394
1395 If this option is set, support for bzip2 compressed
1396 images is included. If not, only uncompressed and gzip
1397 compressed images are supported.
1398
wdenk42d1f032003-10-15 23:53:47 +00001399 NOTE: the bzip2 algorithm requires a lot of RAM, so
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +02001400 the malloc area (as defined by CONFIG_SYS_MALLOC_LEN) should
wdenk42d1f032003-10-15 23:53:47 +00001401 be at least 4MB.
wdenkd791b1d2003-04-20 14:04:18 +00001402
wdenk17ea1172004-06-06 21:51:03 +00001403- MII/PHY support:
wdenk17ea1172004-06-06 21:51:03 +00001404 CONFIG_PHY_CLOCK_FREQ (ppc4xx)
1405
1406 The clock frequency of the MII bus
1407
wdenk17ea1172004-06-06 21:51:03 +00001408 CONFIG_PHY_RESET_DELAY
1409
1410 Some PHY like Intel LXT971A need extra delay after
1411 reset before any MII register access is possible.
1412 For such PHY, set this option to the usec delay
1413 required. (minimum 300usec for LXT971A)
1414
1415 CONFIG_PHY_CMD_DELAY (ppc4xx)
1416
1417 Some PHY like Intel LXT971A need extra delay after
1418 command issued before MII status register can be read
1419
wdenkc6097192002-11-03 00:24:07 +00001420- IP address:
1421 CONFIG_IPADDR
1422
1423 Define a default value for the IP address to use for
Marcel Ziswiler11ccc332008-07-09 08:17:15 +02001424 the default Ethernet interface, in case this is not
wdenkc6097192002-11-03 00:24:07 +00001425 determined through e.g. bootp.
Wolfgang Denk1ebcd652011-10-26 10:21:22 +00001426 (Environment variable "ipaddr")
wdenkc6097192002-11-03 00:24:07 +00001427
1428- Server IP address:
1429 CONFIG_SERVERIP
1430
Marcel Ziswiler11ccc332008-07-09 08:17:15 +02001431 Defines a default value for the IP address of a TFTP
wdenkc6097192002-11-03 00:24:07 +00001432 server to contact when using the "tftboot" command.
Wolfgang Denk1ebcd652011-10-26 10:21:22 +00001433 (Environment variable "serverip")
wdenkc6097192002-11-03 00:24:07 +00001434
Robin Getz97cfe862009-07-21 12:15:28 -04001435 CONFIG_KEEP_SERVERADDR
1436
1437 Keeps the server's MAC address, in the env 'serveraddr'
1438 for passing to bootargs (like Linux's netconsole option)
1439
Wolfgang Denk1ebcd652011-10-26 10:21:22 +00001440- Gateway IP address:
1441 CONFIG_GATEWAYIP
1442
1443 Defines a default value for the IP address of the
1444 default router where packets to other networks are
1445 sent to.
1446 (Environment variable "gatewayip")
1447
1448- Subnet mask:
1449 CONFIG_NETMASK
1450
1451 Defines a default value for the subnet mask (or
1452 routing prefix) which is used to determine if an IP
1453 address belongs to the local subnet or needs to be
1454 forwarded through a router.
1455 (Environment variable "netmask")
1456
David Updegraff53a5c422007-06-11 10:41:07 -05001457- Multicast TFTP Mode:
1458 CONFIG_MCAST_TFTP
1459
1460 Defines whether you want to support multicast TFTP as per
1461 rfc-2090; for example to work with atftp. Lets lots of targets
Marcel Ziswiler11ccc332008-07-09 08:17:15 +02001462 tftp down the same boot image concurrently. Note: the Ethernet
David Updegraff53a5c422007-06-11 10:41:07 -05001463 driver in use must provide a function: mcast() to join/leave a
1464 multicast group.
1465
wdenkc6097192002-11-03 00:24:07 +00001466- BOOTP Recovery Mode:
1467 CONFIG_BOOTP_RANDOM_DELAY
1468
1469 If you have many targets in a network that try to
1470 boot using BOOTP, you may want to avoid that all
1471 systems send out BOOTP requests at precisely the same
1472 moment (which would happen for instance at recovery
1473 from a power failure, when all systems will try to
1474 boot, thus flooding the BOOTP server. Defining
1475 CONFIG_BOOTP_RANDOM_DELAY causes a random delay to be
1476 inserted before sending out BOOTP requests. The
Wolfgang Denk6c33c782007-08-06 23:21:05 +02001477 following delays are inserted then:
wdenkc6097192002-11-03 00:24:07 +00001478
1479 1st BOOTP request: delay 0 ... 1 sec
1480 2nd BOOTP request: delay 0 ... 2 sec
1481 3rd BOOTP request: delay 0 ... 4 sec
1482 4th and following
1483 BOOTP requests: delay 0 ... 8 sec
1484
Thierry Reding92ac8ac2014-08-19 10:21:24 +02001485 CONFIG_BOOTP_ID_CACHE_SIZE
1486
1487 BOOTP packets are uniquely identified using a 32-bit ID. The
1488 server will copy the ID from client requests to responses and
1489 U-Boot will use this to determine if it is the destination of
1490 an incoming response. Some servers will check that addresses
1491 aren't in use before handing them out (usually using an ARP
1492 ping) and therefore take up to a few hundred milliseconds to
1493 respond. Network congestion may also influence the time it
1494 takes for a response to make it back to the client. If that
1495 time is too long, U-Boot will retransmit requests. In order
1496 to allow earlier responses to still be accepted after these
1497 retransmissions, U-Boot's BOOTP client keeps a small cache of
1498 IDs. The CONFIG_BOOTP_ID_CACHE_SIZE controls the size of this
1499 cache. The default is to keep IDs for up to four outstanding
1500 requests. Increasing this will allow U-Boot to accept offers
1501 from a BOOTP client in networks with unusually high latency.
1502
stroesefe389a82003-08-28 14:17:32 +00001503- DHCP Advanced Options:
Jon Loeliger1fe80d72007-07-09 22:08:34 -05001504 You can fine tune the DHCP functionality by defining
1505 CONFIG_BOOTP_* symbols:
stroesefe389a82003-08-28 14:17:32 +00001506
Jon Loeliger1fe80d72007-07-09 22:08:34 -05001507 CONFIG_BOOTP_NISDOMAIN
Jon Loeliger1fe80d72007-07-09 22:08:34 -05001508 CONFIG_BOOTP_BOOTFILESIZE
Jon Loeliger1fe80d72007-07-09 22:08:34 -05001509 CONFIG_BOOTP_SEND_HOSTNAME
1510 CONFIG_BOOTP_NTPSERVER
1511 CONFIG_BOOTP_TIMEOFFSET
1512 CONFIG_BOOTP_VENDOREX
Joe Hershberger2c00e092012-05-23 07:59:19 +00001513 CONFIG_BOOTP_MAY_FAIL
stroesefe389a82003-08-28 14:17:32 +00001514
Wilson Callan5d110f02007-07-28 10:56:13 -04001515 CONFIG_BOOTP_SERVERIP - TFTP server will be the serverip
1516 environment variable, not the BOOTP server.
stroesefe389a82003-08-28 14:17:32 +00001517
Joe Hershberger2c00e092012-05-23 07:59:19 +00001518 CONFIG_BOOTP_MAY_FAIL - If the DHCP server is not found
1519 after the configured retry count, the call will fail
1520 instead of starting over. This can be used to fail over
1521 to Link-local IP address configuration if the DHCP server
1522 is not available.
1523
stroesefe389a82003-08-28 14:17:32 +00001524 CONFIG_BOOTP_SEND_HOSTNAME - Some DHCP servers are capable
1525 to do a dynamic update of a DNS server. To do this, they
1526 need the hostname of the DHCP requester.
Wilson Callan5d110f02007-07-28 10:56:13 -04001527 If CONFIG_BOOTP_SEND_HOSTNAME is defined, the content
Jon Loeliger1fe80d72007-07-09 22:08:34 -05001528 of the "hostname" environment variable is passed as
1529 option 12 to the DHCP server.
stroesefe389a82003-08-28 14:17:32 +00001530
Aras Vaichasd9a2f412008-03-26 09:43:57 +11001531 CONFIG_BOOTP_DHCP_REQUEST_DELAY
1532
1533 A 32bit value in microseconds for a delay between
1534 receiving a "DHCP Offer" and sending the "DHCP Request".
1535 This fixes a problem with certain DHCP servers that don't
1536 respond 100% of the time to a "DHCP request". E.g. On an
1537 AT91RM9200 processor running at 180MHz, this delay needed
1538 to be *at least* 15,000 usec before a Windows Server 2003
1539 DHCP server would reply 100% of the time. I recommend at
1540 least 50,000 usec to be safe. The alternative is to hope
1541 that one of the retries will be successful but note that
1542 the DHCP timeout and retry process takes a longer than
1543 this delay.
1544
Joe Hershbergerd22c3382012-05-23 08:00:12 +00001545 - Link-local IP address negotiation:
1546 Negotiate with other link-local clients on the local network
1547 for an address that doesn't require explicit configuration.
1548 This is especially useful if a DHCP server cannot be guaranteed
1549 to exist in all environments that the device must operate.
1550
1551 See doc/README.link-local for more information.
1552
Prabhakar Kushwaha24acb832017-11-23 16:51:32 +05301553 - MAC address from environment variables
1554
1555 FDT_SEQ_MACADDR_FROM_ENV
1556
1557 Fix-up device tree with MAC addresses fetched sequentially from
1558 environment variables. This config work on assumption that
1559 non-usable ethernet node of device-tree are either not present
1560 or their status has been marked as "disabled".
1561
wdenka3d991b2004-04-15 21:48:45 +00001562 - CDP Options:
wdenk6e592382004-04-18 17:39:38 +00001563 CONFIG_CDP_DEVICE_ID
wdenka3d991b2004-04-15 21:48:45 +00001564
1565 The device id used in CDP trigger frames.
1566
1567 CONFIG_CDP_DEVICE_ID_PREFIX
1568
1569 A two character string which is prefixed to the MAC address
1570 of the device.
1571
1572 CONFIG_CDP_PORT_ID
1573
1574 A printf format string which contains the ascii name of
1575 the port. Normally is set to "eth%d" which sets
Marcel Ziswiler11ccc332008-07-09 08:17:15 +02001576 eth0 for the first Ethernet, eth1 for the second etc.
wdenka3d991b2004-04-15 21:48:45 +00001577
1578 CONFIG_CDP_CAPABILITIES
1579
1580 A 32bit integer which indicates the device capabilities;
1581 0x00000010 for a normal host which does not forwards.
1582
1583 CONFIG_CDP_VERSION
1584
1585 An ascii string containing the version of the software.
1586
1587 CONFIG_CDP_PLATFORM
1588
1589 An ascii string containing the name of the platform.
1590
1591 CONFIG_CDP_TRIGGER
1592
1593 A 32bit integer sent on the trigger.
1594
1595 CONFIG_CDP_POWER_CONSUMPTION
1596
1597 A 16bit integer containing the power consumption of the
1598 device in .1 of milliwatts.
1599
1600 CONFIG_CDP_APPLIANCE_VLAN_TYPE
1601
1602 A byte containing the id of the VLAN.
1603
Uri Mashiach79267ed2017-01-19 10:51:05 +02001604- Status LED: CONFIG_LED_STATUS
wdenkc6097192002-11-03 00:24:07 +00001605
1606 Several configurations allow to display the current
1607 status using a LED. For instance, the LED will blink
1608 fast while running U-Boot code, stop blinking as
1609 soon as a reply to a BOOTP request was received, and
1610 start blinking slow once the Linux kernel is running
1611 (supported by a status LED driver in the Linux
Uri Mashiach79267ed2017-01-19 10:51:05 +02001612 kernel). Defining CONFIG_LED_STATUS enables this
wdenkc6097192002-11-03 00:24:07 +00001613 feature in U-Boot.
1614
Igor Grinberg1df7bbb2013-11-08 01:03:50 +02001615 Additional options:
1616
Uri Mashiach79267ed2017-01-19 10:51:05 +02001617 CONFIG_LED_STATUS_GPIO
Igor Grinberg1df7bbb2013-11-08 01:03:50 +02001618 The status LED can be connected to a GPIO pin.
1619 In such cases, the gpio_led driver can be used as a
Uri Mashiach79267ed2017-01-19 10:51:05 +02001620 status LED backend implementation. Define CONFIG_LED_STATUS_GPIO
Igor Grinberg1df7bbb2013-11-08 01:03:50 +02001621 to include the gpio_led driver in the U-Boot binary.
1622
Igor Grinberg9dfdcdf2013-11-08 01:03:52 +02001623 CONFIG_GPIO_LED_INVERTED_TABLE
1624 Some GPIO connected LEDs may have inverted polarity in which
1625 case the GPIO high value corresponds to LED off state and
1626 GPIO low value corresponds to LED on state.
1627 In such cases CONFIG_GPIO_LED_INVERTED_TABLE may be defined
1628 with a list of GPIO LEDs that have inverted polarity.
1629
Heiko Schocher3f4978c2012-01-16 21:12:24 +00001630- I2C Support: CONFIG_SYS_I2C
wdenkc6097192002-11-03 00:24:07 +00001631
Heiko Schocher3f4978c2012-01-16 21:12:24 +00001632 This enable the NEW i2c subsystem, and will allow you to use
1633 i2c commands at the u-boot command line (as long as you set
1634 CONFIG_CMD_I2C in CONFIG_COMMANDS) and communicate with i2c
1635 based realtime clock chips or other i2c devices. See
1636 common/cmd_i2c.c for a description of the command line
1637 interface.
1638
1639 ported i2c driver to the new framework:
Heiko Schocherea818db2013-01-29 08:53:15 +01001640 - drivers/i2c/soft_i2c.c:
1641 - activate first bus with CONFIG_SYS_I2C_SOFT define
1642 CONFIG_SYS_I2C_SOFT_SPEED and CONFIG_SYS_I2C_SOFT_SLAVE
1643 for defining speed and slave address
1644 - activate second bus with I2C_SOFT_DECLARATIONS2 define
1645 CONFIG_SYS_I2C_SOFT_SPEED_2 and CONFIG_SYS_I2C_SOFT_SLAVE_2
1646 for defining speed and slave address
1647 - activate third bus with I2C_SOFT_DECLARATIONS3 define
1648 CONFIG_SYS_I2C_SOFT_SPEED_3 and CONFIG_SYS_I2C_SOFT_SLAVE_3
1649 for defining speed and slave address
1650 - activate fourth bus with I2C_SOFT_DECLARATIONS4 define
1651 CONFIG_SYS_I2C_SOFT_SPEED_4 and CONFIG_SYS_I2C_SOFT_SLAVE_4
1652 for defining speed and slave address
Heiko Schocher3f4978c2012-01-16 21:12:24 +00001653
Heiko Schocher00f792e2012-10-24 13:48:22 +02001654 - drivers/i2c/fsl_i2c.c:
1655 - activate i2c driver with CONFIG_SYS_I2C_FSL
1656 define CONFIG_SYS_FSL_I2C_OFFSET for setting the register
1657 offset CONFIG_SYS_FSL_I2C_SPEED for the i2c speed and
1658 CONFIG_SYS_FSL_I2C_SLAVE for the slave addr of the first
1659 bus.
Wolfgang Denk93e14592013-10-04 17:43:24 +02001660 - If your board supports a second fsl i2c bus, define
Heiko Schocher00f792e2012-10-24 13:48:22 +02001661 CONFIG_SYS_FSL_I2C2_OFFSET for the register offset
1662 CONFIG_SYS_FSL_I2C2_SPEED for the speed and
1663 CONFIG_SYS_FSL_I2C2_SLAVE for the slave address of the
1664 second bus.
1665
Simon Glass1f2ba722012-10-30 07:28:53 +00001666 - drivers/i2c/tegra_i2c.c:
Nobuhiro Iwamatsu10cee512013-10-11 16:23:53 +09001667 - activate this driver with CONFIG_SYS_I2C_TEGRA
1668 - This driver adds 4 i2c buses with a fix speed from
1669 100000 and the slave addr 0!
Simon Glass1f2ba722012-10-30 07:28:53 +00001670
Dirk Eibach880540d2013-04-25 02:40:01 +00001671 - drivers/i2c/ppc4xx_i2c.c
1672 - activate this driver with CONFIG_SYS_I2C_PPC4XX
1673 - CONFIG_SYS_I2C_PPC4XX_CH0 activate hardware channel 0
1674 - CONFIG_SYS_I2C_PPC4XX_CH1 activate hardware channel 1
1675
tremfac96402013-09-21 18:13:35 +02001676 - drivers/i2c/i2c_mxc.c
1677 - activate this driver with CONFIG_SYS_I2C_MXC
Albert ARIBAUD \\(3ADEV\\)03544c62015-09-21 22:43:38 +02001678 - enable bus 1 with CONFIG_SYS_I2C_MXC_I2C1
1679 - enable bus 2 with CONFIG_SYS_I2C_MXC_I2C2
1680 - enable bus 3 with CONFIG_SYS_I2C_MXC_I2C3
1681 - enable bus 4 with CONFIG_SYS_I2C_MXC_I2C4
tremfac96402013-09-21 18:13:35 +02001682 - define speed for bus 1 with CONFIG_SYS_MXC_I2C1_SPEED
1683 - define slave for bus 1 with CONFIG_SYS_MXC_I2C1_SLAVE
1684 - define speed for bus 2 with CONFIG_SYS_MXC_I2C2_SPEED
1685 - define slave for bus 2 with CONFIG_SYS_MXC_I2C2_SLAVE
1686 - define speed for bus 3 with CONFIG_SYS_MXC_I2C3_SPEED
1687 - define slave for bus 3 with CONFIG_SYS_MXC_I2C3_SLAVE
Albert ARIBAUD \\(3ADEV\\)03544c62015-09-21 22:43:38 +02001688 - define speed for bus 4 with CONFIG_SYS_MXC_I2C4_SPEED
1689 - define slave for bus 4 with CONFIG_SYS_MXC_I2C4_SLAVE
Jeremiah Mahlerb445bbb2015-01-04 18:56:50 -08001690 If those defines are not set, default value is 100000
tremfac96402013-09-21 18:13:35 +02001691 for speed, and 0 for slave.
1692
Nobuhiro Iwamatsu1086bfa2013-09-27 16:58:30 +09001693 - drivers/i2c/rcar_i2c.c:
1694 - activate this driver with CONFIG_SYS_I2C_RCAR
1695 - This driver adds 4 i2c buses
1696
1697 - CONFIG_SYS_RCAR_I2C0_BASE for setting the register channel 0
1698 - CONFIG_SYS_RCAR_I2C0_SPEED for for the speed channel 0
1699 - CONFIG_SYS_RCAR_I2C1_BASE for setting the register channel 1
1700 - CONFIG_SYS_RCAR_I2C1_SPEED for for the speed channel 1
1701 - CONFIG_SYS_RCAR_I2C2_BASE for setting the register channel 2
1702 - CONFIG_SYS_RCAR_I2C2_SPEED for for the speed channel 2
1703 - CONFIG_SYS_RCAR_I2C3_BASE for setting the register channel 3
1704 - CONFIG_SYS_RCAR_I2C3_SPEED for for the speed channel 3
1705 - CONFIF_SYS_RCAR_I2C_NUM_CONTROLLERS for number of i2c buses
1706
Nobuhiro Iwamatsu2035d772013-10-29 13:33:51 +09001707 - drivers/i2c/sh_i2c.c:
1708 - activate this driver with CONFIG_SYS_I2C_SH
1709 - This driver adds from 2 to 5 i2c buses
1710
1711 - CONFIG_SYS_I2C_SH_BASE0 for setting the register channel 0
1712 - CONFIG_SYS_I2C_SH_SPEED0 for for the speed channel 0
1713 - CONFIG_SYS_I2C_SH_BASE1 for setting the register channel 1
1714 - CONFIG_SYS_I2C_SH_SPEED1 for for the speed channel 1
1715 - CONFIG_SYS_I2C_SH_BASE2 for setting the register channel 2
1716 - CONFIG_SYS_I2C_SH_SPEED2 for for the speed channel 2
1717 - CONFIG_SYS_I2C_SH_BASE3 for setting the register channel 3
1718 - CONFIG_SYS_I2C_SH_SPEED3 for for the speed channel 3
1719 - CONFIG_SYS_I2C_SH_BASE4 for setting the register channel 4
1720 - CONFIG_SYS_I2C_SH_SPEED4 for for the speed channel 4
Jeremiah Mahlerb445bbb2015-01-04 18:56:50 -08001721 - CONFIG_SYS_I2C_SH_NUM_CONTROLLERS for number of i2c buses
Nobuhiro Iwamatsu2035d772013-10-29 13:33:51 +09001722
Heiko Schocher6789e842013-10-22 11:03:18 +02001723 - drivers/i2c/omap24xx_i2c.c
1724 - activate this driver with CONFIG_SYS_I2C_OMAP24XX
1725 - CONFIG_SYS_OMAP24_I2C_SPEED speed channel 0
1726 - CONFIG_SYS_OMAP24_I2C_SLAVE slave addr channel 0
1727 - CONFIG_SYS_OMAP24_I2C_SPEED1 speed channel 1
1728 - CONFIG_SYS_OMAP24_I2C_SLAVE1 slave addr channel 1
1729 - CONFIG_SYS_OMAP24_I2C_SPEED2 speed channel 2
1730 - CONFIG_SYS_OMAP24_I2C_SLAVE2 slave addr channel 2
1731 - CONFIG_SYS_OMAP24_I2C_SPEED3 speed channel 3
1732 - CONFIG_SYS_OMAP24_I2C_SLAVE3 slave addr channel 3
1733 - CONFIG_SYS_OMAP24_I2C_SPEED4 speed channel 4
1734 - CONFIG_SYS_OMAP24_I2C_SLAVE4 slave addr channel 4
1735
Heiko Schocher0bdffe72013-11-08 07:30:53 +01001736 - drivers/i2c/zynq_i2c.c
1737 - activate this driver with CONFIG_SYS_I2C_ZYNQ
1738 - set CONFIG_SYS_I2C_ZYNQ_SPEED for speed setting
1739 - set CONFIG_SYS_I2C_ZYNQ_SLAVE for slave addr
1740
Naveen Krishna Che717fc62013-12-06 12:12:38 +05301741 - drivers/i2c/s3c24x0_i2c.c:
1742 - activate this driver with CONFIG_SYS_I2C_S3C24X0
1743 - This driver adds i2c buses (11 for Exynos5250, Exynos5420
1744 9 i2c buses for Exynos4 and 1 for S3C24X0 SoCs from Samsung)
1745 with a fix speed from 100000 and the slave addr 0!
1746
Dirk Eibachb46226b2014-07-03 09:28:18 +02001747 - drivers/i2c/ihs_i2c.c
1748 - activate this driver with CONFIG_SYS_I2C_IHS
1749 - CONFIG_SYS_I2C_IHS_CH0 activate hardware channel 0
1750 - CONFIG_SYS_I2C_IHS_SPEED_0 speed channel 0
1751 - CONFIG_SYS_I2C_IHS_SLAVE_0 slave addr channel 0
1752 - CONFIG_SYS_I2C_IHS_CH1 activate hardware channel 1
1753 - CONFIG_SYS_I2C_IHS_SPEED_1 speed channel 1
1754 - CONFIG_SYS_I2C_IHS_SLAVE_1 slave addr channel 1
1755 - CONFIG_SYS_I2C_IHS_CH2 activate hardware channel 2
1756 - CONFIG_SYS_I2C_IHS_SPEED_2 speed channel 2
1757 - CONFIG_SYS_I2C_IHS_SLAVE_2 slave addr channel 2
1758 - CONFIG_SYS_I2C_IHS_CH3 activate hardware channel 3
1759 - CONFIG_SYS_I2C_IHS_SPEED_3 speed channel 3
1760 - CONFIG_SYS_I2C_IHS_SLAVE_3 slave addr channel 3
Dirk Eibach071be892015-10-28 11:46:22 +01001761 - activate dual channel with CONFIG_SYS_I2C_IHS_DUAL
1762 - CONFIG_SYS_I2C_IHS_SPEED_0_1 speed channel 0_1
1763 - CONFIG_SYS_I2C_IHS_SLAVE_0_1 slave addr channel 0_1
1764 - CONFIG_SYS_I2C_IHS_SPEED_1_1 speed channel 1_1
1765 - CONFIG_SYS_I2C_IHS_SLAVE_1_1 slave addr channel 1_1
1766 - CONFIG_SYS_I2C_IHS_SPEED_2_1 speed channel 2_1
1767 - CONFIG_SYS_I2C_IHS_SLAVE_2_1 slave addr channel 2_1
1768 - CONFIG_SYS_I2C_IHS_SPEED_3_1 speed channel 3_1
1769 - CONFIG_SYS_I2C_IHS_SLAVE_3_1 slave addr channel 3_1
Dirk Eibachb46226b2014-07-03 09:28:18 +02001770
Heiko Schocher3f4978c2012-01-16 21:12:24 +00001771 additional defines:
1772
1773 CONFIG_SYS_NUM_I2C_BUSES
Simon Glass945a18e2016-10-02 18:01:05 -06001774 Hold the number of i2c buses you want to use.
Heiko Schocher3f4978c2012-01-16 21:12:24 +00001775
1776 CONFIG_SYS_I2C_DIRECT_BUS
1777 define this, if you don't use i2c muxes on your hardware.
1778 if CONFIG_SYS_I2C_MAX_HOPS is not defined or == 0 you can
1779 omit this define.
1780
1781 CONFIG_SYS_I2C_MAX_HOPS
1782 define how many muxes are maximal consecutively connected
1783 on one i2c bus. If you not use i2c muxes, omit this
1784 define.
1785
1786 CONFIG_SYS_I2C_BUSES
Jeremiah Mahlerb445bbb2015-01-04 18:56:50 -08001787 hold a list of buses you want to use, only used if
Heiko Schocher3f4978c2012-01-16 21:12:24 +00001788 CONFIG_SYS_I2C_DIRECT_BUS is not defined, for example
1789 a board with CONFIG_SYS_I2C_MAX_HOPS = 1 and
1790 CONFIG_SYS_NUM_I2C_BUSES = 9:
1791
1792 CONFIG_SYS_I2C_BUSES {{0, {I2C_NULL_HOP}}, \
1793 {0, {{I2C_MUX_PCA9547, 0x70, 1}}}, \
1794 {0, {{I2C_MUX_PCA9547, 0x70, 2}}}, \
1795 {0, {{I2C_MUX_PCA9547, 0x70, 3}}}, \
1796 {0, {{I2C_MUX_PCA9547, 0x70, 4}}}, \
1797 {0, {{I2C_MUX_PCA9547, 0x70, 5}}}, \
1798 {1, {I2C_NULL_HOP}}, \
1799 {1, {{I2C_MUX_PCA9544, 0x72, 1}}}, \
1800 {1, {{I2C_MUX_PCA9544, 0x72, 2}}}, \
1801 }
1802
1803 which defines
1804 bus 0 on adapter 0 without a mux
Heiko Schocherea818db2013-01-29 08:53:15 +01001805 bus 1 on adapter 0 with a PCA9547 on address 0x70 port 1
1806 bus 2 on adapter 0 with a PCA9547 on address 0x70 port 2
1807 bus 3 on adapter 0 with a PCA9547 on address 0x70 port 3
1808 bus 4 on adapter 0 with a PCA9547 on address 0x70 port 4
1809 bus 5 on adapter 0 with a PCA9547 on address 0x70 port 5
Heiko Schocher3f4978c2012-01-16 21:12:24 +00001810 bus 6 on adapter 1 without a mux
Heiko Schocherea818db2013-01-29 08:53:15 +01001811 bus 7 on adapter 1 with a PCA9544 on address 0x72 port 1
1812 bus 8 on adapter 1 with a PCA9544 on address 0x72 port 2
Heiko Schocher3f4978c2012-01-16 21:12:24 +00001813
1814 If you do not have i2c muxes on your board, omit this define.
1815
Simon Glassce3b5d62017-05-12 21:10:00 -06001816- Legacy I2C Support:
Heiko Schocherea818db2013-01-29 08:53:15 +01001817 If you use the software i2c interface (CONFIG_SYS_I2C_SOFT)
wdenkb37c7e52003-06-30 16:24:52 +00001818 then the following macros need to be defined (examples are
1819 from include/configs/lwmon.h):
wdenkc6097192002-11-03 00:24:07 +00001820
1821 I2C_INIT
1822
wdenkb37c7e52003-06-30 16:24:52 +00001823 (Optional). Any commands necessary to enable the I2C
wdenk43d96162003-03-06 00:02:04 +00001824 controller or configure ports.
wdenkc6097192002-11-03 00:24:07 +00001825
wdenkba56f622004-02-06 23:19:44 +00001826 eg: #define I2C_INIT (immr->im_cpm.cp_pbdir |= PB_SCL)
wdenkb37c7e52003-06-30 16:24:52 +00001827
wdenkc6097192002-11-03 00:24:07 +00001828 I2C_ACTIVE
1829
1830 The code necessary to make the I2C data line active
1831 (driven). If the data line is open collector, this
1832 define can be null.
1833
wdenkb37c7e52003-06-30 16:24:52 +00001834 eg: #define I2C_ACTIVE (immr->im_cpm.cp_pbdir |= PB_SDA)
1835
wdenkc6097192002-11-03 00:24:07 +00001836 I2C_TRISTATE
1837
1838 The code necessary to make the I2C data line tri-stated
1839 (inactive). If the data line is open collector, this
1840 define can be null.
1841
wdenkb37c7e52003-06-30 16:24:52 +00001842 eg: #define I2C_TRISTATE (immr->im_cpm.cp_pbdir &= ~PB_SDA)
1843
wdenkc6097192002-11-03 00:24:07 +00001844 I2C_READ
1845
York Sun472d5462013-04-01 11:29:11 -07001846 Code that returns true if the I2C data line is high,
1847 false if it is low.
wdenkc6097192002-11-03 00:24:07 +00001848
wdenkb37c7e52003-06-30 16:24:52 +00001849 eg: #define I2C_READ ((immr->im_cpm.cp_pbdat & PB_SDA) != 0)
1850
wdenkc6097192002-11-03 00:24:07 +00001851 I2C_SDA(bit)
1852
York Sun472d5462013-04-01 11:29:11 -07001853 If <bit> is true, sets the I2C data line high. If it
1854 is false, it clears it (low).
wdenkc6097192002-11-03 00:24:07 +00001855
wdenkb37c7e52003-06-30 16:24:52 +00001856 eg: #define I2C_SDA(bit) \
wdenk2535d602003-07-17 23:16:40 +00001857 if(bit) immr->im_cpm.cp_pbdat |= PB_SDA; \
wdenkba56f622004-02-06 23:19:44 +00001858 else immr->im_cpm.cp_pbdat &= ~PB_SDA
wdenkb37c7e52003-06-30 16:24:52 +00001859
wdenkc6097192002-11-03 00:24:07 +00001860 I2C_SCL(bit)
1861
York Sun472d5462013-04-01 11:29:11 -07001862 If <bit> is true, sets the I2C clock line high. If it
1863 is false, it clears it (low).
wdenkc6097192002-11-03 00:24:07 +00001864
wdenkb37c7e52003-06-30 16:24:52 +00001865 eg: #define I2C_SCL(bit) \
wdenk2535d602003-07-17 23:16:40 +00001866 if(bit) immr->im_cpm.cp_pbdat |= PB_SCL; \
wdenkba56f622004-02-06 23:19:44 +00001867 else immr->im_cpm.cp_pbdat &= ~PB_SCL
wdenkb37c7e52003-06-30 16:24:52 +00001868
wdenkc6097192002-11-03 00:24:07 +00001869 I2C_DELAY
1870
1871 This delay is invoked four times per clock cycle so this
1872 controls the rate of data transfer. The data rate thus
wdenkb37c7e52003-06-30 16:24:52 +00001873 is 1 / (I2C_DELAY * 4). Often defined to be something
wdenk945af8d2003-07-16 21:53:01 +00001874 like:
1875
wdenkb37c7e52003-06-30 16:24:52 +00001876 #define I2C_DELAY udelay(2)
wdenkc6097192002-11-03 00:24:07 +00001877
Mike Frysinger793b5722010-07-21 13:38:02 -04001878 CONFIG_SOFT_I2C_GPIO_SCL / CONFIG_SOFT_I2C_GPIO_SDA
1879
1880 If your arch supports the generic GPIO framework (asm/gpio.h),
1881 then you may alternatively define the two GPIOs that are to be
1882 used as SCL / SDA. Any of the previous I2C_xxx macros will
1883 have GPIO-based defaults assigned to them as appropriate.
1884
1885 You should define these to the GPIO value as given directly to
1886 the generic GPIO functions.
1887
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +02001888 CONFIG_SYS_I2C_INIT_BOARD
wdenk47cd00f2003-03-06 13:39:27 +00001889
wdenk8bde7f72003-06-27 21:31:46 +00001890 When a board is reset during an i2c bus transfer
1891 chips might think that the current transfer is still
1892 in progress. On some boards it is possible to access
1893 the i2c SCLK line directly, either by using the
1894 processor pin as a GPIO or by having a second pin
1895 connected to the bus. If this option is defined a
1896 custom i2c_init_board() routine in boards/xxx/board.c
1897 is run early in the boot sequence.
wdenk47cd00f2003-03-06 13:39:27 +00001898
Ben Warrenbb99ad62006-09-07 16:50:54 -04001899 CONFIG_I2C_MULTI_BUS
1900
1901 This option allows the use of multiple I2C buses, each of which
Wolfgang Denkc0f40852011-10-26 10:21:21 +00001902 must have a controller. At any point in time, only one bus is
1903 active. To switch to a different bus, use the 'i2c dev' command.
Ben Warrenbb99ad62006-09-07 16:50:54 -04001904 Note that bus numbering is zero-based.
1905
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +02001906 CONFIG_SYS_I2C_NOPROBES
Ben Warrenbb99ad62006-09-07 16:50:54 -04001907
1908 This option specifies a list of I2C devices that will be skipped
Wolfgang Denkc0f40852011-10-26 10:21:21 +00001909 when the 'i2c probe' command is issued. If CONFIG_I2C_MULTI_BUS
Peter Tyser0f89c542009-04-18 22:34:03 -05001910 is set, specify a list of bus-device pairs. Otherwise, specify
1911 a 1D array of device addresses
Ben Warrenbb99ad62006-09-07 16:50:54 -04001912
1913 e.g.
1914 #undef CONFIG_I2C_MULTI_BUS
Wolfgang Denkc0f40852011-10-26 10:21:21 +00001915 #define CONFIG_SYS_I2C_NOPROBES {0x50,0x68}
Ben Warrenbb99ad62006-09-07 16:50:54 -04001916
1917 will skip addresses 0x50 and 0x68 on a board with one I2C bus
1918
Wolfgang Denkc0f40852011-10-26 10:21:21 +00001919 #define CONFIG_I2C_MULTI_BUS
Simon Glass945a18e2016-10-02 18:01:05 -06001920 #define CONFIG_SYS_I2C_NOPROBES {{0,0x50},{0,0x68},{1,0x54}}
Ben Warrenbb99ad62006-09-07 16:50:54 -04001921
1922 will skip addresses 0x50 and 0x68 on bus 0 and address 0x54 on bus 1
1923
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +02001924 CONFIG_SYS_SPD_BUS_NUM
Timur Tabibe5e6182006-11-03 19:15:00 -06001925
1926 If defined, then this indicates the I2C bus number for DDR SPD.
1927 If not defined, then U-Boot assumes that SPD is on I2C bus 0.
1928
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +02001929 CONFIG_SYS_RTC_BUS_NUM
Stefan Roese0dc018e2007-02-20 10:51:26 +01001930
1931 If defined, then this indicates the I2C bus number for the RTC.
1932 If not defined, then U-Boot assumes that RTC is on I2C bus 0.
1933
Andrew Dyer2ac69852008-12-29 17:36:01 -06001934 CONFIG_SOFT_I2C_READ_REPEATED_START
1935
1936 defining this will force the i2c_read() function in
1937 the soft_i2c driver to perform an I2C repeated start
1938 between writing the address pointer and reading the
1939 data. If this define is omitted the default behaviour
1940 of doing a stop-start sequence will be used. Most I2C
1941 devices can use either method, but some require one or
1942 the other.
Timur Tabibe5e6182006-11-03 19:15:00 -06001943
wdenkc6097192002-11-03 00:24:07 +00001944- SPI Support: CONFIG_SPI
1945
1946 Enables SPI driver (so far only tested with
1947 SPI EEPROM, also an instance works with Crystal A/D and
1948 D/As on the SACSng board)
1949
wdenkc6097192002-11-03 00:24:07 +00001950 CONFIG_SOFT_SPI
1951
wdenk43d96162003-03-06 00:02:04 +00001952 Enables a software (bit-bang) SPI driver rather than
1953 using hardware support. This is a general purpose
1954 driver that only requires three general I/O port pins
1955 (two outputs, one input) to function. If this is
1956 defined, the board configuration must define several
1957 SPI configuration items (port pins to use, etc). For
1958 an example, see include/configs/sacsng.h.
wdenkc6097192002-11-03 00:24:07 +00001959
Ben Warren04a9e112008-01-16 22:37:35 -05001960 CONFIG_HARD_SPI
1961
1962 Enables a hardware SPI driver for general-purpose reads
1963 and writes. As with CONFIG_SOFT_SPI, the board configuration
1964 must define a list of chip-select function pointers.
Wolfgang Denkc0f40852011-10-26 10:21:21 +00001965 Currently supported on some MPC8xxx processors. For an
Ben Warren04a9e112008-01-16 22:37:35 -05001966 example, see include/configs/mpc8349emds.h.
1967
Heiko Schocherf659b572014-07-14 10:22:11 +02001968 CONFIG_SYS_SPI_MXC_WAIT
1969 Timeout for waiting until spi transfer completed.
1970 default: (CONFIG_SYS_HZ/100) /* 10 ms */
1971
Matthias Fuchs01335022007-12-27 17:12:34 +01001972- FPGA Support: CONFIG_FPGA
1973
1974 Enables FPGA subsystem.
1975
1976 CONFIG_FPGA_<vendor>
1977
1978 Enables support for specific chip vendors.
1979 (ALTERA, XILINX)
1980
1981 CONFIG_FPGA_<family>
1982
1983 Enables support for FPGA family.
1984 (SPARTAN2, SPARTAN3, VIRTEX2, CYCLONE2, ACEX1K, ACEX)
1985
1986 CONFIG_FPGA_COUNT
wdenkc6097192002-11-03 00:24:07 +00001987
wdenk43d96162003-03-06 00:02:04 +00001988 Specify the number of FPGA devices to support.
wdenkc6097192002-11-03 00:24:07 +00001989
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +02001990 CONFIG_SYS_FPGA_PROG_FEEDBACK
wdenkc6097192002-11-03 00:24:07 +00001991
wdenk8bde7f72003-06-27 21:31:46 +00001992 Enable printing of hash marks during FPGA configuration.
wdenkc6097192002-11-03 00:24:07 +00001993
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +02001994 CONFIG_SYS_FPGA_CHECK_BUSY
wdenkc6097192002-11-03 00:24:07 +00001995
wdenk43d96162003-03-06 00:02:04 +00001996 Enable checks on FPGA configuration interface busy
1997 status by the configuration function. This option
1998 will require a board or device specific function to
1999 be written.
wdenkc6097192002-11-03 00:24:07 +00002000
2001 CONFIG_FPGA_DELAY
2002
2003 If defined, a function that provides delays in the FPGA
2004 configuration driver.
2005
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +02002006 CONFIG_SYS_FPGA_CHECK_CTRLC
wdenkc6097192002-11-03 00:24:07 +00002007 Allow Control-C to interrupt FPGA configuration
2008
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +02002009 CONFIG_SYS_FPGA_CHECK_ERROR
wdenkc6097192002-11-03 00:24:07 +00002010
wdenk43d96162003-03-06 00:02:04 +00002011 Check for configuration errors during FPGA bitfile
2012 loading. For example, abort during Virtex II
2013 configuration if the INIT_B line goes low (which
2014 indicated a CRC error).
wdenkc6097192002-11-03 00:24:07 +00002015
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +02002016 CONFIG_SYS_FPGA_WAIT_INIT
wdenkc6097192002-11-03 00:24:07 +00002017
Jeremiah Mahlerb445bbb2015-01-04 18:56:50 -08002018 Maximum time to wait for the INIT_B line to de-assert
2019 after PROB_B has been de-asserted during a Virtex II
wdenk43d96162003-03-06 00:02:04 +00002020 FPGA configuration sequence. The default time is 500
Marcel Ziswiler11ccc332008-07-09 08:17:15 +02002021 ms.
wdenkc6097192002-11-03 00:24:07 +00002022
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +02002023 CONFIG_SYS_FPGA_WAIT_BUSY
wdenkc6097192002-11-03 00:24:07 +00002024
Jeremiah Mahlerb445bbb2015-01-04 18:56:50 -08002025 Maximum time to wait for BUSY to de-assert during
Marcel Ziswiler11ccc332008-07-09 08:17:15 +02002026 Virtex II FPGA configuration. The default is 5 ms.
wdenkc6097192002-11-03 00:24:07 +00002027
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +02002028 CONFIG_SYS_FPGA_WAIT_CONFIG
wdenkc6097192002-11-03 00:24:07 +00002029
wdenk43d96162003-03-06 00:02:04 +00002030 Time to wait after FPGA configuration. The default is
Marcel Ziswiler11ccc332008-07-09 08:17:15 +02002031 200 ms.
wdenkc6097192002-11-03 00:24:07 +00002032
2033- Configuration Management:
Stefan Roeseb2b8a692014-10-22 12:13:24 +02002034 CONFIG_BUILD_TARGET
2035
2036 Some SoCs need special image types (e.g. U-Boot binary
2037 with a special header) as build targets. By defining
2038 CONFIG_BUILD_TARGET in the SoC / board header, this
2039 special image will be automatically built upon calling
Simon Glass6de80f22016-07-27 20:33:08 -06002040 make / buildman.
Stefan Roeseb2b8a692014-10-22 12:13:24 +02002041
wdenkc6097192002-11-03 00:24:07 +00002042 CONFIG_IDENT_STRING
2043
wdenk43d96162003-03-06 00:02:04 +00002044 If defined, this string will be added to the U-Boot
2045 version information (U_BOOT_VERSION)
wdenkc6097192002-11-03 00:24:07 +00002046
2047- Vendor Parameter Protection:
2048
wdenk43d96162003-03-06 00:02:04 +00002049 U-Boot considers the values of the environment
2050 variables "serial#" (Board Serial Number) and
wdenk7152b1d2003-09-05 23:19:14 +00002051 "ethaddr" (Ethernet Address) to be parameters that
wdenk43d96162003-03-06 00:02:04 +00002052 are set once by the board vendor / manufacturer, and
2053 protects these variables from casual modification by
2054 the user. Once set, these variables are read-only,
2055 and write or delete attempts are rejected. You can
Marcel Ziswiler11ccc332008-07-09 08:17:15 +02002056 change this behaviour:
wdenkc6097192002-11-03 00:24:07 +00002057
2058 If CONFIG_ENV_OVERWRITE is #defined in your config
2059 file, the write protection for vendor parameters is
wdenk47cd00f2003-03-06 13:39:27 +00002060 completely disabled. Anybody can change or delete
wdenkc6097192002-11-03 00:24:07 +00002061 these parameters.
2062
Joe Hershberger92ac5202015-05-04 14:55:14 -05002063 Alternatively, if you define _both_ an ethaddr in the
2064 default env _and_ CONFIG_OVERWRITE_ETHADDR_ONCE, a default
Marcel Ziswiler11ccc332008-07-09 08:17:15 +02002065 Ethernet address is installed in the environment,
wdenkc6097192002-11-03 00:24:07 +00002066 which can be changed exactly ONCE by the user. [The
2067 serial# is unaffected by this, i. e. it remains
2068 read-only.]
2069
Joe Hershberger25980902012-12-11 22:16:31 -06002070 The same can be accomplished in a more flexible way
2071 for any variable by configuring the type of access
2072 to allow for those variables in the ".flags" variable
2073 or define CONFIG_ENV_FLAGS_LIST_STATIC.
2074
wdenkc6097192002-11-03 00:24:07 +00002075- Protected RAM:
2076 CONFIG_PRAM
2077
2078 Define this variable to enable the reservation of
2079 "protected RAM", i. e. RAM which is not overwritten
2080 by U-Boot. Define CONFIG_PRAM to hold the number of
2081 kB you want to reserve for pRAM. You can overwrite
2082 this default value by defining an environment
2083 variable "pram" to the number of kB you want to
2084 reserve. Note that the board info structure will
2085 still show the full amount of RAM. If pRAM is
2086 reserved, a new environment variable "mem" will
2087 automatically be defined to hold the amount of
2088 remaining RAM in a form that can be passed as boot
2089 argument to Linux, for instance like that:
2090
Wolfgang Denkfe126d82005-11-20 21:40:11 +01002091 setenv bootargs ... mem=\${mem}
wdenkc6097192002-11-03 00:24:07 +00002092 saveenv
2093
2094 This way you can tell Linux not to use this memory,
2095 either, which results in a memory region that will
2096 not be affected by reboots.
2097
2098 *WARNING* If your board configuration uses automatic
2099 detection of the RAM size, you must make sure that
2100 this memory test is non-destructive. So far, the
2101 following board configurations are known to be
2102 "pRAM-clean":
2103
Heiko Schocher5b8e76c2017-06-07 17:33:09 +02002104 IVMS8, IVML24, SPD8xx,
Wolfgang Denk1b0757e2012-10-24 02:36:15 +00002105 HERMES, IP860, RPXlite, LWMON,
Heiko Schocher2eb48ff2017-06-07 17:33:10 +02002106 FLAGADM
wdenkc6097192002-11-03 00:24:07 +00002107
Gabe Black40fef042012-12-02 04:55:18 +00002108- Access to physical memory region (> 4GB)
2109 Some basic support is provided for operations on memory not
2110 normally accessible to U-Boot - e.g. some architectures
2111 support access to more than 4GB of memory on 32-bit
2112 machines using physical address extension or similar.
2113 Define CONFIG_PHYSMEM to access this basic support, which
2114 currently only supports clearing the memory.
2115
wdenkc6097192002-11-03 00:24:07 +00002116- Error Recovery:
wdenkc6097192002-11-03 00:24:07 +00002117 CONFIG_NET_RETRY_COUNT
2118
wdenk43d96162003-03-06 00:02:04 +00002119 This variable defines the number of retries for
2120 network operations like ARP, RARP, TFTP, or BOOTP
2121 before giving up the operation. If not defined, a
2122 default value of 5 is used.
wdenkc6097192002-11-03 00:24:07 +00002123
Guennadi Liakhovetski40cb90e2008-04-03 17:04:19 +02002124 CONFIG_ARP_TIMEOUT
2125
2126 Timeout waiting for an ARP reply in milliseconds.
2127
Tetsuyuki Kobayashi48a3e992012-07-03 22:25:21 +00002128 CONFIG_NFS_TIMEOUT
2129
2130 Timeout in milliseconds used in NFS protocol.
2131 If you encounter "ERROR: Cannot umount" in nfs command,
2132 try longer timeout such as
2133 #define CONFIG_NFS_TIMEOUT 10000UL
2134
wdenkc6097192002-11-03 00:24:07 +00002135- Command Interpreter:
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +02002136 CONFIG_SYS_PROMPT_HUSH_PS2
wdenkc6097192002-11-03 00:24:07 +00002137
2138 This defines the secondary prompt string, which is
2139 printed when the command interpreter needs more input
2140 to complete a command. Usually "> ".
2141
2142 Note:
2143
wdenk8bde7f72003-06-27 21:31:46 +00002144 In the current implementation, the local variables
2145 space and global environment variables space are
2146 separated. Local variables are those you define by
2147 simply typing `name=value'. To access a local
2148 variable later on, you have write `$name' or
2149 `${name}'; to execute the contents of a variable
2150 directly type `$name' at the command prompt.
wdenkc6097192002-11-03 00:24:07 +00002151
wdenk43d96162003-03-06 00:02:04 +00002152 Global environment variables are those you use
2153 setenv/printenv to work with. To run a command stored
2154 in such a variable, you need to use the run command,
2155 and you must not use the '$' sign to access them.
wdenkc6097192002-11-03 00:24:07 +00002156
2157 To store commands and special characters in a
2158 variable, please use double quotation marks
2159 surrounding the whole text of the variable, instead
2160 of the backslashes before semicolons and special
2161 symbols.
2162
Jeremiah Mahlerb445bbb2015-01-04 18:56:50 -08002163- Command Line Editing and History:
Marek Vasutf3b267b2016-01-27 04:47:55 +01002164 CONFIG_CMDLINE_PS_SUPPORT
2165
2166 Enable support for changing the command prompt string
2167 at run-time. Only static string is supported so far.
2168 The string is obtained from environment variables PS1
2169 and PS2.
2170
wdenka8c7c702003-12-06 19:49:23 +00002171- Default Environment:
wdenkc6097192002-11-03 00:24:07 +00002172 CONFIG_EXTRA_ENV_SETTINGS
2173
wdenk43d96162003-03-06 00:02:04 +00002174 Define this to contain any number of null terminated
2175 strings (variable = value pairs) that will be part of
wdenk7152b1d2003-09-05 23:19:14 +00002176 the default environment compiled into the boot image.
wdenk2262cfe2002-11-18 00:14:45 +00002177
wdenk43d96162003-03-06 00:02:04 +00002178 For example, place something like this in your
2179 board's config file:
wdenkc6097192002-11-03 00:24:07 +00002180
2181 #define CONFIG_EXTRA_ENV_SETTINGS \
2182 "myvar1=value1\0" \
2183 "myvar2=value2\0"
2184
wdenk43d96162003-03-06 00:02:04 +00002185 Warning: This method is based on knowledge about the
2186 internal format how the environment is stored by the
2187 U-Boot code. This is NOT an official, exported
2188 interface! Although it is unlikely that this format
wdenk7152b1d2003-09-05 23:19:14 +00002189 will change soon, there is no guarantee either.
wdenkc6097192002-11-03 00:24:07 +00002190 You better know what you are doing here.
2191
wdenk43d96162003-03-06 00:02:04 +00002192 Note: overly (ab)use of the default environment is
2193 discouraged. Make sure to check other ways to preset
Wolfgang Denk74de7ae2009-04-01 23:34:12 +02002194 the environment like the "source" command or the
wdenk43d96162003-03-06 00:02:04 +00002195 boot command first.
wdenkc6097192002-11-03 00:24:07 +00002196
Simon Glass06fd8532012-11-30 13:01:17 +00002197 CONFIG_DELAY_ENVIRONMENT
2198
2199 Normally the environment is loaded when the board is
Jeremiah Mahlerb445bbb2015-01-04 18:56:50 -08002200 initialised so that it is available to U-Boot. This inhibits
Simon Glass06fd8532012-11-30 13:01:17 +00002201 that so that the environment is not available until
2202 explicitly loaded later by U-Boot code. With CONFIG_OF_CONTROL
2203 this is instead controlled by the value of
2204 /config/load-environment.
2205
Eric Nelsonf61ec452012-01-31 10:52:08 -07002206- Serial Flash support
Simon Glass00fd59d2017-08-04 16:35:06 -06002207 Usage requires an initial 'sf probe' to define the serial
Eric Nelsonf61ec452012-01-31 10:52:08 -07002208 flash parameters, followed by read/write/erase/update
2209 commands.
2210
2211 The following defaults may be provided by the platform
2212 to handle the common case when only a single serial
2213 flash is present on the system.
2214
2215 CONFIG_SF_DEFAULT_BUS Bus identifier
2216 CONFIG_SF_DEFAULT_CS Chip-select
2217 CONFIG_SF_DEFAULT_MODE (see include/spi.h)
2218 CONFIG_SF_DEFAULT_SPEED in Hz
2219
wdenk3f85ce22004-02-23 16:11:30 +00002220
Wolfgang Denkecb0ccd2005-09-24 22:37:32 +02002221- TFTP Fixed UDP Port:
2222 CONFIG_TFTP_PORT
2223
Wolfgang Denk28cb9372005-09-24 23:25:46 +02002224 If this is defined, the environment variable tftpsrcp
Wolfgang Denkecb0ccd2005-09-24 22:37:32 +02002225 is used to supply the TFTP UDP source port value.
Wolfgang Denk28cb9372005-09-24 23:25:46 +02002226 If tftpsrcp isn't defined, the normal pseudo-random port
Wolfgang Denkecb0ccd2005-09-24 22:37:32 +02002227 number generator is used.
2228
Wolfgang Denk28cb9372005-09-24 23:25:46 +02002229 Also, the environment variable tftpdstp is used to supply
2230 the TFTP UDP destination port value. If tftpdstp isn't
2231 defined, the normal port 69 is used.
2232
2233 The purpose for tftpsrcp is to allow a TFTP server to
Wolfgang Denkecb0ccd2005-09-24 22:37:32 +02002234 blindly start the TFTP transfer using the pre-configured
2235 target IP address and UDP port. This has the effect of
2236 "punching through" the (Windows XP) firewall, allowing
2237 the remainder of the TFTP transfer to proceed normally.
2238 A better solution is to properly configure the firewall,
2239 but sometimes that is not allowed.
2240
wdenka8c7c702003-12-06 19:49:23 +00002241- Show boot progress:
wdenkc6097192002-11-03 00:24:07 +00002242 CONFIG_SHOW_BOOT_PROGRESS
2243
wdenk43d96162003-03-06 00:02:04 +00002244 Defining this option allows to add some board-
2245 specific code (calling a user-provided function
2246 "show_boot_progress(int)") that enables you to show
2247 the system's boot progress on some display (for
2248 example, some LED's) on your board. At the moment,
2249 the following checkpoints are implemented:
wdenkc6097192002-11-03 00:24:07 +00002250
Simon Glass94fd1312012-09-28 08:56:37 +00002251
Marian Balakowicz1372cce2008-03-12 10:33:01 +01002252Legacy uImage format:
2253
wdenkc6097192002-11-03 00:24:07 +00002254 Arg Where When
2255 1 common/cmd_bootm.c before attempting to boot an image
wdenkba56f622004-02-06 23:19:44 +00002256 -1 common/cmd_bootm.c Image header has bad magic number
wdenkc6097192002-11-03 00:24:07 +00002257 2 common/cmd_bootm.c Image header has correct magic number
wdenkba56f622004-02-06 23:19:44 +00002258 -2 common/cmd_bootm.c Image header has bad checksum
wdenkc6097192002-11-03 00:24:07 +00002259 3 common/cmd_bootm.c Image header has correct checksum
wdenkba56f622004-02-06 23:19:44 +00002260 -3 common/cmd_bootm.c Image data has bad checksum
wdenkc6097192002-11-03 00:24:07 +00002261 4 common/cmd_bootm.c Image data has correct checksum
2262 -4 common/cmd_bootm.c Image is for unsupported architecture
2263 5 common/cmd_bootm.c Architecture check OK
Marian Balakowicz1372cce2008-03-12 10:33:01 +01002264 -5 common/cmd_bootm.c Wrong Image Type (not kernel, multi)
wdenkc6097192002-11-03 00:24:07 +00002265 6 common/cmd_bootm.c Image Type check OK
2266 -6 common/cmd_bootm.c gunzip uncompression error
2267 -7 common/cmd_bootm.c Unimplemented compression type
2268 7 common/cmd_bootm.c Uncompression OK
Marian Balakowicz1372cce2008-03-12 10:33:01 +01002269 8 common/cmd_bootm.c No uncompress/copy overwrite error
wdenkc6097192002-11-03 00:24:07 +00002270 -9 common/cmd_bootm.c Unsupported OS (not Linux, BSD, VxWorks, QNX)
Marian Balakowicz1372cce2008-03-12 10:33:01 +01002271
2272 9 common/image.c Start initial ramdisk verification
2273 -10 common/image.c Ramdisk header has bad magic number
2274 -11 common/image.c Ramdisk header has bad checksum
2275 10 common/image.c Ramdisk header is OK
2276 -12 common/image.c Ramdisk data has bad checksum
2277 11 common/image.c Ramdisk data has correct checksum
2278 12 common/image.c Ramdisk verification complete, start loading
Marcel Ziswiler11ccc332008-07-09 08:17:15 +02002279 -13 common/image.c Wrong Image Type (not PPC Linux ramdisk)
Marian Balakowicz1372cce2008-03-12 10:33:01 +01002280 13 common/image.c Start multifile image verification
2281 14 common/image.c No initial ramdisk, no multifile, continue.
2282
Wolfgang Denkc0f40852011-10-26 10:21:21 +00002283 15 arch/<arch>/lib/bootm.c All preparation done, transferring control to OS
wdenkc6097192002-11-03 00:24:07 +00002284
Stefan Roesea47a12b2010-04-15 16:07:28 +02002285 -30 arch/powerpc/lib/board.c Fatal error, hang the system
wdenk11dadd52004-02-27 00:07:27 +00002286 -31 post/post.c POST test failed, detected by post_output_backlog()
2287 -32 post/post.c POST test failed, detected by post_run_single()
wdenk63e73c92004-02-23 22:22:28 +00002288
Heiko Schocher566a4942007-06-22 19:11:54 +02002289 34 common/cmd_doc.c before loading a Image from a DOC device
2290 -35 common/cmd_doc.c Bad usage of "doc" command
2291 35 common/cmd_doc.c correct usage of "doc" command
2292 -36 common/cmd_doc.c No boot device
2293 36 common/cmd_doc.c correct boot device
2294 -37 common/cmd_doc.c Unknown Chip ID on boot device
2295 37 common/cmd_doc.c correct chip ID found, device available
2296 -38 common/cmd_doc.c Read Error on boot device
2297 38 common/cmd_doc.c reading Image header from DOC device OK
2298 -39 common/cmd_doc.c Image header has bad magic number
2299 39 common/cmd_doc.c Image header has correct magic number
2300 -40 common/cmd_doc.c Error reading Image from DOC device
2301 40 common/cmd_doc.c Image header has correct magic number
2302 41 common/cmd_ide.c before loading a Image from a IDE device
2303 -42 common/cmd_ide.c Bad usage of "ide" command
2304 42 common/cmd_ide.c correct usage of "ide" command
2305 -43 common/cmd_ide.c No boot device
2306 43 common/cmd_ide.c boot device found
2307 -44 common/cmd_ide.c Device not available
2308 44 common/cmd_ide.c Device available
2309 -45 common/cmd_ide.c wrong partition selected
2310 45 common/cmd_ide.c partition selected
2311 -46 common/cmd_ide.c Unknown partition table
2312 46 common/cmd_ide.c valid partition table found
2313 -47 common/cmd_ide.c Invalid partition type
2314 47 common/cmd_ide.c correct partition type
2315 -48 common/cmd_ide.c Error reading Image Header on boot device
2316 48 common/cmd_ide.c reading Image Header from IDE device OK
2317 -49 common/cmd_ide.c Image header has bad magic number
2318 49 common/cmd_ide.c Image header has correct magic number
2319 -50 common/cmd_ide.c Image header has bad checksum
2320 50 common/cmd_ide.c Image header has correct checksum
2321 -51 common/cmd_ide.c Error reading Image from IDE device
2322 51 common/cmd_ide.c reading Image from IDE device OK
2323 52 common/cmd_nand.c before loading a Image from a NAND device
2324 -53 common/cmd_nand.c Bad usage of "nand" command
2325 53 common/cmd_nand.c correct usage of "nand" command
2326 -54 common/cmd_nand.c No boot device
2327 54 common/cmd_nand.c boot device found
2328 -55 common/cmd_nand.c Unknown Chip ID on boot device
2329 55 common/cmd_nand.c correct chip ID found, device available
2330 -56 common/cmd_nand.c Error reading Image Header on boot device
2331 56 common/cmd_nand.c reading Image Header from NAND device OK
2332 -57 common/cmd_nand.c Image header has bad magic number
2333 57 common/cmd_nand.c Image header has correct magic number
2334 -58 common/cmd_nand.c Error reading Image from NAND device
2335 58 common/cmd_nand.c reading Image from NAND device OK
wdenkc6097192002-11-03 00:24:07 +00002336
Heiko Schocher566a4942007-06-22 19:11:54 +02002337 -60 common/env_common.c Environment has a bad CRC, using default
wdenkc6097192002-11-03 00:24:07 +00002338
Marcel Ziswiler11ccc332008-07-09 08:17:15 +02002339 64 net/eth.c starting with Ethernet configuration.
Heiko Schocher566a4942007-06-22 19:11:54 +02002340 -64 net/eth.c no Ethernet found.
2341 65 net/eth.c Ethernet found.
wdenk206c60c2003-09-18 10:02:25 +00002342
Heiko Schocher566a4942007-06-22 19:11:54 +02002343 -80 common/cmd_net.c usage wrong
Joe Hershbergerbc0571f2015-04-08 01:41:21 -05002344 80 common/cmd_net.c before calling net_loop()
2345 -81 common/cmd_net.c some error in net_loop() occurred
2346 81 common/cmd_net.c net_loop() back without error
Heiko Schocher566a4942007-06-22 19:11:54 +02002347 -82 common/cmd_net.c size == 0 (File with size 0 loaded)
2348 82 common/cmd_net.c trying automatic boot
Wolfgang Denk74de7ae2009-04-01 23:34:12 +02002349 83 common/cmd_net.c running "source" command
2350 -83 common/cmd_net.c some error in automatic boot or "source" command
Heiko Schocher566a4942007-06-22 19:11:54 +02002351 84 common/cmd_net.c end without errors
wdenkc6097192002-11-03 00:24:07 +00002352
Marian Balakowicz1372cce2008-03-12 10:33:01 +01002353FIT uImage format:
2354
2355 Arg Where When
2356 100 common/cmd_bootm.c Kernel FIT Image has correct format
2357 -100 common/cmd_bootm.c Kernel FIT Image has incorrect format
2358 101 common/cmd_bootm.c No Kernel subimage unit name, using configuration
2359 -101 common/cmd_bootm.c Can't get configuration for kernel subimage
2360 102 common/cmd_bootm.c Kernel unit name specified
2361 -103 common/cmd_bootm.c Can't get kernel subimage node offset
Marian Balakowiczf773bea2008-03-12 10:35:46 +01002362 103 common/cmd_bootm.c Found configuration node
Marian Balakowicz1372cce2008-03-12 10:33:01 +01002363 104 common/cmd_bootm.c Got kernel subimage node offset
2364 -104 common/cmd_bootm.c Kernel subimage hash verification failed
2365 105 common/cmd_bootm.c Kernel subimage hash verification OK
2366 -105 common/cmd_bootm.c Kernel subimage is for unsupported architecture
2367 106 common/cmd_bootm.c Architecture check OK
Marcel Ziswiler11ccc332008-07-09 08:17:15 +02002368 -106 common/cmd_bootm.c Kernel subimage has wrong type
2369 107 common/cmd_bootm.c Kernel subimage type OK
Marian Balakowicz1372cce2008-03-12 10:33:01 +01002370 -107 common/cmd_bootm.c Can't get kernel subimage data/size
2371 108 common/cmd_bootm.c Got kernel subimage data/size
2372 -108 common/cmd_bootm.c Wrong image type (not legacy, FIT)
2373 -109 common/cmd_bootm.c Can't get kernel subimage type
2374 -110 common/cmd_bootm.c Can't get kernel subimage comp
2375 -111 common/cmd_bootm.c Can't get kernel subimage os
2376 -112 common/cmd_bootm.c Can't get kernel subimage load address
2377 -113 common/cmd_bootm.c Image uncompress/copy overwrite error
2378
2379 120 common/image.c Start initial ramdisk verification
2380 -120 common/image.c Ramdisk FIT image has incorrect format
2381 121 common/image.c Ramdisk FIT image has correct format
Marcel Ziswiler11ccc332008-07-09 08:17:15 +02002382 122 common/image.c No ramdisk subimage unit name, using configuration
Marian Balakowicz1372cce2008-03-12 10:33:01 +01002383 -122 common/image.c Can't get configuration for ramdisk subimage
2384 123 common/image.c Ramdisk unit name specified
2385 -124 common/image.c Can't get ramdisk subimage node offset
2386 125 common/image.c Got ramdisk subimage node offset
2387 -125 common/image.c Ramdisk subimage hash verification failed
2388 126 common/image.c Ramdisk subimage hash verification OK
2389 -126 common/image.c Ramdisk subimage for unsupported architecture
2390 127 common/image.c Architecture check OK
2391 -127 common/image.c Can't get ramdisk subimage data/size
2392 128 common/image.c Got ramdisk subimage data/size
2393 129 common/image.c Can't get ramdisk load address
2394 -129 common/image.c Got ramdisk load address
2395
Marcel Ziswiler11ccc332008-07-09 08:17:15 +02002396 -130 common/cmd_doc.c Incorrect FIT image format
Marian Balakowicz1372cce2008-03-12 10:33:01 +01002397 131 common/cmd_doc.c FIT image format OK
2398
Marcel Ziswiler11ccc332008-07-09 08:17:15 +02002399 -140 common/cmd_ide.c Incorrect FIT image format
Marian Balakowicz1372cce2008-03-12 10:33:01 +01002400 141 common/cmd_ide.c FIT image format OK
2401
Marcel Ziswiler11ccc332008-07-09 08:17:15 +02002402 -150 common/cmd_nand.c Incorrect FIT image format
Marian Balakowicz1372cce2008-03-12 10:33:01 +01002403 151 common/cmd_nand.c FIT image format OK
2404
Wolfgang Denk4cf26092011-10-07 09:58:21 +02002405- Standalone program support:
2406 CONFIG_STANDALONE_LOAD_ADDR
2407
Wolfgang Denk6feff892011-10-09 21:06:34 +02002408 This option defines a board specific value for the
2409 address where standalone program gets loaded, thus
2410 overwriting the architecture dependent default
Wolfgang Denk4cf26092011-10-07 09:58:21 +02002411 settings.
2412
2413- Frame Buffer Address:
2414 CONFIG_FB_ADDR
2415
2416 Define CONFIG_FB_ADDR if you want to use specific
Wolfgang Denk44a53b52013-01-03 00:43:59 +00002417 address for frame buffer. This is typically the case
2418 when using a graphics controller has separate video
2419 memory. U-Boot will then place the frame buffer at
2420 the given address instead of dynamically reserving it
2421 in system RAM by calling lcd_setmem(), which grabs
2422 the memory for the frame buffer depending on the
2423 configured panel size.
Wolfgang Denk4cf26092011-10-07 09:58:21 +02002424
2425 Please see board_init_f function.
2426
Detlev Zundelcccfc2a2009-12-01 17:16:19 +01002427- Automatic software updates via TFTP server
2428 CONFIG_UPDATE_TFTP
2429 CONFIG_UPDATE_TFTP_CNT_MAX
2430 CONFIG_UPDATE_TFTP_MSEC_MAX
2431
2432 These options enable and control the auto-update feature;
2433 for a more detailed description refer to doc/README.update.
2434
2435- MTD Support (mtdparts command, UBI support)
2436 CONFIG_MTD_DEVICE
2437
2438 Adds the MTD device infrastructure from the Linux kernel.
2439 Needed for mtdparts command support.
2440
2441 CONFIG_MTD_PARTITIONS
2442
2443 Adds the MTD partitioning infrastructure from the Linux
2444 kernel. Needed for UBI support.
2445
Joe Hershberger70c219c2013-04-08 10:32:48 +00002446- UBI support
Heiko Schocherff94bc42014-06-24 10:10:04 +02002447 CONFIG_MTD_UBI_WL_THRESHOLD
2448 This parameter defines the maximum difference between the highest
2449 erase counter value and the lowest erase counter value of eraseblocks
2450 of UBI devices. When this threshold is exceeded, UBI starts performing
2451 wear leveling by means of moving data from eraseblock with low erase
2452 counter to eraseblocks with high erase counter.
2453
2454 The default value should be OK for SLC NAND flashes, NOR flashes and
2455 other flashes which have eraseblock life-cycle 100000 or more.
2456 However, in case of MLC NAND flashes which typically have eraseblock
2457 life-cycle less than 10000, the threshold should be lessened (e.g.,
2458 to 128 or 256, although it does not have to be power of 2).
2459
2460 default: 4096
Simon Glassc654b512014-10-23 18:58:54 -06002461
Heiko Schocherff94bc42014-06-24 10:10:04 +02002462 CONFIG_MTD_UBI_BEB_LIMIT
2463 This option specifies the maximum bad physical eraseblocks UBI
2464 expects on the MTD device (per 1024 eraseblocks). If the
2465 underlying flash does not admit of bad eraseblocks (e.g. NOR
2466 flash), this value is ignored.
2467
2468 NAND datasheets often specify the minimum and maximum NVM
2469 (Number of Valid Blocks) for the flashes' endurance lifetime.
2470 The maximum expected bad eraseblocks per 1024 eraseblocks
2471 then can be calculated as "1024 * (1 - MinNVB / MaxNVB)",
2472 which gives 20 for most NANDs (MaxNVB is basically the total
2473 count of eraseblocks on the chip).
2474
2475 To put it differently, if this value is 20, UBI will try to
2476 reserve about 1.9% of physical eraseblocks for bad blocks
2477 handling. And that will be 1.9% of eraseblocks on the entire
2478 NAND chip, not just the MTD partition UBI attaches. This means
2479 that if you have, say, a NAND flash chip admits maximum 40 bad
2480 eraseblocks, and it is split on two MTD partitions of the same
2481 size, UBI will reserve 40 eraseblocks when attaching a
2482 partition.
2483
2484 default: 20
2485
2486 CONFIG_MTD_UBI_FASTMAP
2487 Fastmap is a mechanism which allows attaching an UBI device
2488 in nearly constant time. Instead of scanning the whole MTD device it
2489 only has to locate a checkpoint (called fastmap) on the device.
2490 The on-flash fastmap contains all information needed to attach
2491 the device. Using fastmap makes only sense on large devices where
2492 attaching by scanning takes long. UBI will not automatically install
2493 a fastmap on old images, but you can set the UBI parameter
2494 CONFIG_MTD_UBI_FASTMAP_AUTOCONVERT to 1 if you want so. Please note
2495 that fastmap-enabled images are still usable with UBI implementations