John Rigby | 6895d45 | 2010-01-25 23:12:58 -0700 | [diff] [blame] | 1 | /* |
| 2 | * (C) Copyright 2009 DENX Software Engineering |
| 3 | * Author: John Rigby <jrigby@gmail.com> |
| 4 | * |
| 5 | * Based on imx27lite.c: |
| 6 | * Copyright (C) 2008,2009 Eric Jarrige <jorasse@users.sourceforge.net> |
| 7 | * Copyright (C) 2009 Ilya Yanok <yanok@emcraft.com> |
| 8 | * And: |
| 9 | * RedBoot tx25_misc.c Copyright (C) 2009 Red Hat |
| 10 | * |
| 11 | * This program is free software; you can redistribute it and/or |
| 12 | * modify it under the terms of the GNU General Public License as |
| 13 | * published by the Free Software Foundation; either version 2 of |
| 14 | * the License, or (at your option) any later version. |
| 15 | * |
| 16 | * This program is distributed in the hope that it will be useful, |
| 17 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 18 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 19 | * GNU General Public License for more details. |
| 20 | * |
| 21 | * You should have received a copy of the GNU General Public License |
| 22 | * along with this program; if not, write to the Free Software |
| 23 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, |
| 24 | * MA 02111-1307 USA |
| 25 | * |
| 26 | */ |
| 27 | #include <common.h> |
| 28 | #include <asm/io.h> |
| 29 | #include <asm/arch/imx-regs.h> |
| 30 | #include <asm/arch/imx25-pinmux.h> |
Fabio Estevam | c2205f4 | 2011-08-29 04:27:06 +0000 | [diff] [blame] | 31 | #include <asm/gpio.h> |
Fabio Estevam | e6d9b97 | 2011-09-06 09:05:42 +0000 | [diff] [blame] | 32 | #include <asm/arch/sys_proto.h> |
John Rigby | 6895d45 | 2010-01-25 23:12:58 -0700 | [diff] [blame] | 33 | |
John Rigby | 6895d45 | 2010-01-25 23:12:58 -0700 | [diff] [blame] | 34 | DECLARE_GLOBAL_DATA_PTR; |
| 35 | |
Benoît Thébaudeau | da962b7 | 2013-04-11 09:35:51 +0000 | [diff] [blame] | 36 | #ifdef CONFIG_SPL_BUILD |
| 37 | void board_init_f(ulong bootflag) |
| 38 | { |
Benoît Thébaudeau | 5c6db12 | 2013-04-11 09:35:53 +0000 | [diff] [blame] | 39 | relocate_code(CONFIG_SPL_TEXT_BASE); |
Benoît Thébaudeau | da962b7 | 2013-04-11 09:35:51 +0000 | [diff] [blame] | 40 | asm volatile("ldr pc, =nand_boot"); |
| 41 | } |
| 42 | #endif |
| 43 | |
John Rigby | 6895d45 | 2010-01-25 23:12:58 -0700 | [diff] [blame] | 44 | #ifdef CONFIG_FEC_MXC |
Stefano Babic | 5fecb36 | 2012-08-19 21:33:50 +0000 | [diff] [blame] | 45 | #define GPIO_FEC_RESET_B IMX_GPIO_NR(4, 7) |
| 46 | #define GPIO_FEC_ENABLE_B IMX_GPIO_NR(4, 9) |
Wolfgang Denk | 6e2fbde | 2012-09-02 00:44:09 +0200 | [diff] [blame] | 47 | |
John Rigby | 6895d45 | 2010-01-25 23:12:58 -0700 | [diff] [blame] | 48 | void tx25_fec_init(void) |
| 49 | { |
| 50 | struct iomuxc_mux_ctl *muxctl; |
| 51 | struct iomuxc_pad_ctl *padctl; |
John Rigby | 6895d45 | 2010-01-25 23:12:58 -0700 | [diff] [blame] | 52 | u32 gpio_mux_mode = MX25_PIN_MUX_MODE(5); |
John Rigby | 6895d45 | 2010-01-25 23:12:58 -0700 | [diff] [blame] | 53 | u32 saved_rdata0_mode, saved_rdata1_mode, saved_rx_dv_mode; |
| 54 | |
| 55 | debug("tx25_fec_init\n"); |
| 56 | /* |
| 57 | * fec pin init is generic |
| 58 | */ |
| 59 | mx25_fec_init_pins(); |
| 60 | |
| 61 | /* |
| 62 | * Set up the FEC_RESET_B and FEC_ENABLE GPIO pins. |
| 63 | * |
| 64 | * FEC_RESET_B: gpio4[7] is ALT 5 mode of pin D13 |
| 65 | * FEC_ENABLE_B: gpio4[9] is ALT 5 mode of pin D11 |
| 66 | */ |
| 67 | muxctl = (struct iomuxc_mux_ctl *)IMX_IOPADMUX_BASE; |
| 68 | padctl = (struct iomuxc_pad_ctl *)IMX_IOPADCTL_BASE; |
| 69 | |
| 70 | writel(gpio_mux_mode, &muxctl->pad_d13); |
| 71 | writel(gpio_mux_mode, &muxctl->pad_d11); |
| 72 | |
| 73 | writel(0x0, &padctl->pad_d13); |
| 74 | writel(0x0, &padctl->pad_d11); |
| 75 | |
| 76 | /* drop PHY power and assert reset (low) */ |
Vikram Narayanan | 0989123 | 2012-06-16 07:16:17 +0000 | [diff] [blame] | 77 | gpio_direction_output(GPIO_FEC_RESET_B, 0); |
| 78 | gpio_direction_output(GPIO_FEC_ENABLE_B, 0); |
John Rigby | 6895d45 | 2010-01-25 23:12:58 -0700 | [diff] [blame] | 79 | |
| 80 | mdelay(5); |
| 81 | |
| 82 | debug("resetting phy\n"); |
| 83 | |
| 84 | /* turn on PHY power leaving reset asserted */ |
Vikram Narayanan | 0989123 | 2012-06-16 07:16:17 +0000 | [diff] [blame] | 85 | gpio_set_value(GPIO_FEC_ENABLE_B, 1); |
John Rigby | 6895d45 | 2010-01-25 23:12:58 -0700 | [diff] [blame] | 86 | |
| 87 | mdelay(10); |
| 88 | |
| 89 | /* |
| 90 | * Setup some strapping pins that are latched by the PHY |
| 91 | * as reset goes high. |
| 92 | * |
| 93 | * Set PHY mode to 111 |
| 94 | * mode0 comes from FEC_RDATA0 which is GPIO 3_10 in mux mode 5 |
| 95 | * mode1 comes from FEC_RDATA1 which is GPIO 3_11 in mux mode 5 |
| 96 | * mode2 is tied high so nothing to do |
| 97 | * |
| 98 | * Turn on RMII mode |
| 99 | * RMII mode is selected by FEC_RX_DV which is GPIO 3_12 in mux mode |
| 100 | */ |
| 101 | /* |
| 102 | * save three current mux modes and set each to gpio mode |
| 103 | */ |
| 104 | saved_rdata0_mode = readl(&muxctl->pad_fec_rdata0); |
| 105 | saved_rdata1_mode = readl(&muxctl->pad_fec_rdata1); |
| 106 | saved_rx_dv_mode = readl(&muxctl->pad_fec_rx_dv); |
| 107 | |
| 108 | writel(gpio_mux_mode, &muxctl->pad_fec_rdata0); |
| 109 | writel(gpio_mux_mode, &muxctl->pad_fec_rdata1); |
| 110 | writel(gpio_mux_mode, &muxctl->pad_fec_rx_dv); |
| 111 | |
| 112 | /* |
| 113 | * set each to 1 and make each an output |
| 114 | */ |
Stefano Babic | 5fecb36 | 2012-08-19 21:33:50 +0000 | [diff] [blame] | 115 | gpio_direction_output(IMX_GPIO_NR(3, 10), 1); |
| 116 | gpio_direction_output(IMX_GPIO_NR(3, 11), 1); |
| 117 | gpio_direction_output(IMX_GPIO_NR(3, 12), 1); |
John Rigby | 6895d45 | 2010-01-25 23:12:58 -0700 | [diff] [blame] | 118 | |
| 119 | mdelay(22); /* this value came from RedBoot */ |
| 120 | |
| 121 | /* |
| 122 | * deassert PHY reset |
| 123 | */ |
Vikram Narayanan | 0989123 | 2012-06-16 07:16:17 +0000 | [diff] [blame] | 124 | gpio_set_value(GPIO_FEC_RESET_B, 1); |
John Rigby | 6895d45 | 2010-01-25 23:12:58 -0700 | [diff] [blame] | 125 | |
| 126 | mdelay(5); |
| 127 | |
| 128 | /* |
| 129 | * set FEC pins back |
| 130 | */ |
| 131 | writel(saved_rdata0_mode, &muxctl->pad_fec_rdata0); |
| 132 | writel(saved_rdata1_mode, &muxctl->pad_fec_rdata1); |
| 133 | writel(saved_rx_dv_mode, &muxctl->pad_fec_rx_dv); |
| 134 | } |
| 135 | #else |
| 136 | #define tx25_fec_init() |
| 137 | #endif |
| 138 | |
| 139 | int board_init() |
| 140 | { |
| 141 | #ifdef CONFIG_MXC_UART |
Fabio Estevam | 9aa720b | 2011-03-02 10:14:27 +0100 | [diff] [blame] | 142 | mx25_uart1_init_pins(); |
John Rigby | 6895d45 | 2010-01-25 23:12:58 -0700 | [diff] [blame] | 143 | #endif |
Anatolij Gustschin | 87db58d | 2010-04-21 13:52:38 +0200 | [diff] [blame] | 144 | /* board id for linux */ |
Anatolij Gustschin | 87db58d | 2010-04-21 13:52:38 +0200 | [diff] [blame] | 145 | gd->bd->bi_boot_params = PHYS_SDRAM_1 + 0x100; |
John Rigby | 6895d45 | 2010-01-25 23:12:58 -0700 | [diff] [blame] | 146 | return 0; |
| 147 | } |
| 148 | |
| 149 | int board_late_init(void) |
| 150 | { |
| 151 | tx25_fec_init(); |
| 152 | return 0; |
| 153 | } |
| 154 | |
Fabio Estevam | 77f11a9 | 2011-10-13 05:34:59 +0000 | [diff] [blame] | 155 | int dram_init(void) |
John Rigby | 6895d45 | 2010-01-25 23:12:58 -0700 | [diff] [blame] | 156 | { |
Heiko Schocher | ab86f72 | 2010-09-17 13:10:42 +0200 | [diff] [blame] | 157 | /* dram_init must store complete ramsize in gd->ram_size */ |
Albert ARIBAUD | a55d23c | 2011-07-03 05:55:33 +0000 | [diff] [blame] | 158 | gd->ram_size = get_ram_size((void *)PHYS_SDRAM_1, |
Heiko Schocher | ab86f72 | 2010-09-17 13:10:42 +0200 | [diff] [blame] | 159 | PHYS_SDRAM_1_SIZE); |
| 160 | return 0; |
| 161 | } |
John Rigby | 6895d45 | 2010-01-25 23:12:58 -0700 | [diff] [blame] | 162 | |
Heiko Schocher | ab86f72 | 2010-09-17 13:10:42 +0200 | [diff] [blame] | 163 | void dram_init_banksize(void) |
| 164 | { |
John Rigby | 6895d45 | 2010-01-25 23:12:58 -0700 | [diff] [blame] | 165 | gd->bd->bi_dram[0].start = PHYS_SDRAM_1; |
Albert ARIBAUD | a55d23c | 2011-07-03 05:55:33 +0000 | [diff] [blame] | 166 | gd->bd->bi_dram[0].size = get_ram_size((void *)PHYS_SDRAM_1, |
John Rigby | 6895d45 | 2010-01-25 23:12:58 -0700 | [diff] [blame] | 167 | PHYS_SDRAM_1_SIZE); |
| 168 | #if CONFIG_NR_DRAM_BANKS > 1 |
| 169 | gd->bd->bi_dram[1].start = PHYS_SDRAM_2; |
Albert ARIBAUD | a55d23c | 2011-07-03 05:55:33 +0000 | [diff] [blame] | 170 | gd->bd->bi_dram[1].size = get_ram_size((void *)PHYS_SDRAM_2, |
John Rigby | 6895d45 | 2010-01-25 23:12:58 -0700 | [diff] [blame] | 171 | PHYS_SDRAM_2_SIZE); |
Heiko Schocher | ab86f72 | 2010-09-17 13:10:42 +0200 | [diff] [blame] | 172 | #else |
John Rigby | 6895d45 | 2010-01-25 23:12:58 -0700 | [diff] [blame] | 173 | |
Heiko Schocher | ab86f72 | 2010-09-17 13:10:42 +0200 | [diff] [blame] | 174 | #endif |
John Rigby | 6895d45 | 2010-01-25 23:12:58 -0700 | [diff] [blame] | 175 | } |
| 176 | |
| 177 | int checkboard(void) |
| 178 | { |
| 179 | printf("KARO TX25\n"); |
| 180 | return 0; |
| 181 | } |