blob: d00f528e1fe9ae0edddb8e5f18c506f63d5f1244 [file] [log] [blame]
Stefan Roese4c835a62018-09-05 15:12:35 +02001// SPDX-License-Identifier: GPL-2.0
2
3/ {
4 #address-cells = <1>;
5 #size-cells = <1>;
6 compatible = "ralink,mt7628a-soc";
7
8 cpus {
9 #address-cells = <1>;
10 #size-cells = <0>;
11
12 cpu@0 {
13 compatible = "mti,mips24KEc";
14 device_type = "cpu";
15 reg = <0>;
16 };
17 };
18
19 resetc: reset-controller {
20 compatible = "ralink,rt2880-reset";
21 #reset-cells = <1>;
22 };
23
24 cpuintc: interrupt-controller {
25 #address-cells = <0>;
26 #interrupt-cells = <1>;
27 interrupt-controller;
28 compatible = "mti,cpu-interrupt-controller";
29 };
30
31 palmbus@10000000 {
32 compatible = "palmbus", "simple-bus";
33 reg = <0x10000000 0x200000>;
34 ranges = <0x0 0x10000000 0x1FFFFF>;
35
36 #address-cells = <1>;
37 #size-cells = <1>;
38
39 sysc: system-controller@0 {
40 compatible = "ralink,mt7620a-sysc", "syscon";
41 reg = <0x0 0x100>;
42 };
43
44 intc: interrupt-controller@200 {
45 compatible = "ralink,rt2880-intc";
46 reg = <0x200 0x100>;
47
48 interrupt-controller;
49 #interrupt-cells = <1>;
50
51 resets = <&resetc 9>;
52 reset-names = "intc";
53
54 interrupt-parent = <&cpuintc>;
55 interrupts = <2>;
56
57 ralink,intc-registers = <0x9c 0xa0
58 0x6c 0xa4
59 0x80 0x78>;
60 };
61
62 memory-controller@300 {
63 compatible = "ralink,mt7620a-memc";
64 reg = <0x300 0x100>;
65 };
66
67 spi0: spi@b00 {
68 compatible = "ralink,mt7621-spi";
69 reg = <0xb00 0x40>;
70 #address-cells = <1>;
71 #size-cells = <0>;
72 };
73
74 uart0: uartlite@c00 {
75 compatible = "ns16550a";
76 reg = <0xc00 0x100>;
77
78 resets = <&resetc 12>;
79 reset-names = "uart0";
80
81 interrupt-parent = <&intc>;
82 interrupts = <20>;
83
84 reg-shift = <2>;
85 };
86
87 uart1: uart1@d00 {
88 compatible = "ns16550a";
89 reg = <0xd00 0x100>;
90
91 resets = <&resetc 19>;
92 reset-names = "uart1";
93
94 interrupt-parent = <&intc>;
95 interrupts = <21>;
96
97 reg-shift = <2>;
98 };
99
100 uart2: uart2@e00 {
101 compatible = "ns16550a";
102 reg = <0xe00 0x100>;
103
104 resets = <&resetc 20>;
105 reset-names = "uart2";
106
107 interrupt-parent = <&intc>;
108 interrupts = <22>;
109
110 reg-shift = <2>;
111 };
112 };
113
114 usb_phy: usb-phy@10120000 {
115 compatible = "mediatek,mt7628-usbphy";
116 reg = <0x10120000 0x1000>;
117
118 #phy-cells = <0>;
119
120 ralink,sysctl = <&sysc>;
121 resets = <&resetc 22 &resetc 25>;
122 reset-names = "host", "device";
123 };
124
125 ehci@101c0000 {
126 compatible = "generic-ehci";
127 reg = <0x101c0000 0x1000>;
128
129 phys = <&usb_phy>;
130 phy-names = "usb";
131
132 interrupt-parent = <&intc>;
133 interrupts = <18>;
134 };
135};