blob: dfae4bf64defd63349833462d878027294e06afe [file] [log] [blame]
Kumar Gala69018ce2008-01-17 08:25:45 -06001/*
2 * Copyright 2008 Freescale Semiconductor, Inc.
3 *
4 * (C) Copyright 2000
5 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
6 *
Wolfgang Denk1a459662013-07-08 09:37:19 +02007 * SPDX-License-Identifier: GPL-2.0+
Kumar Gala69018ce2008-01-17 08:25:45 -06008 */
9
10#include <common.h>
11#include <libfdt.h>
12#include <fdt_support.h>
13#include "qe.h"
14
Zhao Qiang93d33202014-09-25 13:52:25 +080015#ifdef CONFIG_QE
Kumar Gala69018ce2008-01-17 08:25:45 -060016DECLARE_GLOBAL_DATA_PTR;
17
18/*
19 * If a QE firmware has been uploaded, then add the 'firmware' node under
20 * the 'qe' node.
21 */
22void fdt_fixup_qe_firmware(void *blob)
23{
24 struct qe_firmware_info *qe_fw_info;
25 int node, ret;
26
27 qe_fw_info = qe_get_firmware_info();
28 if (!qe_fw_info)
29 return;
30
31 node = fdt_path_offset(blob, "/qe");
32 if (node < 0)
33 return;
34
35 /* We assume the node doesn't exist yet */
36 node = fdt_add_subnode(blob, node, "firmware");
37 if (node < 0)
38 return;
39
40 ret = fdt_setprop(blob, node, "extended-modes",
41 &qe_fw_info->extended_modes, sizeof(u64));
42 if (ret < 0)
43 goto error;
44
45 ret = fdt_setprop_string(blob, node, "id", qe_fw_info->id);
46 if (ret < 0)
47 goto error;
48
49 ret = fdt_setprop(blob, node, "virtual-traps", qe_fw_info->vtraps,
50 sizeof(qe_fw_info->vtraps));
51 if (ret < 0)
52 goto error;
53
54 return;
55
56error:
57 fdt_del_node(blob, node);
58}
59
60void ft_qe_setup(void *blob)
61{
Kumar Gala69018ce2008-01-17 08:25:45 -060062 do_fixup_by_prop_u32(blob, "device_type", "qe", 4,
Simon Glass45bae2e2012-12-13 20:48:50 +000063 "bus-frequency", gd->arch.qe_clk, 1);
Kumar Gala69018ce2008-01-17 08:25:45 -060064 do_fixup_by_prop_u32(blob, "device_type", "qe", 4,
Simon Glass1206c182012-12-13 20:48:44 +000065 "brg-frequency", gd->arch.brg_clk, 1);
Kumar Gala69018ce2008-01-17 08:25:45 -060066 do_fixup_by_compat_u32(blob, "fsl,qe",
Simon Glass45bae2e2012-12-13 20:48:50 +000067 "clock-frequency", gd->arch.qe_clk, 1);
Kumar Gala69018ce2008-01-17 08:25:45 -060068 do_fixup_by_compat_u32(blob, "fsl,qe",
Simon Glass45bae2e2012-12-13 20:48:50 +000069 "bus-frequency", gd->arch.qe_clk, 1);
Kumar Gala69018ce2008-01-17 08:25:45 -060070 do_fixup_by_compat_u32(blob, "fsl,qe",
Simon Glass1206c182012-12-13 20:48:44 +000071 "brg-frequency", gd->arch.brg_clk, 1);
Anton Vorontsov3fca8032009-10-15 17:47:16 +040072 do_fixup_by_compat_u32(blob, "fsl,qe-gtm",
Simon Glass45bae2e2012-12-13 20:48:50 +000073 "clock-frequency", gd->arch.qe_clk / 2, 1);
Kumar Gala69018ce2008-01-17 08:25:45 -060074 fdt_fixup_qe_firmware(blob);
Kumar Gala69018ce2008-01-17 08:25:45 -060075}
Zhao Qiang93d33202014-09-25 13:52:25 +080076#endif