blob: 67d72f77fbca50caa17e2b50267625b84c9025b1 [file] [log] [blame]
wdenk2f54faa2002-08-14 10:07:21 +00001/*
2 * (C) Copyright 2000
3 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
4 *
5 * See file CREDITS for list of people who contributed to this
6 * project.
7 *
8 * This program is free software; you can redistribute it and/or
9 * modify it under the terms of the GNU General Public License as
10 * published by the Free Software Foundation; either version 2 of
11 * the License, or (at your option) any later version.
12 *
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
17 *
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
21 * MA 02111-1307 USA
22 */
23
24OUTPUT_ARCH(powerpc)
wdenk2f54faa2002-08-14 10:07:21 +000025/* Do we need any of these for elf?
26 __DYNAMIC = 0; */
27SECTIONS
28{
29 .resetvec 0xFFFFFFFC :
30 {
31 *(.resetvec)
32 } = 0xffff
33
34 /* Read-only sections, merged into text segment: */
35 . = + SIZEOF_HEADERS;
36 .interp : { *(.interp) }
37 .hash : { *(.hash) }
38 .dynsym : { *(.dynsym) }
39 .dynstr : { *(.dynstr) }
40 .rel.text : { *(.rel.text) }
Wolfgang Denk53677ef2008-05-20 16:00:29 +020041 .rela.text : { *(.rela.text) }
wdenk2f54faa2002-08-14 10:07:21 +000042 .rel.data : { *(.rel.data) }
Wolfgang Denk53677ef2008-05-20 16:00:29 +020043 .rela.data : { *(.rela.data) }
44 .rel.rodata : { *(.rel.rodata) }
45 .rela.rodata : { *(.rela.rodata) }
wdenk2f54faa2002-08-14 10:07:21 +000046 .rel.got : { *(.rel.got) }
47 .rela.got : { *(.rela.got) }
48 .rel.ctors : { *(.rel.ctors) }
49 .rela.ctors : { *(.rela.ctors) }
50 .rel.dtors : { *(.rel.dtors) }
51 .rela.dtors : { *(.rela.dtors) }
52 .rel.bss : { *(.rel.bss) }
53 .rela.bss : { *(.rela.bss) }
54 .rel.plt : { *(.rel.plt) }
55 .rela.plt : { *(.rela.plt) }
56 .init : { *(.init) }
57 .plt : { *(.plt) }
58 .text :
59 {
60 /* WARNING - the following is hand-optimized to fit within */
61 /* the sector layout of our flash chips! XXX FIXME XXX */
62
63 cpu/ppc4xx/start.o (.text)
64 cpu/ppc4xx/traps.o (.text)
65 cpu/ppc4xx/interrupts.o (.text)
Stefan Roesee61cb812007-10-22 15:45:49 +020066 cpu/ppc4xx/iop480_uart.o (.text)
wdenk2f54faa2002-08-14 10:07:21 +000067 cpu/ppc4xx/cpu_init.o (.text)
68 cpu/ppc4xx/speed.o (.text)
69 common/dlmalloc.o (.text)
70 lib_ppc/extable.o (.text)
71 lib_ppc/board.o (.text)
72 lib_generic/zlib.o (.text)
73 lib_generic/crc32.o (.text)
74
75 common/cmd_boot.o (.text)
76 common/cmd_bootm.o (.text)
77 common/cmd_flash.o (.text)
78 common/cmd_mem.o (.text)
79 common/cmd_nvedit.o (.text)
80 common/console.o (.text)
81 common/lists.o (.text)
82 common/main.o (.text)
83
84 board/esd/dasa_sim/flash.o (.text)
85 common/cmd_nvedit.o (.text)
86 board/esd/dasa_sim/cmd_dasa_sim.o (.text)
87 net/bootp.o (.text)
88
89 . = env_offset;
90 common/environment.o(.text)
91
92 *(.text)
93 *(.fixup)
94 *(.got1)
95 }
96 _etext = .;
97 PROVIDE (etext = .);
98 .rodata :
99 {
100 *(.rodata)
101 *(.rodata1)
wdenkb783eda2003-06-25 22:26:29 +0000102 *(.rodata.str1.4)
Wolfgang Denk74812662005-12-12 16:06:05 +0100103 *(.eh_frame)
wdenk2f54faa2002-08-14 10:07:21 +0000104 }
105 .fini : { *(.fini) } =0
106 .ctors : { *(.ctors) }
107 .dtors : { *(.dtors) }
108
109 /* Read-write section, merged into data segment: */
110 . = (. + 0x0FFF) & 0xFFFFF000;
111 _erotext = .;
112 PROVIDE (erotext = .);
113 .reloc :
114 {
115 *(.got)
116 _GOT2_TABLE_ = .;
117 *(.got2)
118 _FIXUP_TABLE_ = .;
119 *(.fixup)
120 }
121 __got2_entries = (_FIXUP_TABLE_ - _GOT2_TABLE_) >>2;
122 __fixup_entries = (. - _FIXUP_TABLE_)>>2;
123
124 .data :
125 {
126 *(.data)
127 *(.data1)
128 *(.sdata)
129 *(.sdata2)
130 *(.dynamic)
131 CONSTRUCTORS
132 }
133 _edata = .;
134 PROVIDE (edata = .);
135
Wolfgang Denk807d5d72005-08-31 12:28:00 +0200136 . = .;
wdenk8bde7f72003-06-27 21:31:46 +0000137 __u_boot_cmd_start = .;
138 .u_boot_cmd : { *(.u_boot_cmd) }
139 __u_boot_cmd_end = .;
140
141
Wolfgang Denk807d5d72005-08-31 12:28:00 +0200142 . = .;
wdenk2f54faa2002-08-14 10:07:21 +0000143 __start___ex_table = .;
144 __ex_table : { *(__ex_table) }
145 __stop___ex_table = .;
146
147 . = ALIGN(4096);
148 __init_begin = .;
149 .text.init : { *(.text.init) }
150 .data.init : { *(.data.init) }
151 . = ALIGN(4096);
152 __init_end = .;
153
154 __bss_start = .;
Wolfgang Denk64134f02008-01-12 20:31:39 +0100155 .bss (NOLOAD) :
wdenk2f54faa2002-08-14 10:07:21 +0000156 {
157 *(.sbss) *(.scommon)
158 *(.dynbss)
159 *(.bss)
160 *(COMMON)
161 }
162 _end = . ;
163 PROVIDE (end = .);
164}