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Sergey Kubushync74b2102007-08-10 20:26:18 +02001/*
2 * Copyright (C) 2007 Sergey Kubushyn <ksi@koi8.net>
3 *
4 * This program is free software; you can redistribute it and/or
5 * modify it under the terms of the GNU General Public License as
6 * published by the Free Software Foundation; either version 2 of
7 * the License, or (at your option) any later version.
8 *
9 * This program is distributed in the hope that it will be useful,
10 * but WITHOUT ANY WARRANTY; without even the implied warranty of
11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
12 * GNU General Public License for more details.
13 *
14 * You should have received a copy of the GNU General Public License
15 * along with this program; if not, write to the Free Software
16 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
17 * MA 02111-1307 USA
18 */
19
20#ifndef __CONFIG_H
21#define __CONFIG_H
22#include <asm/sizes.h>
23
24/*
25 * Define this to make U-Boot skip low level initialization when loaded
26 * by initial bootloader. Not required by NAND U-Boot version but IS
27 * required for a NOR version used to burn the real NOR U-Boot into
28 * NOR Flash. NAND and NOR support for DaVinci chips is mutually exclusive
29 * so it is NOT possible to build a U-Boot with both NAND and NOR routines.
30 * NOR U-Boot is loaded directly from Flash so it must perform all the
31 * low level initialization itself. NAND version is loaded by an initial
32 * bootloader (UBL in TI-ese) that performs such an initialization so it's
33 * skipped in NAND version. The third DaVinci boot mode loads a bootloader
34 * via UART0 and that bootloader in turn loads and runs U-Boot (or whatever)
35 * performing low level init prior to loading. All that means we can NOT use
36 * NAND version to put U-Boot into NOR because it doesn't have NOR support and
37 * we can NOT use NOR version because it performs low level initialization
38 * effectively destroying itself in DDR memory. That's why a separate NOR
39 * version with this define is needed. It is loaded via UART, then one uses
40 * it to somehow download a proper NOR version built WITHOUT this define to
41 * RAM (tftp?) and burn it to NOR Flash. I would be probably able to squeeze
42 * NOR support into the initial bootloader so it won't be needed but DaVinci
43 * static RAM might be too small for this (I have something like 2Kbytes left
44 * as of now, without NOR support) so this might've not happened...
45 *
46#define CONFIG_NOR_UART_BOOT
47 */
48
49/*=======*/
50/* Board */
51/*=======*/
52#define DV_EVM
53#define CFG_NAND_SMALLPAGE
54#define CFG_USE_NOR
55/*===================*/
56/* SoC Configuration */
57/*===================*/
58#define CONFIG_ARM926EJS /* arm926ejs CPU core */
59#define CONFIG_SYS_CLK_FREQ 297000000 /* Arm Clock frequency */
60#define CFG_TIMERBASE 0x01c21400 /* use timer 0 */
61#define CFG_HZ_CLOCK 27000000 /* Timer Input clock freq */
62#define CFG_HZ 1000
63/*====================================================*/
64/* EEPROM definitions for Atmel 24C256BN SEEPROM chip */
65/* on Sonata/DV_EVM board. No EEPROM on schmoogie. */
66/*====================================================*/
67#define CFG_I2C_EEPROM_ADDR_LEN 2
68#define CFG_I2C_EEPROM_ADDR 0x50
69#define CFG_EEPROM_PAGE_WRITE_BITS 6
70#define CFG_EEPROM_PAGE_WRITE_DELAY_MS 20
71/*=============*/
72/* Memory Info */
73/*=============*/
74#define CFG_MALLOC_LEN (0x10000 + 128*1024) /* malloc() len */
75#define CFG_GBL_DATA_SIZE 128 /* reserved for initial data */
76#define CFG_MEMTEST_START 0x80000000 /* memtest start address */
77#define CFG_MEMTEST_END 0x81000000 /* 16MB RAM test */
78#define CONFIG_NR_DRAM_BANKS 1 /* we have 1 bank of DRAM */
79#define CONFIG_STACKSIZE (256*1024) /* regular stack */
80#define PHYS_SDRAM_1 0x80000000 /* DDR Start */
81#define PHYS_SDRAM_1_SIZE 0x10000000 /* DDR size 256MB */
82#define DDR_8BANKS /* 8-bank DDR2 (256MB) */
83/*====================*/
84/* Serial Driver info */
85/*====================*/
86#define CFG_NS16550
87#define CFG_NS16550_SERIAL
88#define CFG_NS16550_REG_SIZE 4 /* NS16550 register size */
89#define CFG_NS16550_COM1 0x01c20000 /* Base address of UART0 */
90#define CFG_NS16550_CLK 27000000 /* Input clock to NS16550 */
91#define CONFIG_CONS_INDEX 1 /* use UART0 for console */
92#define CONFIG_BAUDRATE 115200 /* Default baud rate */
93#define CFG_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200 }
94/*===================*/
95/* I2C Configuration */
96/*===================*/
97#define CONFIG_HARD_I2C
98#define CONFIG_DRIVER_DAVINCI_I2C
99#define CFG_I2C_SPEED 80000 /* 100Kbps won't work, silicon bug */
100#define CFG_I2C_SLAVE 10 /* Bogus, master-only in U-Boot */
101/*==================================*/
102/* Network & Ethernet Configuration */
103/*==================================*/
104#define CONFIG_DRIVER_TI_EMAC
105#define CONFIG_MII
106#define CONFIG_BOOTP_DEFAULT
107#define CONFIG_BOOTP_DNS
108#define CONFIG_BOOTP_DNS2
109#define CONFIG_BOOTP_SEND_HOSTNAME
110#define CONFIG_NET_RETRY_COUNT 10
111/*=====================*/
112/* Flash & Environment */
113/*=====================*/
114#ifdef CFG_USE_NAND
115#undef CFG_ENV_IS_IN_FLASH
116#define CFG_NO_FLASH
Wolfgang Denk950a3922008-04-11 15:11:26 +0200117#define CFG_ENV_IS_IN_NAND /* U-Boot env in NAND Flash */
Sergey Kubushync74b2102007-08-10 20:26:18 +0200118#ifdef CFG_NAND_SMALLPAGE
119#define CFG_ENV_SECT_SIZE 512 /* Env sector Size */
120#define CFG_ENV_SIZE SZ_16K
121#else
122#define CFG_ENV_SECT_SIZE 2048 /* Env sector Size */
123#define CFG_ENV_SIZE SZ_128K
124#endif
125#define CONFIG_SKIP_LOWLEVEL_INIT /* U-Boot is loaded by a bootloader */
126#define CONFIG_SKIP_RELOCATE_UBOOT /* to a proper address, init done */
127#define CFG_NAND_BASE 0x02000000
128#define CFG_NAND_HW_ECC
129#define CFG_MAX_NAND_DEVICE 1 /* Max number of NAND devices */
130#define NAND_MAX_CHIPS 1
131#define CFG_ENV_OFFSET 0x0 /* Block 0--not used by bootcode */
132#define DEF_BOOTM ""
133#elif defined(CFG_USE_NOR)
134#ifdef CONFIG_NOR_UART_BOOT
135#define CONFIG_SKIP_LOWLEVEL_INIT /* U-Boot is loaded by a bootloader */
136#define CONFIG_SKIP_RELOCATE_UBOOT /* to a proper address, init done */
137#else
138#undef CONFIG_SKIP_LOWLEVEL_INIT
139#undef CONFIG_SKIP_RELOCATE_UBOOT
140#endif
141#define CFG_ENV_IS_IN_FLASH
Wolfgang Denk950a3922008-04-11 15:11:26 +0200142#undef CFG_NO_FLASH
Sergey Kubushync74b2102007-08-10 20:26:18 +0200143#define CFG_FLASH_CFI_DRIVER
144#define CFG_FLASH_CFI
145#define CFG_MAX_FLASH_BANKS 1 /* max number of flash banks */
Wolfgang Denk950a3922008-04-11 15:11:26 +0200146#define CFG_FLASH_SECT_SZ 0x10000 /* 64KB sect size AMD Flash */
147#define CFG_ENV_OFFSET (CFG_FLASH_SECT_SZ*3)
Wolfgang Denk53677ef2008-05-20 16:00:29 +0200148#define PHYS_FLASH_1 0x02000000 /* CS2 Base address */
Sergey Kubushync74b2102007-08-10 20:26:18 +0200149#define CFG_FLASH_BASE PHYS_FLASH_1 /* Flash Base for U-Boot */
Wolfgang Denk53677ef2008-05-20 16:00:29 +0200150#define PHYS_FLASH_SIZE 0x2000000 /* Flash size 32MB */
Sergey Kubushync74b2102007-08-10 20:26:18 +0200151#define CFG_MAX_FLASH_SECT (PHYS_FLASH_SIZE/CFG_FLASH_SECT_SZ)
152#define CFG_ENV_SECT_SIZE CFG_FLASH_SECT_SZ /* Env sector Size */
153#endif
154/*==============================*/
155/* U-Boot general configuration */
156/*==============================*/
Wolfgang Denk53677ef2008-05-20 16:00:29 +0200157#undef CONFIG_USE_IRQ /* No IRQ/FIQ in U-Boot */
Sergey Kubushync74b2102007-08-10 20:26:18 +0200158#define CONFIG_MISC_INIT_R
Wolfgang Denk950a3922008-04-11 15:11:26 +0200159#undef CONFIG_BOOTDELAY
Sergey Kubushync74b2102007-08-10 20:26:18 +0200160#define CONFIG_BOOTFILE "uImage" /* Boot file name */
161#define CFG_PROMPT "U-Boot > " /* Monitor Command Prompt */
162#define CFG_CBSIZE 1024 /* Console I/O Buffer Size */
163#define CFG_PBSIZE (CFG_CBSIZE+sizeof(CFG_PROMPT)+16) /* Print buffer sz */
164#define CFG_MAXARGS 16 /* max number of command args */
165#define CFG_BARGSIZE CFG_CBSIZE /* Boot Argument Buffer Size */
166#define CFG_LOAD_ADDR 0x80700000 /* default Linux kernel load address */
167#define CONFIG_VERSION_VARIABLE
168#define CONFIG_AUTO_COMPLETE /* Won't work with hush so far, may be later */
169#define CFG_HUSH_PARSER
170#define CFG_PROMPT_HUSH_PS2 "> "
171#define CONFIG_CMDLINE_EDITING
172#define CFG_LONGHELP
173#define CONFIG_CRC32_VERIFY
174#define CONFIG_MX_CYCLIC
175/*===================*/
176/* Linux Information */
177/*===================*/
178#define LINUX_BOOT_PARAM_ADDR 0x80000100
179#define CONFIG_CMDLINE_TAG
180#define CONFIG_SETUP_MEMORY_TAGS
181#define CONFIG_BOOTARGS "mem=120M console=ttyS0,115200n8 root=/dev/hda1 rw noinitrd ip=dhcp"
182#define CONFIG_BOOTCOMMAND "setenv setboot setenv bootargs \\$(bootargs) video=dm64xxfb:output=\\$(videostd);run setboot; bootm 0x2050000"
183/*=================*/
184/* U-Boot commands */
185/*=================*/
186#include <config_cmd_default.h>
187#define CONFIG_CMD_ASKENV
188#define CONFIG_CMD_DHCP
189#define CONFIG_CMD_DIAG
190#define CONFIG_CMD_I2C
191#define CONFIG_CMD_MII
192#define CONFIG_CMD_PING
193#define CONFIG_CMD_SAVES
194#define CONFIG_CMD_EEPROM
195#undef CONFIG_CMD_BDI
196#undef CONFIG_CMD_FPGA
197#undef CONFIG_CMD_SETGETDCR
198#ifdef CFG_USE_NAND
199#undef CONFIG_CMD_FLASH
200#undef CONFIG_CMD_IMLS
201#define CONFIG_CMD_NAND
202#elif defined(CFG_USE_NOR)
203#define CONFIG_CMD_JFFS2
204#else
205#error "Either CFG_USE_NAND or CFG_USE_NOR _MUST_ be defined !!!"
206#endif
207/*=======================*/
208/* KGDB support (if any) */
209/*=======================*/
210#ifdef CONFIG_CMD_KGDB
211#define CONFIG_KGDB_BAUDRATE 115200 /* speed to run kgdb serial port */
212#define CONFIG_KGDB_SER_INDEX 1 /* which serial port to use */
213#endif
214#endif /* __CONFIG_H */