blob: 7a56116d6f123d017a776d5abf3402aa3e905a06 [file] [log] [blame]
Masami Hiramatsu2f1f7972021-06-04 18:44:59 +09001// SPDX-License-Identifier: BSD-2-Clause-Patent
2//
3// Copyright (c) 2021, Linaro Limited. All rights reserved.
4//
5
6/ {
7 aliases {
8 spi_nor = &spi_nor;
9 i2c0 = &i2c0;
10 };
11
12 spi_nor: spi@54800000 {
13 compatible = "socionext,synquacer-spi";
14 reg = <0x00 0x54800000 0x00 0x1000>;
15 interrupts = <0x00 0x9c 0x04 0x00 0x9d 0x04 0x00 0x9e 0x04>;
16 clocks = <&clk_alw_1_8>;
17 clock-names = "iHCLK";
18 socionext,use-rtm;
19 socionext,set-aces;
20 #address-cells = <1>;
21 #size-cells = <0>;
22 status = "okay";
23 active_clk_edges;
24 chipselect_num = <1>;
25
26 spi-flash@0 {
27 #address-cells = <1>;
28 #size-cells = <1>;
29 compatible = "jedec,spi-nor";
30 reg = <0>; /* Chip select 0 */
31 spi-max-frequency = <31250000>;
32 spi-rx-bus-width = <0x1>;
33 spi-tx-bus-width = <0x1>;
Masami Hiramatsu11cd1d62021-07-12 19:36:03 +090034
35 partitions {
36 compatible = "fixed-partitions";
37 #address-cells = <1>;
38 #size-cells = <1>;
39
40 partition@0 {
41 label = "BootStrap-BL1";
42 reg = <0x0 0x70000>;
43 read-only;
44 };
45
46 partition@70000 {
47 label = "Flash-Writer";
48 reg = <0x70000 0x90000>;
49 read-only;
50 };
51
52 partition@100000 {
53 label = "SCP-BL2";
54 reg = <0x100000 0x80000>;
55 read-only;
56 };
57
58 partition@180000 {
59 label = "FIP-TFA";
60 reg = <0x180000 0x78000>;
61 };
62
63 partition@1f8000 {
64 label = "Stage2Tables";
65 reg = <0x1f8000 0x8000>;
66 };
67
68 partition@200000 {
69 label = "U-Boot";
70 reg = <0x200000 0x100000>;
71 };
72
73 partition@300000 {
74 label = "UBoot-Env";
75 reg = <0x300000 0x100000>;
76 };
77
78 partition@500000 {
79 label = "Ex-OPTEE";
80 reg = <0x500000 0x200000>;
81 };
82 };
Masami Hiramatsu2f1f7972021-06-04 18:44:59 +090083 };
84 };
85
86 i2c0: i2c@51200000 {
87 compatible = "socionext,synquacer-i2c";
88 reg = <0x0 0x51200000 0x0 0x1000>;
89 interrupts = <GIC_SPI 164 IRQ_TYPE_LEVEL_HIGH>;
90 clocks = <&clk_i2c>;
91 clock-names = "pclk";
92 clock-frequency = <400000>;
93 #address-cells = <1>;
94 #size-cells = <0>;
95 status = "okay";
96
97 pcf8563: rtc@51 {
98 compatible = "nxp,pcf8563";
99 reg = <0x51>;
100 };
101 };
102
103 firmware {
104 optee {
105 status = "okay";
106 };
107 };
108};
109
110&smmu {
111 status = "okay";
112};
113
114&pcie0 {
115 status = "okay";
116};
117
118&pcie1 {
119 status = "okay";
120};
121
122&sdhci {
123 status = "okay";
124};