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TsiChungLiew1a33ce62007-08-05 04:31:18 -05001/*
2 * (C) Copyright 2000-2003
3 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
4 *
5 * Copyright (C) 2004-2007 Freescale Semiconductor, Inc.
6 * TsiChung Liew (Tsi-Chung.Liew@freescale.com)
7 *
8 * See file CREDITS for list of people who contributed to this
9 * project.
10 *
11 * This program is free software; you can redistribute it and/or
12 * modify it under the terms of the GNU General Public License as
13 * published by the Free Software Foundation; either version 2 of
14 * the License, or (at your option) any later version.
15 *
16 * This program is distributed in the hope that it will be useful,
17 * but WITHOUT ANY WARRANTY; without even the implied warranty of
18 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
19 * GNU General Public License for more details.
20 *
21 * You should have received a copy of the GNU General Public License
22 * along with this program; if not, write to the Free Software
23 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
24 * MA 02111-1307 USA
25 */
26
27#include <config.h>
28#include <common.h>
29#include <asm/io.h>
30#include <asm/immap.h>
31
32DECLARE_GLOBAL_DATA_PTR;
33
TsiChungLiewab77bc52007-08-15 15:39:17 -050034#if defined(CONFIG_CMD_NAND)
TsiChungLiew1a33ce62007-08-05 04:31:18 -050035#include <nand.h>
36#include <linux/mtd/mtd.h>
37
Stefan Roese3ba4c2d2007-08-08 09:54:26 +020038#define SET_CLE 0x10
Stefan Roese3ba4c2d2007-08-08 09:54:26 +020039#define SET_ALE 0x08
TsiChungLiew1a33ce62007-08-05 04:31:18 -050040
TsiChung Liewe4f69d12008-10-24 12:59:12 +000041static void nand_hwcontrol(struct mtd_info *mtdinfo, int cmd, unsigned int ctrl)
TsiChungLiew1a33ce62007-08-05 04:31:18 -050042{
Stefan Roese3ba4c2d2007-08-08 09:54:26 +020043 struct nand_chip *this = mtdinfo->priv;
TsiChung Liewe4f69d12008-10-24 12:59:12 +000044 volatile u16 *nCE = (u16 *) CONFIG_SYS_LATCH_ADDR;
TsiChungLiew1a33ce62007-08-05 04:31:18 -050045
William Juulcfa460a2007-10-31 13:53:06 +010046 if (ctrl & NAND_CTRL_CHANGE) {
TsiChung Liewe4f69d12008-10-24 12:59:12 +000047 ulong IO_ADDR_W = (ulong) this->IO_ADDR_W;
48
49 IO_ADDR_W &= ~(SET_ALE | SET_CLE);
TsiChung Liewe4f69d12008-10-24 12:59:12 +000050
51 if (ctrl & NAND_NCE)
TsiChung Liew9017d932009-03-02 19:16:45 +000052 *nCE &= 0xFFFB;
53 else
TsiChung Liewe4f69d12008-10-24 12:59:12 +000054 *nCE |= 0x0004;
TsiChung Liew9017d932009-03-02 19:16:45 +000055
TsiChung Liewe4f69d12008-10-24 12:59:12 +000056 if (ctrl & NAND_CLE)
57 IO_ADDR_W |= SET_CLE;
58 if (ctrl & NAND_ALE)
59 IO_ADDR_W |= SET_ALE;
60
61 this->IO_ADDR_W = (void *)IO_ADDR_W;
Stefan Roese3ba4c2d2007-08-08 09:54:26 +020062 }
William Juulcfa460a2007-10-31 13:53:06 +010063
64 if (cmd != NAND_CMD_NONE)
65 writeb(cmd, this->IO_ADDR_W);
TsiChungLiew1a33ce62007-08-05 04:31:18 -050066}
67
TsiChungLiew1a33ce62007-08-05 04:31:18 -050068int board_nand_init(struct nand_chip *nand)
69{
Stefan Roese3ba4c2d2007-08-08 09:54:26 +020070 volatile gpio_t *gpio = (gpio_t *) MMAP_GPIO;
TsiChungLiew1a33ce62007-08-05 04:31:18 -050071
TsiChung Liewe4f69d12008-10-24 12:59:12 +000072 /*
73 * set up pin configuration - enabled 2nd output buffer's signals
74 * (nand_ngpio - nCE USB1/2_PWR_EN, LATCH_GPIOs, LCD_VEEEN, etc)
75 * to use nCE signal
76 */
Stefan Roese3ba4c2d2007-08-08 09:54:26 +020077 gpio->par_timer &= ~GPIO_PAR_TIN3_TIN3;
78 gpio->pddr_timer |= 0x08;
79 gpio->ppd_timer |= 0x08;
80 gpio->pclrr_timer = 0;
81 gpio->podr_timer = 0;
TsiChungLiew1a33ce62007-08-05 04:31:18 -050082
TsiChung Liew9017d932009-03-02 19:16:45 +000083 nand->chip_delay = 60;
William Juulcfa460a2007-10-31 13:53:06 +010084 nand->ecc.mode = NAND_ECC_SOFT;
85 nand->cmd_ctrl = nand_hwcontrol;
TsiChungLiew1a33ce62007-08-05 04:31:18 -050086
Stefan Roese3ba4c2d2007-08-08 09:54:26 +020087 return 0;
TsiChungLiew1a33ce62007-08-05 04:31:18 -050088}
89#endif