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wdenkc6097192002-11-03 00:24:07 +00001#
Wolfgang Denkeca3aeb2013-06-21 10:22:36 +02002# (C) Copyright 2000 - 2013
wdenkc6097192002-11-03 00:24:07 +00003# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
4#
Wolfgang Denkeca3aeb2013-06-21 10:22:36 +02005# SPDX-License-Identifier: GPL-2.0+
wdenkc6097192002-11-03 00:24:07 +00006#
7
8Summary:
9========
10
wdenk24ee89b2002-11-03 17:56:27 +000011This directory contains the source code for U-Boot, a boot loader for
wdenke86e5a02004-10-17 21:12:06 +000012Embedded boards based on PowerPC, ARM, MIPS and several other
13processors, which can be installed in a boot ROM and used to
14initialize and test the hardware or to download and run application
15code.
wdenkc6097192002-11-03 00:24:07 +000016
17The development of U-Boot is closely related to Linux: some parts of
wdenk24ee89b2002-11-03 17:56:27 +000018the source code originate in the Linux source tree, we have some
19header files in common, and special provision has been made to
wdenkc6097192002-11-03 00:24:07 +000020support booting of Linux images.
21
22Some attention has been paid to make this software easily
23configurable and extendable. For instance, all monitor commands are
24implemented with the same call interface, so that it's very easy to
25add new commands. Also, instead of permanently adding rarely used
26code (for instance hardware test utilities) to the monitor, you can
27load and run it dynamically.
28
29
30Status:
31=======
32
33In general, all boards for which a configuration option exists in the
wdenk24ee89b2002-11-03 17:56:27 +000034Makefile have been tested to some extent and can be considered
wdenkc6097192002-11-03 00:24:07 +000035"working". In fact, many of them are used in production systems.
36
wdenk24ee89b2002-11-03 17:56:27 +000037In case of problems see the CHANGELOG and CREDITS files to find out
Albert ARIBAUD27af9302013-09-11 15:52:51 +020038who contributed the specific port. The boards.cfg file lists board
Wolfgang Denk218ca722008-03-26 10:40:12 +010039maintainers.
wdenkc6097192002-11-03 00:24:07 +000040
Robert P. J. Dayadb9d852012-11-14 02:03:20 +000041Note: There is no CHANGELOG file in the actual U-Boot source tree;
42it can be created dynamically from the Git log using:
43
44 make CHANGELOG
45
wdenkc6097192002-11-03 00:24:07 +000046
47Where to get help:
48==================
49
wdenk24ee89b2002-11-03 17:56:27 +000050In case you have questions about, problems with or contributions for
51U-Boot you should send a message to the U-Boot mailing list at
Peter Tyser0c325652008-09-10 09:18:34 -050052<u-boot@lists.denx.de>. There is also an archive of previous traffic
53on the mailing list - please search the archive before asking FAQ's.
54Please see http://lists.denx.de/pipermail/u-boot and
55http://dir.gmane.org/gmane.comp.boot-loaders.u-boot
wdenkc6097192002-11-03 00:24:07 +000056
57
Wolfgang Denk218ca722008-03-26 10:40:12 +010058Where to get source code:
59=========================
60
61The U-Boot source code is maintained in the git repository at
62git://www.denx.de/git/u-boot.git ; you can browse it online at
63http://www.denx.de/cgi-bin/gitweb.cgi?p=u-boot.git;a=summary
64
65The "snapshot" links on this page allow you to download tarballs of
Marcel Ziswiler11ccc332008-07-09 08:17:15 +020066any version you might be interested in. Official releases are also
Wolfgang Denk218ca722008-03-26 10:40:12 +010067available for FTP download from the ftp://ftp.denx.de/pub/u-boot/
68directory.
69
Anatolij Gustschind4ee7112008-03-26 18:13:33 +010070Pre-built (and tested) images are available from
Wolfgang Denk218ca722008-03-26 10:40:12 +010071ftp://ftp.denx.de/pub/u-boot/images/
72
73
wdenkc6097192002-11-03 00:24:07 +000074Where we come from:
75===================
76
77- start from 8xxrom sources
wdenk24ee89b2002-11-03 17:56:27 +000078- create PPCBoot project (http://sourceforge.net/projects/ppcboot)
wdenkc6097192002-11-03 00:24:07 +000079- clean up code
80- make it easier to add custom boards
81- make it possible to add other [PowerPC] CPUs
82- extend functions, especially:
83 * Provide extended interface to Linux boot loader
84 * S-Record download
85 * network boot
Marcel Ziswiler11ccc332008-07-09 08:17:15 +020086 * PCMCIA / CompactFlash / ATA disk / SCSI ... boot
wdenk24ee89b2002-11-03 17:56:27 +000087- create ARMBoot project (http://sourceforge.net/projects/armboot)
wdenkc6097192002-11-03 00:24:07 +000088- add other CPU families (starting with ARM)
wdenk24ee89b2002-11-03 17:56:27 +000089- create U-Boot project (http://sourceforge.net/projects/u-boot)
Magnus Lilja0d28f342008-08-06 19:32:33 +020090- current project page: see http://www.denx.de/wiki/U-Boot
wdenk24ee89b2002-11-03 17:56:27 +000091
92
93Names and Spelling:
94===================
95
96The "official" name of this project is "Das U-Boot". The spelling
97"U-Boot" shall be used in all written text (documentation, comments
98in source files etc.). Example:
99
100 This is the README file for the U-Boot project.
101
102File names etc. shall be based on the string "u-boot". Examples:
103
104 include/asm-ppc/u-boot.h
105
106 #include <asm/u-boot.h>
107
108Variable names, preprocessor constants etc. shall be either based on
109the string "u_boot" or on "U_BOOT". Example:
110
111 U_BOOT_VERSION u_boot_logo
112 IH_OS_U_BOOT u_boot_hush_start
wdenkc6097192002-11-03 00:24:07 +0000113
114
wdenk93f19cc2002-12-17 17:55:09 +0000115Versioning:
116===========
117
Thomas Weber360d8832010-09-28 08:06:25 +0200118Starting with the release in October 2008, the names of the releases
119were changed from numerical release numbers without deeper meaning
120into a time stamp based numbering. Regular releases are identified by
121names consisting of the calendar year and month of the release date.
122Additional fields (if present) indicate release candidates or bug fix
123releases in "stable" maintenance trees.
wdenk93f19cc2002-12-17 17:55:09 +0000124
Thomas Weber360d8832010-09-28 08:06:25 +0200125Examples:
Wolfgang Denkc0f40852011-10-26 10:21:21 +0000126 U-Boot v2009.11 - Release November 2009
Thomas Weber360d8832010-09-28 08:06:25 +0200127 U-Boot v2009.11.1 - Release 1 in version November 2009 stable tree
128 U-Boot v2010.09-rc1 - Release candiate 1 for September 2010 release
wdenk93f19cc2002-12-17 17:55:09 +0000129
130
wdenkc6097192002-11-03 00:24:07 +0000131Directory Hierarchy:
132====================
133
Peter Tyser8d321b82010-04-12 22:28:21 -0500134/arch Architecture specific files
Masahiro Yamada6eae68e2014-03-07 18:02:02 +0900135 /arc Files generic to ARC architecture
136 /cpu CPU specific files
137 /arc700 Files specific to ARC 700 CPUs
138 /lib Architecture specific library files
Peter Tyser8d321b82010-04-12 22:28:21 -0500139 /arm Files generic to ARM architecture
140 /cpu CPU specific files
141 /arm720t Files specific to ARM 720 CPUs
142 /arm920t Files specific to ARM 920 CPUs
Andreas Bießmann6eb09212011-07-18 09:41:08 +0000143 /at91 Files specific to Atmel AT91RM9200 CPU
Wolfgang Denka9046b92010-06-13 17:48:15 +0200144 /imx Files specific to Freescale MC9328 i.MX CPUs
145 /s3c24x0 Files specific to Samsung S3C24X0 CPUs
Peter Tyser8d321b82010-04-12 22:28:21 -0500146 /arm926ejs Files specific to ARM 926 CPUs
147 /arm1136 Files specific to ARM 1136 CPUs
Peter Tyser8d321b82010-04-12 22:28:21 -0500148 /pxa Files specific to Intel XScale PXA CPUs
Peter Tyser8d321b82010-04-12 22:28:21 -0500149 /sa1100 Files specific to Intel StrongARM SA1100 CPUs
150 /lib Architecture specific library files
151 /avr32 Files generic to AVR32 architecture
152 /cpu CPU specific files
153 /lib Architecture specific library files
154 /blackfin Files generic to Analog Devices Blackfin architecture
155 /cpu CPU specific files
156 /lib Architecture specific library files
Peter Tyser8d321b82010-04-12 22:28:21 -0500157 /m68k Files generic to m68k architecture
158 /cpu CPU specific files
159 /mcf52x2 Files specific to Freescale ColdFire MCF52x2 CPUs
160 /mcf5227x Files specific to Freescale ColdFire MCF5227x CPUs
161 /mcf532x Files specific to Freescale ColdFire MCF5329 CPUs
162 /mcf5445x Files specific to Freescale ColdFire MCF5445x CPUs
163 /mcf547x_8x Files specific to Freescale ColdFire MCF547x_8x CPUs
164 /lib Architecture specific library files
165 /microblaze Files generic to microblaze architecture
166 /cpu CPU specific files
167 /lib Architecture specific library files
168 /mips Files generic to MIPS architecture
169 /cpu CPU specific files
Daniel Schwierzeck92bbd642011-07-27 13:22:39 +0200170 /mips32 Files specific to MIPS32 CPUs
Masahiro Yamada6eae68e2014-03-07 18:02:02 +0900171 /mips64 Files specific to MIPS64 CPUs
Peter Tyser8d321b82010-04-12 22:28:21 -0500172 /lib Architecture specific library files
Macpaul Linafc1ce82011-10-19 20:41:11 +0000173 /nds32 Files generic to NDS32 architecture
174 /cpu CPU specific files
175 /n1213 Files specific to Andes Technology N1213 CPUs
176 /lib Architecture specific library files
Peter Tyser8d321b82010-04-12 22:28:21 -0500177 /nios2 Files generic to Altera NIOS2 architecture
178 /cpu CPU specific files
179 /lib Architecture specific library files
Robert P. J. Day33c77312013-09-15 18:34:15 -0400180 /openrisc Files generic to OpenRISC architecture
181 /cpu CPU specific files
182 /lib Architecture specific library files
Stefan Roesea47a12b2010-04-15 16:07:28 +0200183 /powerpc Files generic to PowerPC architecture
Peter Tyser8d321b82010-04-12 22:28:21 -0500184 /cpu CPU specific files
185 /74xx_7xx Files specific to Freescale MPC74xx and 7xx CPUs
186 /mpc5xx Files specific to Freescale MPC5xx CPUs
187 /mpc5xxx Files specific to Freescale MPC5xxx CPUs
188 /mpc8xx Files specific to Freescale MPC8xx CPUs
Peter Tyser8d321b82010-04-12 22:28:21 -0500189 /mpc824x Files specific to Freescale MPC824x CPUs
190 /mpc8260 Files specific to Freescale MPC8260 CPUs
191 /mpc85xx Files specific to Freescale MPC85xx CPUs
192 /ppc4xx Files specific to AMCC PowerPC 4xx CPUs
193 /lib Architecture specific library files
194 /sh Files generic to SH architecture
195 /cpu CPU specific files
196 /sh2 Files specific to sh2 CPUs
197 /sh3 Files specific to sh3 CPUs
198 /sh4 Files specific to sh4 CPUs
199 /lib Architecture specific library files
200 /sparc Files generic to SPARC architecture
201 /cpu CPU specific files
202 /leon2 Files specific to Gaisler LEON2 SPARC CPU
203 /leon3 Files specific to Gaisler LEON3 SPARC CPU
204 /lib Architecture specific library files
Robert P. J. Day33c77312013-09-15 18:34:15 -0400205 /x86 Files generic to x86 architecture
206 /cpu CPU specific files
207 /lib Architecture specific library files
Peter Tyser8d321b82010-04-12 22:28:21 -0500208/api Machine/arch independent API for external apps
209/board Board dependent files
210/common Misc architecture independent functions
211/disk Code for disk drive partition handling
212/doc Documentation (don't expect too much)
213/drivers Commonly used device drivers
Robert P. J. Day33c77312013-09-15 18:34:15 -0400214/dts Contains Makefile for building internal U-Boot fdt.
Peter Tyser8d321b82010-04-12 22:28:21 -0500215/examples Example code for standalone applications, etc.
216/fs Filesystem code (cramfs, ext2, jffs2, etc.)
217/include Header Files
218/lib Files generic to all architectures
219 /libfdt Library files to support flattened device trees
220 /lzma Library files to support LZMA decompression
221 /lzo Library files to support LZO decompression
222/net Networking code
223/post Power On Self Test
Robert P. J. Day33c77312013-09-15 18:34:15 -0400224/spl Secondary Program Loader framework
Peter Tyser8d321b82010-04-12 22:28:21 -0500225/tools Tools to build S-Record or U-Boot images, etc.
wdenkc6097192002-11-03 00:24:07 +0000226
wdenkc6097192002-11-03 00:24:07 +0000227Software Configuration:
228=======================
229
230Configuration is usually done using C preprocessor defines; the
231rationale behind that is to avoid dead code whenever possible.
232
233There are two classes of configuration variables:
234
235* Configuration _OPTIONS_:
236 These are selectable by the user and have names beginning with
237 "CONFIG_".
238
239* Configuration _SETTINGS_:
240 These depend on the hardware etc. and should not be meddled with if
241 you don't know what you're doing; they have names beginning with
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200242 "CONFIG_SYS_".
wdenkc6097192002-11-03 00:24:07 +0000243
244Later we will add a configuration tool - probably similar to or even
245identical to what's used for the Linux kernel. Right now, we have to
246do the configuration by hand, which means creating some symbolic
247links and editing some configuration files. We use the TQM8xxL boards
248as an example here.
249
250
251Selection of Processor Architecture and Board Type:
252---------------------------------------------------
253
254For all supported boards there are ready-to-use default
Holger Freytherab584d62014-08-04 09:26:05 +0200255configurations available; just type "make <board_name>_defconfig".
wdenkc6097192002-11-03 00:24:07 +0000256
257Example: For a TQM823L module type:
258
259 cd u-boot
Holger Freytherab584d62014-08-04 09:26:05 +0200260 make TQM823L_defconfig
wdenkc6097192002-11-03 00:24:07 +0000261
Marcel Ziswiler11ccc332008-07-09 08:17:15 +0200262For the Cogent platform, you need to specify the CPU type as well;
Holger Freytherab584d62014-08-04 09:26:05 +0200263e.g. "make cogent_mpc8xx_defconfig". And also configure the cogent
wdenkc6097192002-11-03 00:24:07 +0000264directory according to the instructions in cogent/README.
265
266
Simon Glass75b3c3a2014-03-22 17:12:59 -0600267Sandbox Environment:
268--------------------
269
270U-Boot can be built natively to run on a Linux host using the 'sandbox'
271board. This allows feature development which is not board- or architecture-
272specific to be undertaken on a native platform. The sandbox is also used to
273run some of U-Boot's tests.
274
Jagannadha Sutradharudu Teki6b1978f2014-08-31 21:19:43 +0530275See board/sandbox/README.sandbox for more details.
Simon Glass75b3c3a2014-03-22 17:12:59 -0600276
277
wdenkc6097192002-11-03 00:24:07 +0000278Configuration Options:
279----------------------
280
281Configuration depends on the combination of board and CPU type; all
282such information is kept in a configuration file
283"include/configs/<board_name>.h".
284
285Example: For a TQM823L module, all configuration settings are in
286"include/configs/TQM823L.h".
287
288
wdenk7f6c2cb2002-11-10 22:06:23 +0000289Many of the options are named exactly as the corresponding Linux
290kernel configuration options. The intention is to make it easier to
291build a config tool - later.
292
293
wdenkc6097192002-11-03 00:24:07 +0000294The following options need to be configured:
295
Kim Phillips26281142007-08-10 13:28:25 -0500296- CPU Type: Define exactly one, e.g. CONFIG_MPC85XX.
wdenkc6097192002-11-03 00:24:07 +0000297
Kim Phillips26281142007-08-10 13:28:25 -0500298- Board Type: Define exactly one, e.g. CONFIG_MPC8540ADS.
Wolfgang Denk6ccec442006-10-24 14:42:37 +0200299
300- CPU Daughterboard Type: (if CONFIG_ATSTK1000 is defined)
Haavard Skinnemoen09ea0de2007-11-01 12:44:20 +0100301 Define exactly one, e.g. CONFIG_ATSTK1002
wdenkc6097192002-11-03 00:24:07 +0000302
303- CPU Module Type: (if CONFIG_COGENT is defined)
304 Define exactly one of
305 CONFIG_CMA286_60_OLD
306--- FIXME --- not tested yet:
307 CONFIG_CMA286_60, CONFIG_CMA286_21, CONFIG_CMA286_60P,
308 CONFIG_CMA287_23, CONFIG_CMA287_50
309
310- Motherboard Type: (if CONFIG_COGENT is defined)
311 Define exactly one of
312 CONFIG_CMA101, CONFIG_CMA102
313
314- Motherboard I/O Modules: (if CONFIG_COGENT is defined)
315 Define one or more of
316 CONFIG_CMA302
317
318- Motherboard Options: (if CONFIG_CMA101 or CONFIG_CMA102 are defined)
319 Define one or more of
320 CONFIG_LCD_HEARTBEAT - update a character position on
Marcel Ziswiler11ccc332008-07-09 08:17:15 +0200321 the LCD display every second with
wdenkc6097192002-11-03 00:24:07 +0000322 a "rotator" |\-/|\-/
323
Lei Wencf946c62011-02-09 18:06:58 +0530324- Marvell Family Member
325 CONFIG_SYS_MVFS - define it if you want to enable
326 multiple fs option at one time
327 for marvell soc family
328
wdenkc6097192002-11-03 00:24:07 +0000329- MPC824X Family Member (if CONFIG_MPC824X is defined)
wdenk5da627a2003-10-09 20:09:04 +0000330 Define exactly one of
331 CONFIG_MPC8240, CONFIG_MPC8245
wdenkc6097192002-11-03 00:24:07 +0000332
Marcel Ziswiler11ccc332008-07-09 08:17:15 +0200333- 8xx CPU Options: (if using an MPC8xx CPU)
wdenk66ca92a2004-09-28 17:59:53 +0000334 CONFIG_8xx_GCLK_FREQ - deprecated: CPU clock if
335 get_gclk_freq() cannot work
wdenk5da627a2003-10-09 20:09:04 +0000336 e.g. if there is no 32KHz
337 reference PIT/RTC clock
wdenk66ca92a2004-09-28 17:59:53 +0000338 CONFIG_8xx_OSCLK - PLL input clock (either EXTCLK
339 or XTAL/EXTAL)
wdenkc6097192002-11-03 00:24:07 +0000340
wdenk66ca92a2004-09-28 17:59:53 +0000341- 859/866/885 CPU options: (if using a MPC859 or MPC866 or MPC885 CPU):
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200342 CONFIG_SYS_8xx_CPUCLK_MIN
343 CONFIG_SYS_8xx_CPUCLK_MAX
wdenk66ca92a2004-09-28 17:59:53 +0000344 CONFIG_8xx_CPUCLK_DEFAULT
wdenk75d1ea72004-01-31 20:06:54 +0000345 See doc/README.MPC866
346
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200347 CONFIG_SYS_MEASURE_CPUCLK
wdenk75d1ea72004-01-31 20:06:54 +0000348
wdenkba56f622004-02-06 23:19:44 +0000349 Define this to measure the actual CPU clock instead
350 of relying on the correctness of the configured
351 values. Mostly useful for board bringup to make sure
352 the PLL is locked at the intended frequency. Note
353 that this requires a (stable) reference clock (32 kHz
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200354 RTC clock or CONFIG_SYS_8XX_XIN)
wdenk75d1ea72004-01-31 20:06:54 +0000355
Heiko Schocher506f3912009-03-12 07:37:15 +0100356 CONFIG_SYS_DELAYED_ICACHE
357
358 Define this option if you want to enable the
359 ICache only when Code runs from RAM.
360
Kumar Gala66412c62011-02-18 05:40:54 -0600361- 85xx CPU Options:
York Sunffd06e02012-10-08 07:44:30 +0000362 CONFIG_SYS_PPC64
363
364 Specifies that the core is a 64-bit PowerPC implementation (implements
365 the "64" category of the Power ISA). This is necessary for ePAPR
366 compliance, among other possible reasons.
367
Kumar Gala66412c62011-02-18 05:40:54 -0600368 CONFIG_SYS_FSL_TBCLK_DIV
369
370 Defines the core time base clock divider ratio compared to the
371 system clock. On most PQ3 devices this is 8, on newer QorIQ
372 devices it can be 16 or 32. The ratio varies from SoC to Soc.
373
Kumar Gala8f290842011-05-20 00:39:21 -0500374 CONFIG_SYS_FSL_PCIE_COMPAT
375
376 Defines the string to utilize when trying to match PCIe device
377 tree nodes for the given platform.
378
Prabhakar Kushwahaafa6b552012-04-29 23:56:13 +0000379 CONFIG_SYS_PPC_E500_DEBUG_TLB
380
381 Enables a temporary TLB entry to be used during boot to work
382 around limitations in e500v1 and e500v2 external debugger
383 support. This reduces the portions of the boot code where
384 breakpoints and single stepping do not work. The value of this
385 symbol should be set to the TLB1 entry to be used for this
386 purpose.
387
Scott Wood33eee332012-08-14 10:14:53 +0000388 CONFIG_SYS_FSL_ERRATUM_A004510
389
390 Enables a workaround for erratum A004510. If set,
391 then CONFIG_SYS_FSL_ERRATUM_A004510_SVR_REV and
392 CONFIG_SYS_FSL_CORENET_SNOOPVEC_COREONLY must be set.
393
394 CONFIG_SYS_FSL_ERRATUM_A004510_SVR_REV
395 CONFIG_SYS_FSL_ERRATUM_A004510_SVR_REV2 (optional)
396
397 Defines one or two SoC revisions (low 8 bits of SVR)
398 for which the A004510 workaround should be applied.
399
400 The rest of SVR is either not relevant to the decision
401 of whether the erratum is present (e.g. p2040 versus
402 p2041) or is implied by the build target, which controls
403 whether CONFIG_SYS_FSL_ERRATUM_A004510 is set.
404
405 See Freescale App Note 4493 for more information about
406 this erratum.
407
Prabhakar Kushwaha74fa22e2013-04-16 13:27:44 +0530408 CONFIG_A003399_NOR_WORKAROUND
409 Enables a workaround for IFC erratum A003399. It is only
410 requred during NOR boot.
411
Scott Wood33eee332012-08-14 10:14:53 +0000412 CONFIG_SYS_FSL_CORENET_SNOOPVEC_COREONLY
413
414 This is the value to write into CCSR offset 0x18600
415 according to the A004510 workaround.
416
Priyanka Jain64501c62013-07-02 09:21:04 +0530417 CONFIG_SYS_FSL_DSP_DDR_ADDR
418 This value denotes start offset of DDR memory which is
419 connected exclusively to the DSP cores.
420
Priyanka Jain765b0bd2013-04-04 09:31:54 +0530421 CONFIG_SYS_FSL_DSP_M2_RAM_ADDR
422 This value denotes start offset of M2 memory
423 which is directly connected to the DSP core.
424
Priyanka Jain64501c62013-07-02 09:21:04 +0530425 CONFIG_SYS_FSL_DSP_M3_RAM_ADDR
426 This value denotes start offset of M3 memory which is directly
427 connected to the DSP core.
428
Priyanka Jain765b0bd2013-04-04 09:31:54 +0530429 CONFIG_SYS_FSL_DSP_CCSRBAR_DEFAULT
430 This value denotes start offset of DSP CCSR space.
431
Priyanka Jainb1359912013-12-17 14:25:52 +0530432 CONFIG_SYS_FSL_SINGLE_SOURCE_CLK
433 Single Source Clock is clocking mode present in some of FSL SoC's.
434 In this mode, a single differential clock is used to supply
435 clocks to the sysclock, ddrclock and usbclock.
436
Aneesh Bansalfb4a2402014-03-18 23:40:26 +0530437 CONFIG_SYS_CPC_REINIT_F
438 This CONFIG is defined when the CPC is configured as SRAM at the
439 time of U-boot entry and is required to be re-initialized.
440
Tang Yuantianaade2002014-04-17 15:33:46 +0800441 CONFIG_DEEP_SLEEP
442 Inidcates this SoC supports deep sleep feature. If deep sleep is
443 supported, core will start to execute uboot when wakes up.
444
Daniel Schwierzeck6cb461b2012-04-02 02:57:56 +0000445- Generic CPU options:
York Sun2a1680e2014-05-02 17:28:04 -0700446 CONFIG_SYS_GENERIC_GLOBAL_DATA
447 Defines global data is initialized in generic board board_init_f().
448 If this macro is defined, global data is created and cleared in
449 generic board board_init_f(). Without this macro, architecture/board
450 should initialize global data before calling board_init_f().
451
Daniel Schwierzeck6cb461b2012-04-02 02:57:56 +0000452 CONFIG_SYS_BIG_ENDIAN, CONFIG_SYS_LITTLE_ENDIAN
453
454 Defines the endianess of the CPU. Implementation of those
455 values is arch specific.
456
York Sun5614e712013-09-30 09:22:09 -0700457 CONFIG_SYS_FSL_DDR
458 Freescale DDR driver in use. This type of DDR controller is
459 found in mpc83xx, mpc85xx, mpc86xx as well as some ARM core
460 SoCs.
461
462 CONFIG_SYS_FSL_DDR_ADDR
463 Freescale DDR memory-mapped register base.
464
465 CONFIG_SYS_FSL_DDR_EMU
466 Specify emulator support for DDR. Some DDR features such as
467 deskew training are not available.
468
469 CONFIG_SYS_FSL_DDRC_GEN1
470 Freescale DDR1 controller.
471
472 CONFIG_SYS_FSL_DDRC_GEN2
473 Freescale DDR2 controller.
474
475 CONFIG_SYS_FSL_DDRC_GEN3
476 Freescale DDR3 controller.
477
York Sun34e026f2014-03-27 17:54:47 -0700478 CONFIG_SYS_FSL_DDRC_GEN4
479 Freescale DDR4 controller.
480
York Sun9ac4ffb2013-09-30 14:20:51 -0700481 CONFIG_SYS_FSL_DDRC_ARM_GEN3
482 Freescale DDR3 controller for ARM-based SoCs.
483
York Sun5614e712013-09-30 09:22:09 -0700484 CONFIG_SYS_FSL_DDR1
485 Board config to use DDR1. It can be enabled for SoCs with
486 Freescale DDR1 or DDR2 controllers, depending on the board
487 implemetation.
488
489 CONFIG_SYS_FSL_DDR2
490 Board config to use DDR2. It can be eanbeld for SoCs with
491 Freescale DDR2 or DDR3 controllers, depending on the board
492 implementation.
493
494 CONFIG_SYS_FSL_DDR3
495 Board config to use DDR3. It can be enabled for SoCs with
York Sun34e026f2014-03-27 17:54:47 -0700496 Freescale DDR3 or DDR3L controllers.
497
498 CONFIG_SYS_FSL_DDR3L
499 Board config to use DDR3L. It can be enabled for SoCs with
500 DDR3L controllers.
501
502 CONFIG_SYS_FSL_DDR4
503 Board config to use DDR4. It can be enabled for SoCs with
504 DDR4 controllers.
York Sun5614e712013-09-30 09:22:09 -0700505
Prabhakar Kushwaha1b4175d2014-01-18 12:28:30 +0530506 CONFIG_SYS_FSL_IFC_BE
507 Defines the IFC controller register space as Big Endian
508
509 CONFIG_SYS_FSL_IFC_LE
510 Defines the IFC controller register space as Little Endian
511
Prabhakar Kushwaha690e4252014-01-13 11:28:04 +0530512 CONFIG_SYS_FSL_PBL_PBI
513 It enables addition of RCW (Power on reset configuration) in built image.
514 Please refer doc/README.pblimage for more details
515
516 CONFIG_SYS_FSL_PBL_RCW
517 It adds PBI(pre-boot instructions) commands in u-boot build image.
518 PBI commands can be used to configure SoC before it starts the execution.
519 Please refer doc/README.pblimage for more details
520
Prabhakar Kushwaha89ad7be2014-04-08 19:13:34 +0530521 CONFIG_SPL_FSL_PBL
522 It adds a target to create boot binary having SPL binary in PBI format
523 concatenated with u-boot binary.
524
York Sun4e5b1bd2014-02-10 13:59:42 -0800525 CONFIG_SYS_FSL_DDR_BE
526 Defines the DDR controller register space as Big Endian
527
528 CONFIG_SYS_FSL_DDR_LE
529 Defines the DDR controller register space as Little Endian
530
York Sun6b9e3092014-02-10 13:59:43 -0800531 CONFIG_SYS_FSL_DDR_SDRAM_BASE_PHY
532 Physical address from the view of DDR controllers. It is the
533 same as CONFIG_SYS_DDR_SDRAM_BASE for all Power SoCs. But
534 it could be different for ARM SoCs.
535
York Sun6b1e1252014-02-10 13:59:44 -0800536 CONFIG_SYS_FSL_DDR_INTLV_256B
537 DDR controller interleaving on 256-byte. This is a special
538 interleaving mode, handled by Dickens for Freescale layerscape
539 SoCs with ARM core.
540
York Sun1d71efb2014-08-01 15:51:00 -0700541 CONFIG_SYS_FSL_DDR_MAIN_NUM_CTRLS
542 Number of controllers used as main memory.
543
544 CONFIG_SYS_FSL_OTHER_DDR_NUM_CTRLS
545 Number of controllers used for other than main memory.
546
Ruchika Gupta028dbb82014-09-09 11:50:31 +0530547 CONFIG_SYS_FSL_SEC_BE
548 Defines the SEC controller register space as Big Endian
549
550 CONFIG_SYS_FSL_SEC_LE
551 Defines the SEC controller register space as Little Endian
552
Markus Klotzbuecher0b953ff2006-03-24 15:28:02 +0100553- Intel Monahans options:
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200554 CONFIG_SYS_MONAHANS_RUN_MODE_OSC_RATIO
Markus Klotzbuecher0b953ff2006-03-24 15:28:02 +0100555
556 Defines the Monahans run mode to oscillator
557 ratio. Valid values are 8, 16, 24, 31. The core
558 frequency is this value multiplied by 13 MHz.
559
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200560 CONFIG_SYS_MONAHANS_TURBO_RUN_MODE_RATIO
Wolfgang Denkcf48eb92006-04-16 10:51:58 +0200561
Markus Klotzbuecher0b953ff2006-03-24 15:28:02 +0100562 Defines the Monahans turbo mode to oscillator
563 ratio. Valid values are 1 (default if undefined) and
Wolfgang Denkcf48eb92006-04-16 10:51:58 +0200564 2. The core frequency as calculated above is multiplied
Markus Klotzbuecher0b953ff2006-03-24 15:28:02 +0100565 by this value.
Wolfgang Denkcf48eb92006-04-16 10:51:58 +0200566
Daniel Schwierzeck92bbd642011-07-27 13:22:39 +0200567- MIPS CPU options:
568 CONFIG_SYS_INIT_SP_OFFSET
569
570 Offset relative to CONFIG_SYS_SDRAM_BASE for initial stack
571 pointer. This is needed for the temporary stack before
572 relocation.
573
574 CONFIG_SYS_MIPS_CACHE_MODE
575
576 Cache operation mode for the MIPS CPU.
577 See also arch/mips/include/asm/mipsregs.h.
578 Possible values are:
579 CONF_CM_CACHABLE_NO_WA
580 CONF_CM_CACHABLE_WA
581 CONF_CM_UNCACHED
582 CONF_CM_CACHABLE_NONCOHERENT
583 CONF_CM_CACHABLE_CE
584 CONF_CM_CACHABLE_COW
585 CONF_CM_CACHABLE_CUW
586 CONF_CM_CACHABLE_ACCELERATED
587
588 CONFIG_SYS_XWAY_EBU_BOOTCFG
589
590 Special option for Lantiq XWAY SoCs for booting from NOR flash.
591 See also arch/mips/cpu/mips32/start.S.
592
593 CONFIG_XWAY_SWAP_BYTES
594
595 Enable compilation of tools/xway-swap-bytes needed for Lantiq
596 XWAY SoCs for booting from NOR flash. The U-Boot image needs to
597 be swapped if a flash programmer is used.
598
Christian Rieschb67d8812012-02-02 00:44:39 +0000599- ARM options:
600 CONFIG_SYS_EXCEPTION_VECTORS_HIGH
601
602 Select high exception vectors of the ARM core, e.g., do not
603 clear the V bit of the c1 register of CP15.
604
Aneesh V5356f542012-03-08 07:20:19 +0000605 CONFIG_SYS_THUMB_BUILD
606
607 Use this flag to build U-Boot using the Thumb instruction
608 set for ARM architectures. Thumb instruction set provides
609 better code density. For ARM architectures that support
610 Thumb2 this flag will result in Thumb2 code generated by
611 GCC.
612
Stephen Warrenc5d47522013-03-04 13:29:40 +0000613 CONFIG_ARM_ERRATA_716044
Stephen Warren06785872013-02-26 12:28:27 +0000614 CONFIG_ARM_ERRATA_742230
615 CONFIG_ARM_ERRATA_743622
616 CONFIG_ARM_ERRATA_751472
Nitin Gargf71cbfe2014-04-02 08:55:01 -0500617 CONFIG_ARM_ERRATA_794072
Nitin Gargb7588e32014-04-02 08:55:02 -0500618 CONFIG_ARM_ERRATA_761320
Stephen Warren06785872013-02-26 12:28:27 +0000619
620 If set, the workarounds for these ARM errata are applied early
621 during U-Boot startup. Note that these options force the
622 workarounds to be applied; no CPU-type/version detection
623 exists, unlike the similar options in the Linux kernel. Do not
624 set these options unless they apply!
625
wdenk5da627a2003-10-09 20:09:04 +0000626- Linux Kernel Interface:
wdenkc6097192002-11-03 00:24:07 +0000627 CONFIG_CLOCKS_IN_MHZ
628
629 U-Boot stores all clock information in Hz
630 internally. For binary compatibility with older Linux
631 kernels (which expect the clocks passed in the
632 bd_info data to be in MHz) the environment variable
633 "clocks_in_mhz" can be defined so that U-Boot
634 converts clock data to MHZ before passing it to the
635 Linux kernel.
wdenkc6097192002-11-03 00:24:07 +0000636 When CONFIG_CLOCKS_IN_MHZ is defined, a definition of
Wolfgang Denk218ca722008-03-26 10:40:12 +0100637 "clocks_in_mhz=1" is automatically included in the
wdenkc6097192002-11-03 00:24:07 +0000638 default environment.
639
wdenk5da627a2003-10-09 20:09:04 +0000640 CONFIG_MEMSIZE_IN_BYTES [relevant for MIPS only]
641
Marcel Ziswiler11ccc332008-07-09 08:17:15 +0200642 When transferring memsize parameter to linux, some versions
wdenk5da627a2003-10-09 20:09:04 +0000643 expect it to be in bytes, others in MB.
644 Define CONFIG_MEMSIZE_IN_BYTES to make it in bytes.
645
Gerald Van Barenfec6d9e2008-06-03 20:34:45 -0400646 CONFIG_OF_LIBFDT
Wolfgang Denkf57f70a2005-10-13 01:45:54 +0200647
648 New kernel versions are expecting firmware settings to be
Gerald Van Baren213bf8c2007-03-31 12:23:51 -0400649 passed using flattened device trees (based on open firmware
650 concepts).
651
652 CONFIG_OF_LIBFDT
653 * New libfdt-based support
654 * Adds the "fdt" command
Kim Phillips3bb342f2007-08-10 14:34:14 -0500655 * The bootm command automatically updates the fdt
Gerald Van Baren213bf8c2007-03-31 12:23:51 -0400656
Marcel Ziswilerb55ae402009-09-09 21:18:41 +0200657 OF_CPU - The proper name of the cpus node (only required for
658 MPC512X and MPC5xxx based boards).
659 OF_SOC - The proper name of the soc node (only required for
660 MPC512X and MPC5xxx based boards).
Wolfgang Denkf57f70a2005-10-13 01:45:54 +0200661 OF_TBCLK - The timebase frequency.
Kumar Galac2871f02006-01-11 13:59:02 -0600662 OF_STDOUT_PATH - The path to the console device
Wolfgang Denkf57f70a2005-10-13 01:45:54 +0200663
Marcel Ziswiler11ccc332008-07-09 08:17:15 +0200664 boards with QUICC Engines require OF_QE to set UCC MAC
665 addresses
Kim Phillips3bb342f2007-08-10 14:34:14 -0500666
Kumar Gala4e253132006-01-11 13:54:17 -0600667 CONFIG_OF_BOARD_SETUP
668
669 Board code has addition modification that it wants to make
670 to the flat device tree before handing it off to the kernel
wdenk6705d812004-08-02 23:22:59 +0000671
Matthew McClintock02677682006-06-28 10:41:37 -0500672 CONFIG_OF_BOOT_CPU
673
Marcel Ziswiler11ccc332008-07-09 08:17:15 +0200674 This define fills in the correct boot CPU in the boot
Matthew McClintock02677682006-06-28 10:41:37 -0500675 param header, the default value is zero if undefined.
676
Heiko Schocher3887c3f2009-09-23 07:56:08 +0200677 CONFIG_OF_IDE_FIXUP
678
679 U-Boot can detect if an IDE device is present or not.
680 If not, and this new config option is activated, U-Boot
681 removes the ATA node from the DTS before booting Linux,
682 so the Linux IDE driver does not probe the device and
683 crash. This is needed for buggy hardware (uc101) where
684 no pull down resistor is connected to the signal IDE5V_DD7.
685
Igor Grinberg7eb29392011-07-14 05:45:07 +0000686 CONFIG_MACH_TYPE [relevant for ARM only][mandatory]
687
688 This setting is mandatory for all boards that have only one
689 machine type and must be used to specify the machine type
690 number as it appears in the ARM machine registry
691 (see http://www.arm.linux.org.uk/developer/machines/).
692 Only boards that have multiple machine types supported
693 in a single configuration file and the machine type is
694 runtime discoverable, do not have to use this setting.
695
Niklaus Giger0b2f4ec2008-11-03 22:13:47 +0100696- vxWorks boot parameters:
697
698 bootvx constructs a valid bootline using the following
699 environments variables: bootfile, ipaddr, serverip, hostname.
700 It loads the vxWorks image pointed bootfile.
701
702 CONFIG_SYS_VXWORKS_BOOT_DEVICE - The vxworks device name
703 CONFIG_SYS_VXWORKS_MAC_PTR - Ethernet 6 byte MA -address
704 CONFIG_SYS_VXWORKS_SERVERNAME - Name of the server
705 CONFIG_SYS_VXWORKS_BOOT_ADDR - Address of boot parameters
706
707 CONFIG_SYS_VXWORKS_ADD_PARAMS
708
709 Add it at the end of the bootline. E.g "u=username pw=secret"
710
711 Note: If a "bootargs" environment is defined, it will overwride
712 the defaults discussed just above.
713
Aneesh V2c451f72011-06-16 23:30:47 +0000714- Cache Configuration:
715 CONFIG_SYS_ICACHE_OFF - Do not enable instruction cache in U-Boot
716 CONFIG_SYS_DCACHE_OFF - Do not enable data cache in U-Boot
717 CONFIG_SYS_L2CACHE_OFF- Do not enable L2 cache in U-Boot
718
Aneesh V93bc2192011-06-16 23:30:51 +0000719- Cache Configuration for ARM:
720 CONFIG_SYS_L2_PL310 - Enable support for ARM PL310 L2 cache
721 controller
722 CONFIG_SYS_PL310_BASE - Physical base address of PL310
723 controller register space
724
wdenk6705d812004-08-02 23:22:59 +0000725- Serial Ports:
Andreas Engel48d01922008-09-08 14:30:53 +0200726 CONFIG_PL010_SERIAL
wdenk6705d812004-08-02 23:22:59 +0000727
728 Define this if you want support for Amba PrimeCell PL010 UARTs.
729
Andreas Engel48d01922008-09-08 14:30:53 +0200730 CONFIG_PL011_SERIAL
wdenk6705d812004-08-02 23:22:59 +0000731
732 Define this if you want support for Amba PrimeCell PL011 UARTs.
733
734 CONFIG_PL011_CLOCK
735
736 If you have Amba PrimeCell PL011 UARTs, set this variable to
737 the clock speed of the UARTs.
738
739 CONFIG_PL01x_PORTS
740
741 If you have Amba PrimeCell PL010 or PL011 UARTs on your board,
742 define this to a list of base addresses for each (supported)
743 port. See e.g. include/configs/versatile.h
744
John Rigby910f1ae2011-04-19 10:42:39 +0000745 CONFIG_PL011_SERIAL_RLCR
746
747 Some vendor versions of PL011 serial ports (e.g. ST-Ericsson U8500)
748 have separate receive and transmit line control registers. Set
749 this variable to initialize the extra register.
750
751 CONFIG_PL011_SERIAL_FLUSH_ON_INIT
752
753 On some platforms (e.g. U8500) U-Boot is loaded by a second stage
754 boot loader that has already initialized the UART. Define this
755 variable to flush the UART at init time.
756
Karicheri, Muralidharand57dee52014-04-09 15:38:46 -0400757 CONFIG_SERIAL_HW_FLOW_CONTROL
758
759 Define this variable to enable hw flow control in serial driver.
760 Current user of this option is drivers/serial/nsl16550.c driver
wdenk6705d812004-08-02 23:22:59 +0000761
wdenkc6097192002-11-03 00:24:07 +0000762- Console Interface:
wdenk43d96162003-03-06 00:02:04 +0000763 Depending on board, define exactly one serial port
764 (like CONFIG_8xx_CONS_SMC1, CONFIG_8xx_CONS_SMC2,
765 CONFIG_8xx_CONS_SCC1, ...), or switch off the serial
766 console by defining CONFIG_8xx_CONS_NONE
wdenkc6097192002-11-03 00:24:07 +0000767
768 Note: if CONFIG_8xx_CONS_NONE is defined, the serial
769 port routines must be defined elsewhere
770 (i.e. serial_init(), serial_getc(), ...)
771
772 CONFIG_CFB_CONSOLE
773 Enables console device for a color framebuffer. Needs following
Wolfgang Denkc53043b2011-12-07 12:19:20 +0000774 defines (cf. smiLynxEM, i8042)
wdenkc6097192002-11-03 00:24:07 +0000775 VIDEO_FB_LITTLE_ENDIAN graphic memory organisation
776 (default big endian)
777 VIDEO_HW_RECTFILL graphic chip supports
778 rectangle fill
779 (cf. smiLynxEM)
780 VIDEO_HW_BITBLT graphic chip supports
781 bit-blit (cf. smiLynxEM)
782 VIDEO_VISIBLE_COLS visible pixel columns
783 (cols=pitch)
wdenkba56f622004-02-06 23:19:44 +0000784 VIDEO_VISIBLE_ROWS visible pixel rows
785 VIDEO_PIXEL_SIZE bytes per pixel
wdenkc6097192002-11-03 00:24:07 +0000786 VIDEO_DATA_FORMAT graphic data format
787 (0-5, cf. cfb_console.c)
wdenkba56f622004-02-06 23:19:44 +0000788 VIDEO_FB_ADRS framebuffer address
wdenkc6097192002-11-03 00:24:07 +0000789 VIDEO_KBD_INIT_FCT keyboard int fct
790 (i.e. i8042_kbd_init())
791 VIDEO_TSTC_FCT test char fct
792 (i.e. i8042_tstc)
793 VIDEO_GETC_FCT get char fct
794 (i.e. i8042_getc)
795 CONFIG_CONSOLE_CURSOR cursor drawing on/off
796 (requires blink timer
797 cf. i8042.c)
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200798 CONFIG_SYS_CONSOLE_BLINK_COUNT blink interval (cf. i8042.c)
wdenkc6097192002-11-03 00:24:07 +0000799 CONFIG_CONSOLE_TIME display time/date info in
800 upper right corner
Jon Loeliger602ad3b2007-06-11 19:03:39 -0500801 (requires CONFIG_CMD_DATE)
wdenkc6097192002-11-03 00:24:07 +0000802 CONFIG_VIDEO_LOGO display Linux logo in
803 upper left corner
wdenka6c7ad22002-12-03 21:28:10 +0000804 CONFIG_VIDEO_BMP_LOGO use bmp_logo.h instead of
805 linux_logo.h for logo.
806 Requires CONFIG_VIDEO_LOGO
wdenkc6097192002-11-03 00:24:07 +0000807 CONFIG_CONSOLE_EXTRA_INFO
Marcel Ziswiler11ccc332008-07-09 08:17:15 +0200808 additional board info beside
wdenkc6097192002-11-03 00:24:07 +0000809 the logo
810
Pali Rohár33a35bb2012-10-19 13:30:09 +0000811 When CONFIG_CFB_CONSOLE_ANSI is defined, console will support
812 a limited number of ANSI escape sequences (cursor control,
813 erase functions and limited graphics rendition control).
814
wdenk43d96162003-03-06 00:02:04 +0000815 When CONFIG_CFB_CONSOLE is defined, video console is
816 default i/o. Serial console can be forced with
817 environment 'console=serial'.
wdenkc6097192002-11-03 00:24:07 +0000818
wdenkd4ca31c2004-01-02 14:00:00 +0000819 When CONFIG_SILENT_CONSOLE is defined, all console
820 messages (by U-Boot and Linux!) can be silenced with
821 the "silent" environment variable. See
822 doc/README.silent for more information.
wdenka3ad8e22003-10-19 23:22:11 +0000823
Heiko Schocher45ae2542013-10-22 11:06:06 +0200824 CONFIG_SYS_CONSOLE_BG_COL: define the backgroundcolor, default
825 is 0x00.
826 CONFIG_SYS_CONSOLE_FG_COL: define the foregroundcolor, default
827 is 0xa0.
828
wdenkc6097192002-11-03 00:24:07 +0000829- Console Baudrate:
830 CONFIG_BAUDRATE - in bps
831 Select one of the baudrates listed in
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200832 CONFIG_SYS_BAUDRATE_TABLE, see below.
833 CONFIG_SYS_BRGCLK_PRESCALE, baudrate prescale
wdenkc6097192002-11-03 00:24:07 +0000834
Heiko Schocherc92fac92009-01-30 12:55:38 +0100835- Console Rx buffer length
836 With CONFIG_SYS_SMC_RXBUFLEN it is possible to define
837 the maximum receive buffer length for the SMC.
Heiko Schocher2b3f12c2009-02-10 09:31:47 +0100838 This option is actual only for 82xx and 8xx possible.
Heiko Schocherc92fac92009-01-30 12:55:38 +0100839 If using CONFIG_SYS_SMC_RXBUFLEN also CONFIG_SYS_MAXIDLE
840 must be defined, to setup the maximum idle timeout for
841 the SMC.
842
Graeme Russ9558b482011-09-01 00:48:27 +0000843- Pre-Console Buffer:
Wolfgang Denk4cf26092011-10-07 09:58:21 +0200844 Prior to the console being initialised (i.e. serial UART
845 initialised etc) all console output is silently discarded.
846 Defining CONFIG_PRE_CONSOLE_BUFFER will cause U-Boot to
847 buffer any console messages prior to the console being
848 initialised to a buffer of size CONFIG_PRE_CON_BUF_SZ
849 bytes located at CONFIG_PRE_CON_BUF_ADDR. The buffer is
850 a circular buffer, so if more than CONFIG_PRE_CON_BUF_SZ
Wolfgang Denk6feff892011-10-09 21:06:34 +0200851 bytes are output before the console is initialised, the
Wolfgang Denk4cf26092011-10-07 09:58:21 +0200852 earlier bytes are discarded.
Graeme Russ9558b482011-09-01 00:48:27 +0000853
Wolfgang Denk4cf26092011-10-07 09:58:21 +0200854 'Sane' compilers will generate smaller code if
855 CONFIG_PRE_CON_BUF_SZ is a power of 2
Graeme Russ9558b482011-09-01 00:48:27 +0000856
Sonny Rao046a37b2011-11-02 09:52:08 +0000857- Safe printf() functions
858 Define CONFIG_SYS_VSNPRINTF to compile in safe versions of
859 the printf() functions. These are defined in
860 include/vsprintf.h and include snprintf(), vsnprintf() and
861 so on. Code size increase is approximately 300-500 bytes.
862 If this option is not given then these functions will
863 silently discard their buffer size argument - this means
864 you are not getting any overflow checking in this case.
865
wdenkc6097192002-11-03 00:24:07 +0000866- Boot Delay: CONFIG_BOOTDELAY - in seconds
867 Delay before automatically booting the default image;
868 set to -1 to disable autoboot.
Joe Hershberger93d72122012-08-17 10:53:12 +0000869 set to -2 to autoboot with no delay and not check for abort
870 (even when CONFIG_ZERO_BOOTDELAY_CHECK is defined).
wdenkc6097192002-11-03 00:24:07 +0000871
872 See doc/README.autoboot for these options that
873 work with CONFIG_BOOTDELAY. None are required.
874 CONFIG_BOOT_RETRY_TIME
875 CONFIG_BOOT_RETRY_MIN
876 CONFIG_AUTOBOOT_KEYED
877 CONFIG_AUTOBOOT_PROMPT
878 CONFIG_AUTOBOOT_DELAY_STR
879 CONFIG_AUTOBOOT_STOP_STR
880 CONFIG_AUTOBOOT_DELAY_STR2
881 CONFIG_AUTOBOOT_STOP_STR2
882 CONFIG_ZERO_BOOTDELAY_CHECK
883 CONFIG_RESET_TO_RETRY
884
885- Autoboot Command:
886 CONFIG_BOOTCOMMAND
887 Only needed when CONFIG_BOOTDELAY is enabled;
888 define a command string that is automatically executed
889 when no character is read on the console interface
890 within "Boot Delay" after reset.
891
892 CONFIG_BOOTARGS
wdenk43d96162003-03-06 00:02:04 +0000893 This can be used to pass arguments to the bootm
894 command. The value of CONFIG_BOOTARGS goes into the
895 environment value "bootargs".
wdenkc6097192002-11-03 00:24:07 +0000896
897 CONFIG_RAMBOOT and CONFIG_NFSBOOT
wdenk43d96162003-03-06 00:02:04 +0000898 The value of these goes into the environment as
899 "ramboot" and "nfsboot" respectively, and can be used
900 as a convenience, when switching between booting from
Marcel Ziswiler11ccc332008-07-09 08:17:15 +0200901 RAM and NFS.
wdenkc6097192002-11-03 00:24:07 +0000902
Heiko Schochereda0ba32013-11-04 14:04:59 +0100903- Bootcount:
904 CONFIG_BOOTCOUNT_LIMIT
905 Implements a mechanism for detecting a repeating reboot
906 cycle, see:
907 http://www.denx.de/wiki/view/DULG/UBootBootCountLimit
908
909 CONFIG_BOOTCOUNT_ENV
910 If no softreset save registers are found on the hardware
911 "bootcount" is stored in the environment. To prevent a
912 saveenv on all reboots, the environment variable
913 "upgrade_available" is used. If "upgrade_available" is
914 0, "bootcount" is always 0, if "upgrade_available" is
915 1 "bootcount" is incremented in the environment.
916 So the Userspace Applikation must set the "upgrade_available"
917 and "bootcount" variable to 0, if a boot was successfully.
918
wdenkc6097192002-11-03 00:24:07 +0000919- Pre-Boot Commands:
920 CONFIG_PREBOOT
921
922 When this option is #defined, the existence of the
923 environment variable "preboot" will be checked
924 immediately before starting the CONFIG_BOOTDELAY
925 countdown and/or running the auto-boot command resp.
926 entering interactive mode.
927
928 This feature is especially useful when "preboot" is
929 automatically generated or modified. For an example
930 see the LWMON board specific code: here "preboot" is
931 modified when the user holds down a certain
932 combination of keys on the (special) keyboard when
933 booting the systems
934
935- Serial Download Echo Mode:
936 CONFIG_LOADS_ECHO
937 If defined to 1, all characters received during a
938 serial download (using the "loads" command) are
939 echoed back. This might be needed by some terminal
940 emulations (like "cu"), but may as well just take
941 time on others. This setting #define's the initial
942 value of the "loads_echo" environment variable.
943
Jon Loeliger602ad3b2007-06-11 19:03:39 -0500944- Kgdb Serial Baudrate: (if CONFIG_CMD_KGDB is defined)
wdenkc6097192002-11-03 00:24:07 +0000945 CONFIG_KGDB_BAUDRATE
946 Select one of the baudrates listed in
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200947 CONFIG_SYS_BAUDRATE_TABLE, see below.
wdenkc6097192002-11-03 00:24:07 +0000948
949- Monitor Functions:
Jon Loeliger602ad3b2007-06-11 19:03:39 -0500950 Monitor commands can be included or excluded
951 from the build by using the #include files
Stephen Warrenc6c621b2012-08-05 16:07:19 +0000952 <config_cmd_all.h> and #undef'ing unwanted
953 commands, or using <config_cmd_default.h>
Jon Loeliger602ad3b2007-06-11 19:03:39 -0500954 and augmenting with additional #define's
955 for wanted commands.
wdenkc6097192002-11-03 00:24:07 +0000956
Jon Loeliger602ad3b2007-06-11 19:03:39 -0500957 The default command configuration includes all commands
958 except those marked below with a "*".
wdenkc6097192002-11-03 00:24:07 +0000959
Marek Vasutb401b732014-03-05 19:58:39 +0100960 CONFIG_CMD_AES AES 128 CBC encrypt/decrypt
Jon Loeliger602ad3b2007-06-11 19:03:39 -0500961 CONFIG_CMD_ASKENV * ask for env variable
Jon Loeliger602ad3b2007-06-11 19:03:39 -0500962 CONFIG_CMD_BDI bdinfo
963 CONFIG_CMD_BEDBUG * Include BedBug Debugger
964 CONFIG_CMD_BMP * BMP support
965 CONFIG_CMD_BSP * Board specific commands
966 CONFIG_CMD_BOOTD bootd
Tom Rinid2b2ffe2014-08-14 06:42:36 -0400967 CONFIG_CMD_BOOTI * ARM64 Linux kernel Image support
Jon Loeliger602ad3b2007-06-11 19:03:39 -0500968 CONFIG_CMD_CACHE * icache, dcache
Michal Simek08d0d6f2013-11-21 13:39:02 -0800969 CONFIG_CMD_CLK * clock command support
Jon Loeliger602ad3b2007-06-11 19:03:39 -0500970 CONFIG_CMD_CONSOLE coninfo
Mike Frysinger710b9932010-12-21 14:19:51 -0500971 CONFIG_CMD_CRC32 * crc32
Jon Loeliger602ad3b2007-06-11 19:03:39 -0500972 CONFIG_CMD_DATE * support for RTC, date/time...
973 CONFIG_CMD_DHCP * DHCP support
974 CONFIG_CMD_DIAG * Diagnostics
Peter Tysera7c93102008-12-17 16:36:22 -0600975 CONFIG_CMD_DS4510 * ds4510 I2C gpio commands
976 CONFIG_CMD_DS4510_INFO * ds4510 I2C info command
977 CONFIG_CMD_DS4510_MEM * ds4510 I2C eeprom/sram commansd
978 CONFIG_CMD_DS4510_RST * ds4510 I2C rst command
Jon Loeliger602ad3b2007-06-11 19:03:39 -0500979 CONFIG_CMD_DTT * Digital Therm and Thermostat
980 CONFIG_CMD_ECHO echo arguments
Peter Tyser246c6922009-10-25 15:12:56 -0500981 CONFIG_CMD_EDITENV edit env variable
Jon Loeliger602ad3b2007-06-11 19:03:39 -0500982 CONFIG_CMD_EEPROM * EEPROM read/write support
983 CONFIG_CMD_ELF * bootelf, bootvx
Joe Hershberger5e2b3e02012-12-11 22:16:25 -0600984 CONFIG_CMD_ENV_CALLBACK * display details about env callbacks
Joe Hershbergerfffad712012-12-11 22:16:33 -0600985 CONFIG_CMD_ENV_FLAGS * display details about env flags
Andrew Ruder88733e22013-10-22 19:07:34 -0500986 CONFIG_CMD_ENV_EXISTS * check existence of env variable
Mike Frysinger0c79cda2010-12-26 23:09:45 -0500987 CONFIG_CMD_EXPORTENV * export the environment
Stephen Warren03e2ecf2012-10-22 06:43:50 +0000988 CONFIG_CMD_EXT2 * ext2 command support
989 CONFIG_CMD_EXT4 * ext4 command support
Stephen Warren16f4d932014-01-24 20:46:37 -0700990 CONFIG_CMD_FS_GENERIC * filesystem commands (e.g. load, ls)
991 that work for multiple fs types
Mike Frysingerbdab39d2009-01-28 19:08:14 -0500992 CONFIG_CMD_SAVEENV saveenv
Jon Loeliger602ad3b2007-06-11 19:03:39 -0500993 CONFIG_CMD_FDC * Floppy Disk Support
Stephen Warren03e2ecf2012-10-22 06:43:50 +0000994 CONFIG_CMD_FAT * FAT command support
Jon Loeliger602ad3b2007-06-11 19:03:39 -0500995 CONFIG_CMD_FLASH flinfo, erase, protect
996 CONFIG_CMD_FPGA FPGA device initialization support
Vincent Stehlé4d98b5c2013-06-20 18:14:22 +0200997 CONFIG_CMD_FUSE * Device fuse support
Anton Staaf53fdc7e2012-12-05 14:46:29 +0000998 CONFIG_CMD_GETTIME * Get time since boot
Mike Frysingera641b972010-12-26 23:32:22 -0500999 CONFIG_CMD_GO * the 'go' command (exec code)
Kim Phillipsa000b792011-04-05 07:15:14 +00001000 CONFIG_CMD_GREPENV * search environment
Simon Glassbf36c5d2012-12-05 14:46:38 +00001001 CONFIG_CMD_HASH * calculate hash / digest
Jon Loeliger602ad3b2007-06-11 19:03:39 -05001002 CONFIG_CMD_HWFLOW * RTS/CTS hw flow control
1003 CONFIG_CMD_I2C * I2C serial bus support
1004 CONFIG_CMD_IDE * IDE harddisk support
1005 CONFIG_CMD_IMI iminfo
Vipin Kumar8fdf1e02012-12-16 22:32:48 +00001006 CONFIG_CMD_IMLS List all images found in NOR flash
Vincent Stehlé4d98b5c2013-06-20 18:14:22 +02001007 CONFIG_CMD_IMLS_NAND * List all images found in NAND flash
Jon Loeliger602ad3b2007-06-11 19:03:39 -05001008 CONFIG_CMD_IMMAP * IMMR dump support
Simon Glassaa532332014-06-11 23:29:41 -06001009 CONFIG_CMD_IOTRACE * I/O tracing for debugging
Mike Frysinger0c79cda2010-12-26 23:09:45 -05001010 CONFIG_CMD_IMPORTENV * import an environment
Joe Hershbergerc167cc02012-10-03 11:15:51 +00001011 CONFIG_CMD_INI * import data from an ini file into the env
Jon Loeliger602ad3b2007-06-11 19:03:39 -05001012 CONFIG_CMD_IRQ * irqinfo
1013 CONFIG_CMD_ITEST Integer/string test of 2 values
1014 CONFIG_CMD_JFFS2 * JFFS2 Support
1015 CONFIG_CMD_KGDB * kgdb
Vincent Stehlé4d98b5c2013-06-20 18:14:22 +02001016 CONFIG_CMD_LDRINFO * ldrinfo (display Blackfin loader)
Joe Hershbergerd22c3382012-05-23 08:00:12 +00001017 CONFIG_CMD_LINK_LOCAL * link-local IP address auto-configuration
1018 (169.254.*.*)
Jon Loeliger602ad3b2007-06-11 19:03:39 -05001019 CONFIG_CMD_LOADB loadb
1020 CONFIG_CMD_LOADS loads
Vincent Stehlé4d98b5c2013-06-20 18:14:22 +02001021 CONFIG_CMD_MD5SUM * print md5 message digest
Robin Getz02c9aa12009-07-27 00:07:59 -04001022 (requires CONFIG_CMD_MEMORY and CONFIG_MD5)
Simon Glass15a33e42012-11-30 13:01:20 +00001023 CONFIG_CMD_MEMINFO * Display detailed memory information
Jon Loeliger602ad3b2007-06-11 19:03:39 -05001024 CONFIG_CMD_MEMORY md, mm, nm, mw, cp, cmp, crc, base,
Wolfgang Denka2681702013-03-08 10:51:32 +00001025 loop, loopw
Vincent Stehlé4d98b5c2013-06-20 18:14:22 +02001026 CONFIG_CMD_MEMTEST * mtest
Jon Loeliger602ad3b2007-06-11 19:03:39 -05001027 CONFIG_CMD_MISC Misc functions like sleep etc
1028 CONFIG_CMD_MMC * MMC memory mapped support
1029 CONFIG_CMD_MII * MII utility commands
Stefan Roese68d7d652009-03-19 13:30:36 +01001030 CONFIG_CMD_MTDPARTS * MTD partition support
Jon Loeliger602ad3b2007-06-11 19:03:39 -05001031 CONFIG_CMD_NAND * NAND support
1032 CONFIG_CMD_NET bootp, tftpboot, rarpboot
Vincent Stehlé4d98b5c2013-06-20 18:14:22 +02001033 CONFIG_CMD_NFS NFS support
Peter Tysere92739d2008-12-17 16:36:21 -06001034 CONFIG_CMD_PCA953X * PCA953x I2C gpio commands
Wolfgang Denkc0f40852011-10-26 10:21:21 +00001035 CONFIG_CMD_PCA953X_INFO * PCA953x I2C gpio info command
Jon Loeliger602ad3b2007-06-11 19:03:39 -05001036 CONFIG_CMD_PCI * pciinfo
1037 CONFIG_CMD_PCMCIA * PCMCIA support
1038 CONFIG_CMD_PING * send ICMP ECHO_REQUEST to network
1039 host
1040 CONFIG_CMD_PORTIO * Port I/O
Kenneth Watersff048ea2012-12-05 14:46:30 +00001041 CONFIG_CMD_READ * Read raw data from partition
Jon Loeliger602ad3b2007-06-11 19:03:39 -05001042 CONFIG_CMD_REGINFO * Register dump
1043 CONFIG_CMD_RUN run command in env variable
Simon Glassd3049312012-12-26 09:53:36 +00001044 CONFIG_CMD_SANDBOX * sb command to access sandbox features
Jon Loeliger602ad3b2007-06-11 19:03:39 -05001045 CONFIG_CMD_SAVES * save S record dump
1046 CONFIG_CMD_SCSI * SCSI Support
1047 CONFIG_CMD_SDRAM * print SDRAM configuration information
1048 (requires CONFIG_CMD_I2C)
1049 CONFIG_CMD_SETGETDCR Support for DCR Register access
1050 (4xx only)
Eric Nelsonf61ec452012-01-31 10:52:08 -07001051 CONFIG_CMD_SF * Read/write/erase SPI NOR flash
Vincent Stehlé4d98b5c2013-06-20 18:14:22 +02001052 CONFIG_CMD_SHA1SUM * print sha1 memory digest
Robin Getz02c9aa12009-07-27 00:07:59 -04001053 (requires CONFIG_CMD_MEMORY)
Bob Liu7d861d92013-02-05 19:05:41 +08001054 CONFIG_CMD_SOFTSWITCH * Soft switch setting command for BF60x
Wolfgang Denk74de7ae2009-04-01 23:34:12 +02001055 CONFIG_CMD_SOURCE "source" command Support
Jon Loeliger602ad3b2007-06-11 19:03:39 -05001056 CONFIG_CMD_SPI * SPI serial bus support
Luca Ceresoli7a83af02011-05-17 00:03:40 +00001057 CONFIG_CMD_TFTPSRV * TFTP transfer in server mode
Simon Glass1fb7cd42011-10-24 18:00:07 +00001058 CONFIG_CMD_TFTPPUT * TFTP put command (upload)
Joe Hershbergerda83bcd2012-10-03 12:14:57 +00001059 CONFIG_CMD_TIME * run command and report execution time (ARM specific)
1060 CONFIG_CMD_TIMER * access to the system tick timer
Jon Loeliger602ad3b2007-06-11 19:03:39 -05001061 CONFIG_CMD_USB * USB support
Jon Loeliger602ad3b2007-06-11 19:03:39 -05001062 CONFIG_CMD_CDP * Cisco Discover Protocol support
Marek Vasutc8339f52012-03-31 07:47:16 +00001063 CONFIG_CMD_MFSL * Microblaze FSL support
Vincent Stehlé4d98b5c2013-06-20 18:14:22 +02001064 CONFIG_CMD_XIMG Load part of Multi Image
Przemyslaw Marczak89c82302014-04-02 10:20:05 +02001065 CONFIG_CMD_UUID * Generate random UUID or GUID string
wdenkc6097192002-11-03 00:24:07 +00001066
1067 EXAMPLE: If you want all functions except of network
1068 support you can write:
1069
Jon Loeliger602ad3b2007-06-11 19:03:39 -05001070 #include "config_cmd_all.h"
1071 #undef CONFIG_CMD_NET
wdenkc6097192002-11-03 00:24:07 +00001072
Gerald Van Baren213bf8c2007-03-31 12:23:51 -04001073 Other Commands:
1074 fdt (flattened device tree) command: CONFIG_OF_LIBFDT
wdenkc6097192002-11-03 00:24:07 +00001075
1076 Note: Don't enable the "icache" and "dcache" commands
Jon Loeliger602ad3b2007-06-11 19:03:39 -05001077 (configuration option CONFIG_CMD_CACHE) unless you know
wdenk43d96162003-03-06 00:02:04 +00001078 what you (and your U-Boot users) are doing. Data
1079 cache cannot be enabled on systems like the 8xx or
1080 8260 (where accesses to the IMMR region must be
1081 uncached), and it cannot be disabled on all other
1082 systems where we (mis-) use the data cache to hold an
1083 initial stack and some data.
wdenkc6097192002-11-03 00:24:07 +00001084
1085
1086 XXX - this list needs to get updated!
1087
Wolfgang Denka5ecbe62013-03-23 23:50:31 +00001088- Regular expression support:
1089 CONFIG_REGEX
Wolfgang Denk93e14592013-10-04 17:43:24 +02001090 If this variable is defined, U-Boot is linked against
1091 the SLRE (Super Light Regular Expression) library,
1092 which adds regex support to some commands, as for
1093 example "env grep" and "setexpr".
Wolfgang Denka5ecbe62013-03-23 23:50:31 +00001094
Simon Glass45ba8072011-10-15 05:48:20 +00001095- Device tree:
1096 CONFIG_OF_CONTROL
1097 If this variable is defined, U-Boot will use a device tree
1098 to configure its devices, instead of relying on statically
1099 compiled #defines in the board file. This option is
1100 experimental and only available on a few boards. The device
1101 tree is available in the global data as gd->fdt_blob.
1102
Simon Glass2c0f79e2011-10-24 19:15:31 +00001103 U-Boot needs to get its device tree from somewhere. This can
1104 be done using one of the two options below:
Simon Glassbbb0b122011-10-15 05:48:21 +00001105
1106 CONFIG_OF_EMBED
1107 If this variable is defined, U-Boot will embed a device tree
1108 binary in its image. This device tree file should be in the
1109 board directory and called <soc>-<board>.dts. The binary file
1110 is then picked up in board_init_f() and made available through
1111 the global data structure as gd->blob.
Simon Glass45ba8072011-10-15 05:48:20 +00001112
Simon Glass2c0f79e2011-10-24 19:15:31 +00001113 CONFIG_OF_SEPARATE
1114 If this variable is defined, U-Boot will build a device tree
1115 binary. It will be called u-boot.dtb. Architecture-specific
1116 code will locate it at run-time. Generally this works by:
1117
1118 cat u-boot.bin u-boot.dtb >image.bin
1119
1120 and in fact, U-Boot does this for you, creating a file called
1121 u-boot-dtb.bin which is useful in the common case. You can
1122 still use the individual files if you need something more
1123 exotic.
1124
wdenkc6097192002-11-03 00:24:07 +00001125- Watchdog:
1126 CONFIG_WATCHDOG
1127 If this variable is defined, it enables watchdog
Detlev Zundel6abe6fb2011-04-27 05:25:59 +00001128 support for the SoC. There must be support in the SoC
1129 specific code for a watchdog. For the 8xx and 8260
1130 CPUs, the SIU Watchdog feature is enabled in the SYPCR
1131 register. When supported for a specific SoC is
1132 available, then no further board specific code should
1133 be needed to use it.
1134
1135 CONFIG_HW_WATCHDOG
1136 When using a watchdog circuitry external to the used
1137 SoC, then define this variable and provide board
1138 specific code for the "hw_watchdog_reset" function.
wdenkc6097192002-11-03 00:24:07 +00001139
stroesec1551ea2003-04-04 15:53:41 +00001140- U-Boot Version:
1141 CONFIG_VERSION_VARIABLE
1142 If this variable is defined, an environment variable
1143 named "ver" is created by U-Boot showing the U-Boot
1144 version as printed by the "version" command.
Benoît Thébaudeaua1ea8e52012-08-13 15:01:14 +02001145 Any change to this variable will be reverted at the
1146 next reset.
stroesec1551ea2003-04-04 15:53:41 +00001147
wdenkc6097192002-11-03 00:24:07 +00001148- Real-Time Clock:
1149
Jon Loeliger602ad3b2007-06-11 19:03:39 -05001150 When CONFIG_CMD_DATE is selected, the type of the RTC
wdenkc6097192002-11-03 00:24:07 +00001151 has to be selected, too. Define exactly one of the
1152 following options:
1153
1154 CONFIG_RTC_MPC8xx - use internal RTC of MPC8xx
1155 CONFIG_RTC_PCF8563 - use Philips PCF8563 RTC
Fabio Estevam4e8b7542011-10-24 06:44:15 +00001156 CONFIG_RTC_MC13XXX - use MC13783 or MC13892 RTC
wdenkc6097192002-11-03 00:24:07 +00001157 CONFIG_RTC_MC146818 - use MC146818 RTC
wdenk1cb8e982003-03-06 21:55:29 +00001158 CONFIG_RTC_DS1307 - use Maxim, Inc. DS1307 RTC
wdenkc6097192002-11-03 00:24:07 +00001159 CONFIG_RTC_DS1337 - use Maxim, Inc. DS1337 RTC
wdenk7f70e852003-05-20 14:25:27 +00001160 CONFIG_RTC_DS1338 - use Maxim, Inc. DS1338 RTC
Markus Niebel412921d2014-07-21 11:06:16 +02001161 CONFIG_RTC_DS1339 - use Maxim, Inc. DS1339 RTC
wdenk3bac3512003-03-12 10:41:04 +00001162 CONFIG_RTC_DS164x - use Dallas DS164x RTC
Tor Krill9536dfc2008-03-15 15:40:26 +01001163 CONFIG_RTC_ISL1208 - use Intersil ISL1208 RTC
wdenk4c0d4c32004-06-09 17:34:58 +00001164 CONFIG_RTC_MAX6900 - use Maxim, Inc. MAX6900 RTC
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +02001165 CONFIG_SYS_RTC_DS1337_NOOSC - Turn off the OSC output for DS1337
Heiko Schocher71d19f32011-03-28 09:24:22 +02001166 CONFIG_SYS_RV3029_TCR - enable trickle charger on
1167 RV3029 RTC.
wdenkc6097192002-11-03 00:24:07 +00001168
wdenkb37c7e52003-06-30 16:24:52 +00001169 Note that if the RTC uses I2C, then the I2C interface
1170 must also be configured. See I2C Support, below.
1171
Peter Tysere92739d2008-12-17 16:36:21 -06001172- GPIO Support:
1173 CONFIG_PCA953X - use NXP's PCA953X series I2C GPIO
Peter Tysere92739d2008-12-17 16:36:21 -06001174
Chris Packham5dec49c2010-12-19 10:12:13 +00001175 The CONFIG_SYS_I2C_PCA953X_WIDTH option specifies a list of
1176 chip-ngpio pairs that tell the PCA953X driver the number of
1177 pins supported by a particular chip.
1178
Peter Tysere92739d2008-12-17 16:36:21 -06001179 Note that if the GPIO device uses I2C, then the I2C interface
1180 must also be configured. See I2C Support, below.
1181
Simon Glassaa532332014-06-11 23:29:41 -06001182- I/O tracing:
1183 When CONFIG_IO_TRACE is selected, U-Boot intercepts all I/O
1184 accesses and can checksum them or write a list of them out
1185 to memory. See the 'iotrace' command for details. This is
1186 useful for testing device drivers since it can confirm that
1187 the driver behaves the same way before and after a code
1188 change. Currently this is supported on sandbox and arm. To
1189 add support for your architecture, add '#include <iotrace.h>'
1190 to the bottom of arch/<arch>/include/asm/io.h and test.
1191
1192 Example output from the 'iotrace stats' command is below.
1193 Note that if the trace buffer is exhausted, the checksum will
1194 still continue to operate.
1195
1196 iotrace is enabled
1197 Start: 10000000 (buffer start address)
1198 Size: 00010000 (buffer size)
1199 Offset: 00000120 (current buffer offset)
1200 Output: 10000120 (start + offset)
1201 Count: 00000018 (number of trace records)
1202 CRC32: 9526fb66 (CRC32 of all trace records)
1203
wdenkc6097192002-11-03 00:24:07 +00001204- Timestamp Support:
1205
wdenk43d96162003-03-06 00:02:04 +00001206 When CONFIG_TIMESTAMP is selected, the timestamp
1207 (date and time) of an image is printed by image
1208 commands like bootm or iminfo. This option is
Jon Loeliger602ad3b2007-06-11 19:03:39 -05001209 automatically enabled when you select CONFIG_CMD_DATE .
wdenkc6097192002-11-03 00:24:07 +00001210
Karl O. Pinc923c46f2012-08-16 06:20:15 +00001211- Partition Labels (disklabels) Supported:
1212 Zero or more of the following:
1213 CONFIG_MAC_PARTITION Apple's MacOS partition table.
1214 CONFIG_DOS_PARTITION MS Dos partition table, traditional on the
1215 Intel architecture, USB sticks, etc.
1216 CONFIG_ISO_PARTITION ISO partition table, used on CDROM etc.
1217 CONFIG_EFI_PARTITION GPT partition table, common when EFI is the
1218 bootloader. Note 2TB partition limit; see
1219 disk/part_efi.c
1220 CONFIG_MTD_PARTITIONS Memory Technology Device partition table.
wdenkc6097192002-11-03 00:24:07 +00001221
Wolfgang Denk218ca722008-03-26 10:40:12 +01001222 If IDE or SCSI support is enabled (CONFIG_CMD_IDE or
1223 CONFIG_CMD_SCSI) you must configure support for at
Karl O. Pinc923c46f2012-08-16 06:20:15 +00001224 least one non-MTD partition type as well.
wdenkc6097192002-11-03 00:24:07 +00001225
1226- IDE Reset method:
wdenk4d13cba2004-03-14 14:09:05 +00001227 CONFIG_IDE_RESET_ROUTINE - this is defined in several
1228 board configurations files but used nowhere!
wdenkc6097192002-11-03 00:24:07 +00001229
wdenk4d13cba2004-03-14 14:09:05 +00001230 CONFIG_IDE_RESET - is this is defined, IDE Reset will
1231 be performed by calling the function
1232 ide_set_reset(int reset)
1233 which has to be defined in a board specific file
wdenkc6097192002-11-03 00:24:07 +00001234
1235- ATAPI Support:
1236 CONFIG_ATAPI
1237
1238 Set this to enable ATAPI support.
1239
wdenkc40b2952004-03-13 23:29:43 +00001240- LBA48 Support
1241 CONFIG_LBA48
1242
1243 Set this to enable support for disks larger than 137GB
Heiko Schocher4b142fe2009-12-03 11:21:21 +01001244 Also look at CONFIG_SYS_64BIT_LBA.
wdenkc40b2952004-03-13 23:29:43 +00001245 Whithout these , LBA48 support uses 32bit variables and will 'only'
1246 support disks up to 2.1TB.
1247
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +02001248 CONFIG_SYS_64BIT_LBA:
wdenkc40b2952004-03-13 23:29:43 +00001249 When enabled, makes the IDE subsystem use 64bit sector addresses.
1250 Default is 32bit.
1251
wdenkc6097192002-11-03 00:24:07 +00001252- SCSI Support:
1253 At the moment only there is only support for the
1254 SYM53C8XX SCSI controller; define
1255 CONFIG_SCSI_SYM53C8XX to enable it.
1256
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +02001257 CONFIG_SYS_SCSI_MAX_LUN [8], CONFIG_SYS_SCSI_MAX_SCSI_ID [7] and
1258 CONFIG_SYS_SCSI_MAX_DEVICE [CONFIG_SYS_SCSI_MAX_SCSI_ID *
1259 CONFIG_SYS_SCSI_MAX_LUN] can be adjusted to define the
wdenkc6097192002-11-03 00:24:07 +00001260 maximum numbers of LUNs, SCSI ID's and target
1261 devices.
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +02001262 CONFIG_SYS_SCSI_SYM53C8XX_CCF to fix clock timing (80Mhz)
wdenkc6097192002-11-03 00:24:07 +00001263
Wolfgang Denk93e14592013-10-04 17:43:24 +02001264 The environment variable 'scsidevs' is set to the number of
1265 SCSI devices found during the last scan.
Stefan Reinauer447c0312012-10-29 05:23:48 +00001266
wdenkc6097192002-11-03 00:24:07 +00001267- NETWORK Support (PCI):
wdenk682011f2003-06-03 23:54:09 +00001268 CONFIG_E1000
Kyle Moffettce5207e2011-10-18 11:05:29 +00001269 Support for Intel 8254x/8257x gigabit chips.
1270
1271 CONFIG_E1000_SPI
1272 Utility code for direct access to the SPI bus on Intel 8257x.
1273 This does not do anything useful unless you set at least one
1274 of CONFIG_CMD_E1000 or CONFIG_E1000_SPI_GENERIC.
1275
1276 CONFIG_E1000_SPI_GENERIC
1277 Allow generic access to the SPI bus on the Intel 8257x, for
1278 example with the "sspi" command.
1279
1280 CONFIG_CMD_E1000
1281 Management command for E1000 devices. When used on devices
1282 with SPI support you can reprogram the EEPROM from U-Boot.
stroese53cf9432003-06-05 15:39:44 +00001283
Andre Schwarzac3315c2008-03-06 16:45:44 +01001284 CONFIG_E1000_FALLBACK_MAC
Marcel Ziswiler11ccc332008-07-09 08:17:15 +02001285 default MAC for empty EEPROM after production.
Andre Schwarzac3315c2008-03-06 16:45:44 +01001286
wdenkc6097192002-11-03 00:24:07 +00001287 CONFIG_EEPRO100
1288 Support for Intel 82557/82559/82559ER chips.
Marcel Ziswiler11ccc332008-07-09 08:17:15 +02001289 Optional CONFIG_EEPRO100_SROM_WRITE enables EEPROM
wdenkc6097192002-11-03 00:24:07 +00001290 write routine for first time initialisation.
1291
1292 CONFIG_TULIP
1293 Support for Digital 2114x chips.
1294 Optional CONFIG_TULIP_SELECT_MEDIA for board specific
1295 modem chip initialisation (KS8761/QS6611).
1296
1297 CONFIG_NATSEMI
1298 Support for National dp83815 chips.
1299
1300 CONFIG_NS8382X
1301 Support for National dp8382[01] gigabit chips.
1302
wdenk45219c42003-05-12 21:50:16 +00001303- NETWORK Support (other):
1304
Jens Scharsigc041e9d2010-01-23 12:03:45 +01001305 CONFIG_DRIVER_AT91EMAC
1306 Support for AT91RM9200 EMAC.
1307
1308 CONFIG_RMII
1309 Define this to use reduced MII inteface
1310
1311 CONFIG_DRIVER_AT91EMAC_QUIET
1312 If this defined, the driver is quiet.
1313 The driver doen't show link status messages.
1314
Rob Herringefdd7312011-12-15 11:15:49 +00001315 CONFIG_CALXEDA_XGMAC
1316 Support for the Calxeda XGMAC device
1317
Ashok3bb46d22012-10-15 06:20:47 +00001318 CONFIG_LAN91C96
wdenk45219c42003-05-12 21:50:16 +00001319 Support for SMSC's LAN91C96 chips.
1320
1321 CONFIG_LAN91C96_BASE
1322 Define this to hold the physical address
1323 of the LAN91C96's I/O space
1324
1325 CONFIG_LAN91C96_USE_32_BIT
1326 Define this to enable 32 bit addressing
1327
Ashok3bb46d22012-10-15 06:20:47 +00001328 CONFIG_SMC91111
wdenkf39748a2004-06-09 13:37:52 +00001329 Support for SMSC's LAN91C111 chip
1330
1331 CONFIG_SMC91111_BASE
1332 Define this to hold the physical address
1333 of the device (I/O space)
1334
1335 CONFIG_SMC_USE_32_BIT
1336 Define this if data bus is 32 bits
1337
1338 CONFIG_SMC_USE_IOFUNCS
1339 Define this to use i/o functions instead of macros
1340 (some hardware wont work with macros)
1341
Heiko Schocherdc02bad2011-11-15 10:00:04 -05001342 CONFIG_DRIVER_TI_EMAC
1343 Support for davinci emac
1344
1345 CONFIG_SYS_DAVINCI_EMAC_PHY_COUNT
1346 Define this if you have more then 3 PHYs.
1347
Macpaul Linb3dbf4a52010-12-21 16:59:46 +08001348 CONFIG_FTGMAC100
1349 Support for Faraday's FTGMAC100 Gigabit SoC Ethernet
1350
1351 CONFIG_FTGMAC100_EGIGA
1352 Define this to use GE link update with gigabit PHY.
1353 Define this if FTGMAC100 is connected to gigabit PHY.
1354 If your system has 10/100 PHY only, it might not occur
1355 wrong behavior. Because PHY usually return timeout or
1356 useless data when polling gigabit status and gigabit
1357 control registers. This behavior won't affect the
1358 correctnessof 10/100 link speed update.
1359
Mike Rapoportc2fff332009-11-11 10:03:03 +02001360 CONFIG_SMC911X
Jens Gehrlein557b3772008-05-05 14:06:11 +02001361 Support for SMSC's LAN911x and LAN921x chips
1362
Mike Rapoportc2fff332009-11-11 10:03:03 +02001363 CONFIG_SMC911X_BASE
Jens Gehrlein557b3772008-05-05 14:06:11 +02001364 Define this to hold the physical address
1365 of the device (I/O space)
1366
Mike Rapoportc2fff332009-11-11 10:03:03 +02001367 CONFIG_SMC911X_32_BIT
Jens Gehrlein557b3772008-05-05 14:06:11 +02001368 Define this if data bus is 32 bits
1369
Mike Rapoportc2fff332009-11-11 10:03:03 +02001370 CONFIG_SMC911X_16_BIT
Jens Gehrlein557b3772008-05-05 14:06:11 +02001371 Define this if data bus is 16 bits. If your processor
1372 automatically converts one 32 bit word to two 16 bit
Mike Rapoportc2fff332009-11-11 10:03:03 +02001373 words you may also try CONFIG_SMC911X_32_BIT.
Jens Gehrlein557b3772008-05-05 14:06:11 +02001374
Yoshihiro Shimoda3d0075f2011-01-27 10:06:03 +09001375 CONFIG_SH_ETHER
1376 Support for Renesas on-chip Ethernet controller
1377
1378 CONFIG_SH_ETHER_USE_PORT
1379 Define the number of ports to be used
1380
1381 CONFIG_SH_ETHER_PHY_ADDR
1382 Define the ETH PHY's address
1383
Yoshihiro Shimoda68260aa2011-01-27 10:06:08 +09001384 CONFIG_SH_ETHER_CACHE_WRITEBACK
1385 If this option is set, the driver enables cache flush.
1386
Heiko Schocherb2f97cf2014-07-18 06:07:19 +02001387- PWM Support:
1388 CONFIG_PWM_IMX
1389 Support for PWM modul on the imx6.
1390
Vadim Bendebury5e124722011-10-17 08:36:14 +00001391- TPM Support:
Che-liang Chiou90899cc2013-04-12 11:04:34 +00001392 CONFIG_TPM
1393 Support TPM devices.
1394
Tom Wai-Hong Tam1b393db2013-04-12 11:04:37 +00001395 CONFIG_TPM_TIS_I2C
1396 Support for i2c bus TPM devices. Only one device
1397 per system is supported at this time.
1398
1399 CONFIG_TPM_TIS_I2C_BUS_NUMBER
1400 Define the the i2c bus number for the TPM device
1401
1402 CONFIG_TPM_TIS_I2C_SLAVE_ADDRESS
1403 Define the TPM's address on the i2c bus
1404
1405 CONFIG_TPM_TIS_I2C_BURST_LIMITATION
1406 Define the burst count bytes upper limit
1407
Dirk Eibachc01939c2013-06-26 15:55:15 +02001408 CONFIG_TPM_ATMEL_TWI
1409 Support for Atmel TWI TPM device. Requires I2C support.
1410
Che-liang Chiou90899cc2013-04-12 11:04:34 +00001411 CONFIG_TPM_TIS_LPC
Vadim Bendebury5e124722011-10-17 08:36:14 +00001412 Support for generic parallel port TPM devices. Only one device
1413 per system is supported at this time.
1414
1415 CONFIG_TPM_TIS_BASE_ADDRESS
1416 Base address where the generic TPM device is mapped
1417 to. Contemporary x86 systems usually map it at
1418 0xfed40000.
1419
Reinhard Pfaube6c1522013-06-26 15:55:13 +02001420 CONFIG_CMD_TPM
1421 Add tpm monitor functions.
1422 Requires CONFIG_TPM. If CONFIG_TPM_AUTH_SESSIONS is set, also
1423 provides monitor access to authorized functions.
1424
1425 CONFIG_TPM
1426 Define this to enable the TPM support library which provides
1427 functional interfaces to some TPM commands.
1428 Requires support for a TPM device.
1429
1430 CONFIG_TPM_AUTH_SESSIONS
1431 Define this to enable authorized functions in the TPM library.
1432 Requires CONFIG_TPM and CONFIG_SHA1.
1433
wdenkc6097192002-11-03 00:24:07 +00001434- USB Support:
1435 At the moment only the UHCI host controller is
wdenk4d13cba2004-03-14 14:09:05 +00001436 supported (PIP405, MIP405, MPC5200); define
wdenkc6097192002-11-03 00:24:07 +00001437 CONFIG_USB_UHCI to enable it.
1438 define CONFIG_USB_KEYBOARD to enable the USB Keyboard
wdenk30d56fa2004-10-09 22:44:59 +00001439 and define CONFIG_USB_STORAGE to enable the USB
wdenkc6097192002-11-03 00:24:07 +00001440 storage devices.
1441 Note:
1442 Supported are USB Keyboards and USB Floppy drives
1443 (TEAC FD-05PUB).
wdenk4d13cba2004-03-14 14:09:05 +00001444 MPC5200 USB requires additional defines:
1445 CONFIG_USB_CLOCK
1446 for 528 MHz Clock: 0x0001bbbb
Eric Millbrandt307ecb62009-08-13 08:32:37 -05001447 CONFIG_PSC3_USB
1448 for USB on PSC3
wdenk4d13cba2004-03-14 14:09:05 +00001449 CONFIG_USB_CONFIG
1450 for differential drivers: 0x00001000
1451 for single ended drivers: 0x00005000
Eric Millbrandt307ecb62009-08-13 08:32:37 -05001452 for differential drivers on PSC3: 0x00000100
1453 for single ended drivers on PSC3: 0x00004100
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +02001454 CONFIG_SYS_USB_EVENT_POLL
Zhang Weifdcfaa12007-06-06 10:08:13 +02001455 May be defined to allow interrupt polling
1456 instead of using asynchronous interrupts
wdenk4d13cba2004-03-14 14:09:05 +00001457
Simon Glass9ab4ce22012-02-27 10:52:47 +00001458 CONFIG_USB_EHCI_TXFIFO_THRESH enables setting of the
1459 txfilltuning field in the EHCI controller on reset.
1460
Oleksandr Tymoshenko6e9e0622014-02-01 21:51:25 -07001461 CONFIG_USB_DWC2_REG_ADDR the physical CPU address of the DWC2
1462 HW module registers.
1463
Wolfgang Denk16c8d5e2006-06-14 17:45:53 +02001464- USB Device:
1465 Define the below if you wish to use the USB console.
1466 Once firmware is rebuilt from a serial console issue the
1467 command "setenv stdin usbtty; setenv stdout usbtty" and
Marcel Ziswiler11ccc332008-07-09 08:17:15 +02001468 attach your USB cable. The Unix command "dmesg" should print
Wolfgang Denk16c8d5e2006-06-14 17:45:53 +02001469 it has found a new device. The environment variable usbtty
1470 can be set to gserial or cdc_acm to enable your device to
Wolfgang Denk386eda02006-06-14 18:14:56 +02001471 appear to a USB host as a Linux gserial device or a
Wolfgang Denk16c8d5e2006-06-14 17:45:53 +02001472 Common Device Class Abstract Control Model serial device.
1473 If you select usbtty = gserial you should be able to enumerate
1474 a Linux host by
1475 # modprobe usbserial vendor=0xVendorID product=0xProductID
1476 else if using cdc_acm, simply setting the environment
1477 variable usbtty to be cdc_acm should suffice. The following
1478 might be defined in YourBoardName.h
Wolfgang Denk386eda02006-06-14 18:14:56 +02001479
Wolfgang Denk16c8d5e2006-06-14 17:45:53 +02001480 CONFIG_USB_DEVICE
1481 Define this to build a UDC device
wdenkc6097192002-11-03 00:24:07 +00001482
Wolfgang Denk16c8d5e2006-06-14 17:45:53 +02001483 CONFIG_USB_TTY
1484 Define this to have a tty type of device available to
1485 talk to the UDC device
Wolfgang Denk386eda02006-06-14 18:14:56 +02001486
Vipin KUMARf9da0f82012-03-26 15:38:06 +05301487 CONFIG_USBD_HS
1488 Define this to enable the high speed support for usb
1489 device and usbtty. If this feature is enabled, a routine
1490 int is_usbd_high_speed(void)
1491 also needs to be defined by the driver to dynamically poll
1492 whether the enumeration has succeded at high speed or full
1493 speed.
1494
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +02001495 CONFIG_SYS_CONSOLE_IS_IN_ENV
Wolfgang Denk16c8d5e2006-06-14 17:45:53 +02001496 Define this if you want stdin, stdout &/or stderr to
1497 be set to usbtty.
1498
1499 mpc8xx:
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +02001500 CONFIG_SYS_USB_EXTC_CLK 0xBLAH
Wolfgang Denk16c8d5e2006-06-14 17:45:53 +02001501 Derive USB clock from external clock "blah"
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +02001502 - CONFIG_SYS_USB_EXTC_CLK 0x02
Wolfgang Denk386eda02006-06-14 18:14:56 +02001503
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +02001504 CONFIG_SYS_USB_BRG_CLK 0xBLAH
Wolfgang Denk16c8d5e2006-06-14 17:45:53 +02001505 Derive USB clock from brgclk
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +02001506 - CONFIG_SYS_USB_BRG_CLK 0x04
Wolfgang Denk16c8d5e2006-06-14 17:45:53 +02001507
Wolfgang Denk386eda02006-06-14 18:14:56 +02001508 If you have a USB-IF assigned VendorID then you may wish to
Wolfgang Denk16c8d5e2006-06-14 17:45:53 +02001509 define your own vendor specific values either in BoardName.h
Wolfgang Denk386eda02006-06-14 18:14:56 +02001510 or directly in usbd_vendor_info.h. If you don't define
Wolfgang Denk16c8d5e2006-06-14 17:45:53 +02001511 CONFIG_USBD_MANUFACTURER, CONFIG_USBD_PRODUCT_NAME,
1512 CONFIG_USBD_VENDORID and CONFIG_USBD_PRODUCTID, then U-Boot
1513 should pretend to be a Linux device to it's target host.
1514
1515 CONFIG_USBD_MANUFACTURER
1516 Define this string as the name of your company for
1517 - CONFIG_USBD_MANUFACTURER "my company"
Wolfgang Denk386eda02006-06-14 18:14:56 +02001518
Wolfgang Denk16c8d5e2006-06-14 17:45:53 +02001519 CONFIG_USBD_PRODUCT_NAME
1520 Define this string as the name of your product
1521 - CONFIG_USBD_PRODUCT_NAME "acme usb device"
1522
1523 CONFIG_USBD_VENDORID
1524 Define this as your assigned Vendor ID from the USB
1525 Implementors Forum. This *must* be a genuine Vendor ID
1526 to avoid polluting the USB namespace.
1527 - CONFIG_USBD_VENDORID 0xFFFF
Wolfgang Denk386eda02006-06-14 18:14:56 +02001528
Wolfgang Denk16c8d5e2006-06-14 17:45:53 +02001529 CONFIG_USBD_PRODUCTID
1530 Define this as the unique Product ID
1531 for your device
1532 - CONFIG_USBD_PRODUCTID 0xFFFF
wdenkc6097192002-11-03 00:24:07 +00001533
Igor Grinbergd70a5602011-12-12 12:08:35 +02001534- ULPI Layer Support:
1535 The ULPI (UTMI Low Pin (count) Interface) PHYs are supported via
1536 the generic ULPI layer. The generic layer accesses the ULPI PHY
1537 via the platform viewport, so you need both the genric layer and
1538 the viewport enabled. Currently only Chipidea/ARC based
1539 viewport is supported.
1540 To enable the ULPI layer support, define CONFIG_USB_ULPI and
1541 CONFIG_USB_ULPI_VIEWPORT in your board configuration file.
Lucas Stach6d365ea2012-10-01 00:44:35 +02001542 If your ULPI phy needs a different reference clock than the
1543 standard 24 MHz then you have to define CONFIG_ULPI_REF_CLK to
1544 the appropriate value in Hz.
wdenkc6097192002-11-03 00:24:07 +00001545
1546- MMC Support:
1547 The MMC controller on the Intel PXA is supported. To
1548 enable this define CONFIG_MMC. The MMC can be
1549 accessed from the boot prompt by mapping the device
1550 to physical memory similar to flash. Command line is
Jon Loeliger602ad3b2007-06-11 19:03:39 -05001551 enabled with CONFIG_CMD_MMC. The MMC driver also works with
1552 the FAT fs. This is enabled with CONFIG_CMD_FAT.
wdenkc6097192002-11-03 00:24:07 +00001553
Yoshihiro Shimodaafb35662011-07-04 22:21:22 +00001554 CONFIG_SH_MMCIF
1555 Support for Renesas on-chip MMCIF controller
1556
1557 CONFIG_SH_MMCIF_ADDR
1558 Define the base address of MMCIF registers
1559
1560 CONFIG_SH_MMCIF_CLK
1561 Define the clock frequency for MMCIF
1562
Pierre Aubert1fd93c62014-04-24 10:30:08 +02001563 CONFIG_GENERIC_MMC
1564 Enable the generic MMC driver
1565
1566 CONFIG_SUPPORT_EMMC_BOOT
1567 Enable some additional features of the eMMC boot partitions.
1568
1569 CONFIG_SUPPORT_EMMC_RPMB
1570 Enable the commands for reading, writing and programming the
1571 key for the Replay Protection Memory Block partition in eMMC.
1572
Tom Rinib3ba6e92013-03-14 05:32:47 +00001573- USB Device Firmware Update (DFU) class support:
1574 CONFIG_DFU_FUNCTION
1575 This enables the USB portion of the DFU USB class
1576
1577 CONFIG_CMD_DFU
1578 This enables the command "dfu" which is used to have
1579 U-Boot create a DFU class device via USB. This command
1580 requires that the "dfu_alt_info" environment variable be
1581 set and define the alt settings to expose to the host.
1582
1583 CONFIG_DFU_MMC
1584 This enables support for exposing (e)MMC devices via DFU.
1585
Pantelis Antoniouc6631762013-03-14 05:32:52 +00001586 CONFIG_DFU_NAND
1587 This enables support for exposing NAND devices via DFU.
1588
Afzal Mohammeda9479f02013-09-18 01:15:24 +05301589 CONFIG_DFU_RAM
1590 This enables support for exposing RAM via DFU.
1591 Note: DFU spec refer to non-volatile memory usage, but
1592 allow usages beyond the scope of spec - here RAM usage,
1593 one that would help mostly the developer.
1594
Heiko Schochere7e75c72013-06-12 06:05:51 +02001595 CONFIG_SYS_DFU_DATA_BUF_SIZE
1596 Dfu transfer uses a buffer before writing data to the
1597 raw storage device. Make the size (in bytes) of this buffer
1598 configurable. The size of this buffer is also configurable
1599 through the "dfu_bufsiz" environment variable.
1600
Pantelis Antoniouea2453d2013-03-14 05:32:48 +00001601 CONFIG_SYS_DFU_MAX_FILE_SIZE
1602 When updating files rather than the raw storage device,
1603 we use a static buffer to copy the file into and then write
1604 the buffer once we've been given the whole file. Define
1605 this to the maximum filesize (in bytes) for the buffer.
1606 Default is 4 MiB if undefined.
1607
Heiko Schocher001a8312014-03-18 08:09:56 +01001608 DFU_DEFAULT_POLL_TIMEOUT
1609 Poll timeout [ms], is the timeout a device can send to the
1610 host. The host must wait for this timeout before sending
1611 a subsequent DFU_GET_STATUS request to the device.
1612
1613 DFU_MANIFEST_POLL_TIMEOUT
1614 Poll timeout [ms], which the device sends to the host when
1615 entering dfuMANIFEST state. Host waits this timeout, before
1616 sending again an USB request to the device.
1617
Sebastian Siewior3aab70a2014-05-05 15:08:10 -05001618- USB Device Android Fastboot support:
1619 CONFIG_CMD_FASTBOOT
1620 This enables the command "fastboot" which enables the Android
1621 fastboot mode for the platform's USB device. Fastboot is a USB
1622 protocol for downloading images, flashing and device control
1623 used on Android devices.
1624 See doc/README.android-fastboot for more information.
1625
1626 CONFIG_ANDROID_BOOT_IMAGE
1627 This enables support for booting images which use the Android
1628 image format header.
1629
1630 CONFIG_USB_FASTBOOT_BUF_ADDR
1631 The fastboot protocol requires a large memory buffer for
1632 downloads. Define this to the starting RAM address to use for
1633 downloaded images.
1634
1635 CONFIG_USB_FASTBOOT_BUF_SIZE
1636 The fastboot protocol requires a large memory buffer for
1637 downloads. This buffer should be as large as possible for a
1638 platform. Define this to the size available RAM for fastboot.
1639
Steve Raed1b5ed02014-08-26 11:47:28 -07001640 CONFIG_FASTBOOT_FLASH
1641 The fastboot protocol includes a "flash" command for writing
1642 the downloaded image to a non-volatile storage device. Define
1643 this to enable the "fastboot flash" command.
1644
1645 CONFIG_FASTBOOT_FLASH_MMC_DEV
1646 The fastboot "flash" command requires additional information
1647 regarding the non-volatile storage device. Define this to
1648 the eMMC device that fastboot should use to store the image.
1649
wdenk6705d812004-08-02 23:22:59 +00001650- Journaling Flash filesystem support:
1651 CONFIG_JFFS2_NAND, CONFIG_JFFS2_NAND_OFF, CONFIG_JFFS2_NAND_SIZE,
1652 CONFIG_JFFS2_NAND_DEV
1653 Define these for a default partition on a NAND device
1654
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +02001655 CONFIG_SYS_JFFS2_FIRST_SECTOR,
1656 CONFIG_SYS_JFFS2_FIRST_BANK, CONFIG_SYS_JFFS2_NUM_BANKS
wdenk6705d812004-08-02 23:22:59 +00001657 Define these for a default partition on a NOR device
1658
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +02001659 CONFIG_SYS_JFFS_CUSTOM_PART
wdenk6705d812004-08-02 23:22:59 +00001660 Define this to create an own partition. You have to provide a
1661 function struct part_info* jffs2_part_info(int part_num)
1662
1663 If you define only one JFFS2 partition you may also want to
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +02001664 #define CONFIG_SYS_JFFS_SINGLE_PART 1
wdenk6705d812004-08-02 23:22:59 +00001665 to disable the command chpart. This is the default when you
1666 have not defined a custom partition
1667
Donggeun Kimc30a15e2011-10-24 21:15:28 +00001668- FAT(File Allocation Table) filesystem write function support:
1669 CONFIG_FAT_WRITE
Donggeun Kim656f4c62012-03-22 04:38:56 +00001670
1671 Define this to enable support for saving memory data as a
1672 file in FAT formatted partition.
1673
1674 This will also enable the command "fatwrite" enabling the
1675 user to write files to FAT.
Donggeun Kimc30a15e2011-10-24 21:15:28 +00001676
Gabe Black84cd9322012-10-12 14:26:11 +00001677CBFS (Coreboot Filesystem) support
1678 CONFIG_CMD_CBFS
1679
1680 Define this to enable support for reading from a Coreboot
1681 filesystem. Available commands are cbfsinit, cbfsinfo, cbfsls
1682 and cbfsload.
1683
Siva Durga Prasad Paladugu4f0d1a22014-05-26 19:18:37 +05301684- FAT(File Allocation Table) filesystem cluster size:
1685 CONFIG_FS_FAT_MAX_CLUSTSIZE
1686
1687 Define the max cluster size for fat operations else
1688 a default value of 65536 will be defined.
1689
wdenkc6097192002-11-03 00:24:07 +00001690- Keyboard Support:
1691 CONFIG_ISA_KEYBOARD
1692
1693 Define this to enable standard (PC-Style) keyboard
1694 support
1695
1696 CONFIG_I8042_KBD
1697 Standard PC keyboard driver with US (is default) and
1698 GERMAN key layout (switch via environment 'keymap=de') support.
1699 Export function i8042_kbd_init, i8042_tstc and i8042_getc
1700 for cfb_console. Supports cursor blinking.
1701
Hung-ying Tyan713cb682013-05-15 18:27:32 +08001702 CONFIG_CROS_EC_KEYB
1703 Enables a Chrome OS keyboard using the CROS_EC interface.
1704 This uses CROS_EC to communicate with a second microcontroller
1705 which provides key scans on request.
1706
wdenkc6097192002-11-03 00:24:07 +00001707- Video support:
1708 CONFIG_VIDEO
1709
1710 Define this to enable video support (for output to
1711 video).
1712
1713 CONFIG_VIDEO_CT69000
1714
1715 Enable Chips & Technologies 69000 Video chip
1716
1717 CONFIG_VIDEO_SMI_LYNXEM
wdenkb79a11c2004-03-25 15:14:43 +00001718 Enable Silicon Motion SMI 712/710/810 Video chip. The
wdenkeeb1b772004-03-23 22:53:55 +00001719 video output is selected via environment 'videoout'
1720 (1 = LCD and 2 = CRT). If videoout is undefined, CRT is
1721 assumed.
wdenkc6097192002-11-03 00:24:07 +00001722
wdenkb79a11c2004-03-25 15:14:43 +00001723 For the CT69000 and SMI_LYNXEM drivers, videomode is
Marcel Ziswiler11ccc332008-07-09 08:17:15 +02001724 selected via environment 'videomode'. Two different ways
wdenkeeb1b772004-03-23 22:53:55 +00001725 are possible:
1726 - "videomode=num" 'num' is a standard LiLo mode numbers.
wdenk6e592382004-04-18 17:39:38 +00001727 Following standard modes are supported (* is default):
wdenkeeb1b772004-03-23 22:53:55 +00001728
1729 Colors 640x480 800x600 1024x768 1152x864 1280x1024
1730 -------------+---------------------------------------------
1731 8 bits | 0x301* 0x303 0x305 0x161 0x307
1732 15 bits | 0x310 0x313 0x316 0x162 0x319
1733 16 bits | 0x311 0x314 0x317 0x163 0x31A
1734 24 bits | 0x312 0x315 0x318 ? 0x31B
1735 -------------+---------------------------------------------
wdenkc6097192002-11-03 00:24:07 +00001736 (i.e. setenv videomode 317; saveenv; reset;)
1737
wdenkb79a11c2004-03-25 15:14:43 +00001738 - "videomode=bootargs" all the video parameters are parsed
Marcel Ziswiler7817cb22007-12-30 03:30:46 +01001739 from the bootargs. (See drivers/video/videomodes.c)
wdenkeeb1b772004-03-23 22:53:55 +00001740
1741
stroesec1551ea2003-04-04 15:53:41 +00001742 CONFIG_VIDEO_SED13806
wdenk43d96162003-03-06 00:02:04 +00001743 Enable Epson SED13806 driver. This driver supports 8bpp
wdenka6c7ad22002-12-03 21:28:10 +00001744 and 16bpp modes defined by CONFIG_VIDEO_SED13806_8BPP
1745 or CONFIG_VIDEO_SED13806_16BPP
1746
Timur Tabi7d3053f2011-02-15 17:09:19 -06001747 CONFIG_FSL_DIU_FB
Wolfgang Denk04e5ae72011-09-11 21:24:09 +02001748 Enable the Freescale DIU video driver. Reference boards for
Timur Tabi7d3053f2011-02-15 17:09:19 -06001749 SOCs that have a DIU should define this macro to enable DIU
1750 support, and should also define these other macros:
1751
1752 CONFIG_SYS_DIU_ADDR
1753 CONFIG_VIDEO
1754 CONFIG_CMD_BMP
1755 CONFIG_CFB_CONSOLE
1756 CONFIG_VIDEO_SW_CURSOR
1757 CONFIG_VGA_AS_SINGLE_DEVICE
1758 CONFIG_VIDEO_LOGO
1759 CONFIG_VIDEO_BMP_LOGO
1760
Timur Tabiba8e76b2011-04-11 14:18:22 -05001761 The DIU driver will look for the 'video-mode' environment
1762 variable, and if defined, enable the DIU as a console during
1763 boot. See the documentation file README.video for a
1764 description of this variable.
Timur Tabi7d3053f2011-02-15 17:09:19 -06001765
Simon Glass058d59b2012-12-03 13:59:47 +00001766 CONFIG_VIDEO_VGA
1767
1768 Enable the VGA video / BIOS for x86. The alternative if you
1769 are using coreboot is to use the coreboot frame buffer
1770 driver.
1771
1772
wdenk682011f2003-06-03 23:54:09 +00001773- Keyboard Support:
wdenk8bde7f72003-06-27 21:31:46 +00001774 CONFIG_KEYBOARD
wdenk682011f2003-06-03 23:54:09 +00001775
wdenk8bde7f72003-06-27 21:31:46 +00001776 Define this to enable a custom keyboard support.
1777 This simply calls drv_keyboard_init() which must be
1778 defined in your board-specific files.
1779 The only board using this so far is RBC823.
wdenka6c7ad22002-12-03 21:28:10 +00001780
wdenkc6097192002-11-03 00:24:07 +00001781- LCD Support: CONFIG_LCD
1782
1783 Define this to enable LCD support (for output to LCD
1784 display); also select one of the supported displays
1785 by defining one of these:
1786
Stelian Pop39cf4802008-05-09 21:57:18 +02001787 CONFIG_ATMEL_LCD:
1788
1789 HITACHI TX09D70VM1CCA, 3.5", 240x320.
1790
wdenkfd3103b2003-11-25 16:55:19 +00001791 CONFIG_NEC_NL6448AC33:
wdenkc6097192002-11-03 00:24:07 +00001792
wdenkfd3103b2003-11-25 16:55:19 +00001793 NEC NL6448AC33-18. Active, color, single scan.
wdenkc6097192002-11-03 00:24:07 +00001794
wdenkfd3103b2003-11-25 16:55:19 +00001795 CONFIG_NEC_NL6448BC20
wdenkc6097192002-11-03 00:24:07 +00001796
wdenkfd3103b2003-11-25 16:55:19 +00001797 NEC NL6448BC20-08. 6.5", 640x480.
1798 Active, color, single scan.
1799
1800 CONFIG_NEC_NL6448BC33_54
1801
1802 NEC NL6448BC33-54. 10.4", 640x480.
wdenkc6097192002-11-03 00:24:07 +00001803 Active, color, single scan.
1804
1805 CONFIG_SHARP_16x9
1806
1807 Sharp 320x240. Active, color, single scan.
1808 It isn't 16x9, and I am not sure what it is.
1809
1810 CONFIG_SHARP_LQ64D341
1811
1812 Sharp LQ64D341 display, 640x480.
1813 Active, color, single scan.
1814
1815 CONFIG_HLD1045
1816
1817 HLD1045 display, 640x480.
1818 Active, color, single scan.
1819
1820 CONFIG_OPTREX_BW
1821
1822 Optrex CBL50840-2 NF-FW 99 22 M5
1823 or
1824 Hitachi LMG6912RPFC-00T
1825 or
1826 Hitachi SP14Q002
1827
1828 320x240. Black & white.
1829
1830 Normally display is black on white background; define
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +02001831 CONFIG_SYS_WHITE_ON_BLACK to get it inverted.
wdenkc6097192002-11-03 00:24:07 +00001832
Simon Glass676d3192012-10-17 13:24:54 +00001833 CONFIG_LCD_ALIGNMENT
1834
1835 Normally the LCD is page-aligned (tyically 4KB). If this is
1836 defined then the LCD will be aligned to this value instead.
1837 For ARM it is sometimes useful to use MMU_SECTION_SIZE
1838 here, since it is cheaper to change data cache settings on
1839 a per-section basis.
1840
Simon Glass0d89efe2012-10-17 13:24:59 +00001841 CONFIG_CONSOLE_SCROLL_LINES
1842
1843 When the console need to be scrolled, this is the number of
1844 lines to scroll by. It defaults to 1. Increasing this makes
1845 the console jump but can help speed up operation when scrolling
1846 is slow.
Simon Glass676d3192012-10-17 13:24:54 +00001847
Tom Wai-Hong Tam45d7f522012-09-28 15:11:16 +00001848 CONFIG_LCD_BMP_RLE8
1849
1850 Support drawing of RLE8-compressed bitmaps on the LCD.
1851
Tom Wai-Hong Tam735987c2012-12-05 14:46:40 +00001852 CONFIG_I2C_EDID
1853
1854 Enables an 'i2c edid' command which can read EDID
1855 information over I2C from an attached LCD display.
1856
wdenk7152b1d2003-09-05 23:19:14 +00001857- Splash Screen Support: CONFIG_SPLASH_SCREEN
wdenkd791b1d2003-04-20 14:04:18 +00001858
wdenk8bde7f72003-06-27 21:31:46 +00001859 If this option is set, the environment is checked for
1860 a variable "splashimage". If found, the usual display
1861 of logo, copyright and system information on the LCD
wdenke94d2cd2004-06-30 22:59:18 +00001862 is suppressed and the BMP image at the address
wdenk8bde7f72003-06-27 21:31:46 +00001863 specified in "splashimage" is loaded instead. The
1864 console is redirected to the "nulldev", too. This
1865 allows for a "silent" boot where a splash screen is
1866 loaded very quickly after power-on.
wdenkd791b1d2003-04-20 14:04:18 +00001867
Nikita Kiryanovc0880482013-02-24 21:28:43 +00001868 CONFIG_SPLASHIMAGE_GUARD
1869
1870 If this option is set, then U-Boot will prevent the environment
1871 variable "splashimage" from being set to a problematic address
Tom Rini1551df32014-02-25 10:27:01 -05001872 (see README.displaying-bmps).
Nikita Kiryanovc0880482013-02-24 21:28:43 +00001873 This option is useful for targets where, due to alignment
1874 restrictions, an improperly aligned BMP image will cause a data
1875 abort. If you think you will not have problems with unaligned
1876 accesses (for example because your toolchain prevents them)
1877 there is no need to set this option.
1878
Matthias Weisser1ca298c2009-07-09 16:07:30 +02001879 CONFIG_SPLASH_SCREEN_ALIGN
1880
1881 If this option is set the splash image can be freely positioned
1882 on the screen. Environment variable "splashpos" specifies the
1883 position as "x,y". If a positive number is given it is used as
1884 number of pixel from left/top. If a negative number is given it
1885 is used as number of pixel from right/bottom. You can also
1886 specify 'm' for centering the image.
1887
1888 Example:
1889 setenv splashpos m,m
1890 => image at center of screen
1891
1892 setenv splashpos 30,20
1893 => image at x = 30 and y = 20
1894
1895 setenv splashpos -10,m
1896 => vertically centered image
1897 at x = dspWidth - bmpWidth - 9
1898
Stefan Roese98f4a3d2005-09-22 09:04:17 +02001899- Gzip compressed BMP image support: CONFIG_VIDEO_BMP_GZIP
1900
1901 If this option is set, additionally to standard BMP
1902 images, gzipped BMP images can be displayed via the
1903 splashscreen support or the bmp command.
1904
Anatolij Gustschind5011762010-03-15 14:50:25 +01001905- Run length encoded BMP image (RLE8) support: CONFIG_VIDEO_BMP_RLE8
1906
1907 If this option is set, 8-bit RLE compressed BMP images
1908 can be displayed via the splashscreen support or the
1909 bmp command.
1910
Lei Wenf2b96df2012-09-28 04:26:47 +00001911- Do compresssing for memory range:
1912 CONFIG_CMD_ZIP
1913
1914 If this option is set, it would use zlib deflate method
1915 to compress the specified memory at its best effort.
1916
wdenkc29fdfc2003-08-29 20:57:53 +00001917- Compression support:
Kees Cook8ef70472013-08-16 07:59:12 -07001918 CONFIG_GZIP
1919
1920 Enabled by default to support gzip compressed images.
1921
wdenkc29fdfc2003-08-29 20:57:53 +00001922 CONFIG_BZIP2
1923
1924 If this option is set, support for bzip2 compressed
1925 images is included. If not, only uncompressed and gzip
1926 compressed images are supported.
1927
wdenk42d1f032003-10-15 23:53:47 +00001928 NOTE: the bzip2 algorithm requires a lot of RAM, so
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +02001929 the malloc area (as defined by CONFIG_SYS_MALLOC_LEN) should
wdenk42d1f032003-10-15 23:53:47 +00001930 be at least 4MB.
wdenkd791b1d2003-04-20 14:04:18 +00001931
Luigi 'Comio' Mantellinifc9c1722008-09-08 02:46:13 +02001932 CONFIG_LZMA
1933
1934 If this option is set, support for lzma compressed
1935 images is included.
1936
1937 Note: The LZMA algorithm adds between 2 and 4KB of code and it
1938 requires an amount of dynamic memory that is given by the
1939 formula:
1940
1941 (1846 + 768 << (lc + lp)) * sizeof(uint16)
1942
1943 Where lc and lp stand for, respectively, Literal context bits
1944 and Literal pos bits.
1945
1946 This value is upper-bounded by 14MB in the worst case. Anyway,
1947 for a ~4MB large kernel image, we have lc=3 and lp=0 for a
1948 total amount of (1846 + 768 << (3 + 0)) * 2 = ~41KB... that is
1949 a very small buffer.
1950
1951 Use the lzmainfo tool to determinate the lc and lp values and
1952 then calculate the amount of needed dynamic memory (ensuring
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +02001953 the appropriate CONFIG_SYS_MALLOC_LEN value).
Luigi 'Comio' Mantellinifc9c1722008-09-08 02:46:13 +02001954
Kees Cook8ef70472013-08-16 07:59:12 -07001955 CONFIG_LZO
1956
1957 If this option is set, support for LZO compressed images
1958 is included.
1959
wdenk17ea1172004-06-06 21:51:03 +00001960- MII/PHY support:
1961 CONFIG_PHY_ADDR
1962
1963 The address of PHY on MII bus.
1964
1965 CONFIG_PHY_CLOCK_FREQ (ppc4xx)
1966
1967 The clock frequency of the MII bus
1968
1969 CONFIG_PHY_GIGE
1970
1971 If this option is set, support for speed/duplex
Marcel Ziswiler11ccc332008-07-09 08:17:15 +02001972 detection of gigabit PHY is included.
wdenk17ea1172004-06-06 21:51:03 +00001973
1974 CONFIG_PHY_RESET_DELAY
1975
1976 Some PHY like Intel LXT971A need extra delay after
1977 reset before any MII register access is possible.
1978 For such PHY, set this option to the usec delay
1979 required. (minimum 300usec for LXT971A)
1980
1981 CONFIG_PHY_CMD_DELAY (ppc4xx)
1982
1983 Some PHY like Intel LXT971A need extra delay after
1984 command issued before MII status register can be read
1985
wdenkc6097192002-11-03 00:24:07 +00001986- Ethernet address:
1987 CONFIG_ETHADDR
richardretanubunc68a05f2008-09-29 18:28:23 -04001988 CONFIG_ETH1ADDR
wdenkc6097192002-11-03 00:24:07 +00001989 CONFIG_ETH2ADDR
1990 CONFIG_ETH3ADDR
richardretanubunc68a05f2008-09-29 18:28:23 -04001991 CONFIG_ETH4ADDR
1992 CONFIG_ETH5ADDR
wdenkc6097192002-11-03 00:24:07 +00001993
Marcel Ziswiler11ccc332008-07-09 08:17:15 +02001994 Define a default value for Ethernet address to use
1995 for the respective Ethernet interface, in case this
wdenkc6097192002-11-03 00:24:07 +00001996 is not determined automatically.
1997
1998- IP address:
1999 CONFIG_IPADDR
2000
2001 Define a default value for the IP address to use for
Marcel Ziswiler11ccc332008-07-09 08:17:15 +02002002 the default Ethernet interface, in case this is not
wdenkc6097192002-11-03 00:24:07 +00002003 determined through e.g. bootp.
Wolfgang Denk1ebcd652011-10-26 10:21:22 +00002004 (Environment variable "ipaddr")
wdenkc6097192002-11-03 00:24:07 +00002005
2006- Server IP address:
2007 CONFIG_SERVERIP
2008
Marcel Ziswiler11ccc332008-07-09 08:17:15 +02002009 Defines a default value for the IP address of a TFTP
wdenkc6097192002-11-03 00:24:07 +00002010 server to contact when using the "tftboot" command.
Wolfgang Denk1ebcd652011-10-26 10:21:22 +00002011 (Environment variable "serverip")
wdenkc6097192002-11-03 00:24:07 +00002012
Robin Getz97cfe862009-07-21 12:15:28 -04002013 CONFIG_KEEP_SERVERADDR
2014
2015 Keeps the server's MAC address, in the env 'serveraddr'
2016 for passing to bootargs (like Linux's netconsole option)
2017
Wolfgang Denk1ebcd652011-10-26 10:21:22 +00002018- Gateway IP address:
2019 CONFIG_GATEWAYIP
2020
2021 Defines a default value for the IP address of the
2022 default router where packets to other networks are
2023 sent to.
2024 (Environment variable "gatewayip")
2025
2026- Subnet mask:
2027 CONFIG_NETMASK
2028
2029 Defines a default value for the subnet mask (or
2030 routing prefix) which is used to determine if an IP
2031 address belongs to the local subnet or needs to be
2032 forwarded through a router.
2033 (Environment variable "netmask")
2034
David Updegraff53a5c422007-06-11 10:41:07 -05002035- Multicast TFTP Mode:
2036 CONFIG_MCAST_TFTP
2037
2038 Defines whether you want to support multicast TFTP as per
2039 rfc-2090; for example to work with atftp. Lets lots of targets
Marcel Ziswiler11ccc332008-07-09 08:17:15 +02002040 tftp down the same boot image concurrently. Note: the Ethernet
David Updegraff53a5c422007-06-11 10:41:07 -05002041 driver in use must provide a function: mcast() to join/leave a
2042 multicast group.
2043
wdenkc6097192002-11-03 00:24:07 +00002044- BOOTP Recovery Mode:
2045 CONFIG_BOOTP_RANDOM_DELAY
2046
2047 If you have many targets in a network that try to
2048 boot using BOOTP, you may want to avoid that all
2049 systems send out BOOTP requests at precisely the same
2050 moment (which would happen for instance at recovery
2051 from a power failure, when all systems will try to
2052 boot, thus flooding the BOOTP server. Defining
2053 CONFIG_BOOTP_RANDOM_DELAY causes a random delay to be
2054 inserted before sending out BOOTP requests. The
Wolfgang Denk6c33c782007-08-06 23:21:05 +02002055 following delays are inserted then:
wdenkc6097192002-11-03 00:24:07 +00002056
2057 1st BOOTP request: delay 0 ... 1 sec
2058 2nd BOOTP request: delay 0 ... 2 sec
2059 3rd BOOTP request: delay 0 ... 4 sec
2060 4th and following
2061 BOOTP requests: delay 0 ... 8 sec
2062
Thierry Reding92ac8ac2014-08-19 10:21:24 +02002063 CONFIG_BOOTP_ID_CACHE_SIZE
2064
2065 BOOTP packets are uniquely identified using a 32-bit ID. The
2066 server will copy the ID from client requests to responses and
2067 U-Boot will use this to determine if it is the destination of
2068 an incoming response. Some servers will check that addresses
2069 aren't in use before handing them out (usually using an ARP
2070 ping) and therefore take up to a few hundred milliseconds to
2071 respond. Network congestion may also influence the time it
2072 takes for a response to make it back to the client. If that
2073 time is too long, U-Boot will retransmit requests. In order
2074 to allow earlier responses to still be accepted after these
2075 retransmissions, U-Boot's BOOTP client keeps a small cache of
2076 IDs. The CONFIG_BOOTP_ID_CACHE_SIZE controls the size of this
2077 cache. The default is to keep IDs for up to four outstanding
2078 requests. Increasing this will allow U-Boot to accept offers
2079 from a BOOTP client in networks with unusually high latency.
2080
stroesefe389a82003-08-28 14:17:32 +00002081- DHCP Advanced Options:
Jon Loeliger1fe80d72007-07-09 22:08:34 -05002082 You can fine tune the DHCP functionality by defining
2083 CONFIG_BOOTP_* symbols:
stroesefe389a82003-08-28 14:17:32 +00002084
Jon Loeliger1fe80d72007-07-09 22:08:34 -05002085 CONFIG_BOOTP_SUBNETMASK
2086 CONFIG_BOOTP_GATEWAY
2087 CONFIG_BOOTP_HOSTNAME
2088 CONFIG_BOOTP_NISDOMAIN
2089 CONFIG_BOOTP_BOOTPATH
2090 CONFIG_BOOTP_BOOTFILESIZE
2091 CONFIG_BOOTP_DNS
2092 CONFIG_BOOTP_DNS2
2093 CONFIG_BOOTP_SEND_HOSTNAME
2094 CONFIG_BOOTP_NTPSERVER
2095 CONFIG_BOOTP_TIMEOFFSET
2096 CONFIG_BOOTP_VENDOREX
Joe Hershberger2c00e092012-05-23 07:59:19 +00002097 CONFIG_BOOTP_MAY_FAIL
stroesefe389a82003-08-28 14:17:32 +00002098
Wilson Callan5d110f02007-07-28 10:56:13 -04002099 CONFIG_BOOTP_SERVERIP - TFTP server will be the serverip
2100 environment variable, not the BOOTP server.
stroesefe389a82003-08-28 14:17:32 +00002101
Joe Hershberger2c00e092012-05-23 07:59:19 +00002102 CONFIG_BOOTP_MAY_FAIL - If the DHCP server is not found
2103 after the configured retry count, the call will fail
2104 instead of starting over. This can be used to fail over
2105 to Link-local IP address configuration if the DHCP server
2106 is not available.
2107
stroesefe389a82003-08-28 14:17:32 +00002108 CONFIG_BOOTP_DNS2 - If a DHCP client requests the DNS
2109 serverip from a DHCP server, it is possible that more
2110 than one DNS serverip is offered to the client.
2111 If CONFIG_BOOTP_DNS2 is enabled, the secondary DNS
2112 serverip will be stored in the additional environment
2113 variable "dnsip2". The first DNS serverip is always
2114 stored in the variable "dnsip", when CONFIG_BOOTP_DNS
Jon Loeliger1fe80d72007-07-09 22:08:34 -05002115 is defined.
stroesefe389a82003-08-28 14:17:32 +00002116
2117 CONFIG_BOOTP_SEND_HOSTNAME - Some DHCP servers are capable
2118 to do a dynamic update of a DNS server. To do this, they
2119 need the hostname of the DHCP requester.
Wilson Callan5d110f02007-07-28 10:56:13 -04002120 If CONFIG_BOOTP_SEND_HOSTNAME is defined, the content
Jon Loeliger1fe80d72007-07-09 22:08:34 -05002121 of the "hostname" environment variable is passed as
2122 option 12 to the DHCP server.
stroesefe389a82003-08-28 14:17:32 +00002123
Aras Vaichasd9a2f412008-03-26 09:43:57 +11002124 CONFIG_BOOTP_DHCP_REQUEST_DELAY
2125
2126 A 32bit value in microseconds for a delay between
2127 receiving a "DHCP Offer" and sending the "DHCP Request".
2128 This fixes a problem with certain DHCP servers that don't
2129 respond 100% of the time to a "DHCP request". E.g. On an
2130 AT91RM9200 processor running at 180MHz, this delay needed
2131 to be *at least* 15,000 usec before a Windows Server 2003
2132 DHCP server would reply 100% of the time. I recommend at
2133 least 50,000 usec to be safe. The alternative is to hope
2134 that one of the retries will be successful but note that
2135 the DHCP timeout and retry process takes a longer than
2136 this delay.
2137
Joe Hershbergerd22c3382012-05-23 08:00:12 +00002138 - Link-local IP address negotiation:
2139 Negotiate with other link-local clients on the local network
2140 for an address that doesn't require explicit configuration.
2141 This is especially useful if a DHCP server cannot be guaranteed
2142 to exist in all environments that the device must operate.
2143
2144 See doc/README.link-local for more information.
2145
wdenka3d991b2004-04-15 21:48:45 +00002146 - CDP Options:
wdenk6e592382004-04-18 17:39:38 +00002147 CONFIG_CDP_DEVICE_ID
wdenka3d991b2004-04-15 21:48:45 +00002148
2149 The device id used in CDP trigger frames.
2150
2151 CONFIG_CDP_DEVICE_ID_PREFIX
2152
2153 A two character string which is prefixed to the MAC address
2154 of the device.
2155
2156 CONFIG_CDP_PORT_ID
2157
2158 A printf format string which contains the ascii name of
2159 the port. Normally is set to "eth%d" which sets
Marcel Ziswiler11ccc332008-07-09 08:17:15 +02002160 eth0 for the first Ethernet, eth1 for the second etc.
wdenka3d991b2004-04-15 21:48:45 +00002161
2162 CONFIG_CDP_CAPABILITIES
2163
2164 A 32bit integer which indicates the device capabilities;
2165 0x00000010 for a normal host which does not forwards.
2166
2167 CONFIG_CDP_VERSION
2168
2169 An ascii string containing the version of the software.
2170
2171 CONFIG_CDP_PLATFORM
2172
2173 An ascii string containing the name of the platform.
2174
2175 CONFIG_CDP_TRIGGER
2176
2177 A 32bit integer sent on the trigger.
2178
2179 CONFIG_CDP_POWER_CONSUMPTION
2180
2181 A 16bit integer containing the power consumption of the
2182 device in .1 of milliwatts.
2183
2184 CONFIG_CDP_APPLIANCE_VLAN_TYPE
2185
2186 A byte containing the id of the VLAN.
2187
wdenkc6097192002-11-03 00:24:07 +00002188- Status LED: CONFIG_STATUS_LED
2189
2190 Several configurations allow to display the current
2191 status using a LED. For instance, the LED will blink
2192 fast while running U-Boot code, stop blinking as
2193 soon as a reply to a BOOTP request was received, and
2194 start blinking slow once the Linux kernel is running
2195 (supported by a status LED driver in the Linux
2196 kernel). Defining CONFIG_STATUS_LED enables this
2197 feature in U-Boot.
2198
Igor Grinberg1df7bbb2013-11-08 01:03:50 +02002199 Additional options:
2200
2201 CONFIG_GPIO_LED
2202 The status LED can be connected to a GPIO pin.
2203 In such cases, the gpio_led driver can be used as a
2204 status LED backend implementation. Define CONFIG_GPIO_LED
2205 to include the gpio_led driver in the U-Boot binary.
2206
Igor Grinberg9dfdcdf2013-11-08 01:03:52 +02002207 CONFIG_GPIO_LED_INVERTED_TABLE
2208 Some GPIO connected LEDs may have inverted polarity in which
2209 case the GPIO high value corresponds to LED off state and
2210 GPIO low value corresponds to LED on state.
2211 In such cases CONFIG_GPIO_LED_INVERTED_TABLE may be defined
2212 with a list of GPIO LEDs that have inverted polarity.
2213
wdenkc6097192002-11-03 00:24:07 +00002214- CAN Support: CONFIG_CAN_DRIVER
2215
2216 Defining CONFIG_CAN_DRIVER enables CAN driver support
2217 on those systems that support this (optional)
2218 feature, like the TQM8xxL modules.
2219
Heiko Schocher3f4978c2012-01-16 21:12:24 +00002220- I2C Support: CONFIG_SYS_I2C
wdenkc6097192002-11-03 00:24:07 +00002221
Heiko Schocher3f4978c2012-01-16 21:12:24 +00002222 This enable the NEW i2c subsystem, and will allow you to use
2223 i2c commands at the u-boot command line (as long as you set
2224 CONFIG_CMD_I2C in CONFIG_COMMANDS) and communicate with i2c
2225 based realtime clock chips or other i2c devices. See
2226 common/cmd_i2c.c for a description of the command line
2227 interface.
2228
2229 ported i2c driver to the new framework:
Heiko Schocherea818db2013-01-29 08:53:15 +01002230 - drivers/i2c/soft_i2c.c:
2231 - activate first bus with CONFIG_SYS_I2C_SOFT define
2232 CONFIG_SYS_I2C_SOFT_SPEED and CONFIG_SYS_I2C_SOFT_SLAVE
2233 for defining speed and slave address
2234 - activate second bus with I2C_SOFT_DECLARATIONS2 define
2235 CONFIG_SYS_I2C_SOFT_SPEED_2 and CONFIG_SYS_I2C_SOFT_SLAVE_2
2236 for defining speed and slave address
2237 - activate third bus with I2C_SOFT_DECLARATIONS3 define
2238 CONFIG_SYS_I2C_SOFT_SPEED_3 and CONFIG_SYS_I2C_SOFT_SLAVE_3
2239 for defining speed and slave address
2240 - activate fourth bus with I2C_SOFT_DECLARATIONS4 define
2241 CONFIG_SYS_I2C_SOFT_SPEED_4 and CONFIG_SYS_I2C_SOFT_SLAVE_4
2242 for defining speed and slave address
Heiko Schocher3f4978c2012-01-16 21:12:24 +00002243
Heiko Schocher00f792e2012-10-24 13:48:22 +02002244 - drivers/i2c/fsl_i2c.c:
2245 - activate i2c driver with CONFIG_SYS_I2C_FSL
2246 define CONFIG_SYS_FSL_I2C_OFFSET for setting the register
2247 offset CONFIG_SYS_FSL_I2C_SPEED for the i2c speed and
2248 CONFIG_SYS_FSL_I2C_SLAVE for the slave addr of the first
2249 bus.
Wolfgang Denk93e14592013-10-04 17:43:24 +02002250 - If your board supports a second fsl i2c bus, define
Heiko Schocher00f792e2012-10-24 13:48:22 +02002251 CONFIG_SYS_FSL_I2C2_OFFSET for the register offset
2252 CONFIG_SYS_FSL_I2C2_SPEED for the speed and
2253 CONFIG_SYS_FSL_I2C2_SLAVE for the slave address of the
2254 second bus.
2255
Simon Glass1f2ba722012-10-30 07:28:53 +00002256 - drivers/i2c/tegra_i2c.c:
Nobuhiro Iwamatsu10cee512013-10-11 16:23:53 +09002257 - activate this driver with CONFIG_SYS_I2C_TEGRA
2258 - This driver adds 4 i2c buses with a fix speed from
2259 100000 and the slave addr 0!
Simon Glass1f2ba722012-10-30 07:28:53 +00002260
Dirk Eibach880540d2013-04-25 02:40:01 +00002261 - drivers/i2c/ppc4xx_i2c.c
2262 - activate this driver with CONFIG_SYS_I2C_PPC4XX
2263 - CONFIG_SYS_I2C_PPC4XX_CH0 activate hardware channel 0
2264 - CONFIG_SYS_I2C_PPC4XX_CH1 activate hardware channel 1
2265
tremfac96402013-09-21 18:13:35 +02002266 - drivers/i2c/i2c_mxc.c
2267 - activate this driver with CONFIG_SYS_I2C_MXC
2268 - define speed for bus 1 with CONFIG_SYS_MXC_I2C1_SPEED
2269 - define slave for bus 1 with CONFIG_SYS_MXC_I2C1_SLAVE
2270 - define speed for bus 2 with CONFIG_SYS_MXC_I2C2_SPEED
2271 - define slave for bus 2 with CONFIG_SYS_MXC_I2C2_SLAVE
2272 - define speed for bus 3 with CONFIG_SYS_MXC_I2C3_SPEED
2273 - define slave for bus 3 with CONFIG_SYS_MXC_I2C3_SLAVE
2274 If thoses defines are not set, default value is 100000
2275 for speed, and 0 for slave.
2276
Nobuhiro Iwamatsu1086bfa2013-09-27 16:58:30 +09002277 - drivers/i2c/rcar_i2c.c:
2278 - activate this driver with CONFIG_SYS_I2C_RCAR
2279 - This driver adds 4 i2c buses
2280
2281 - CONFIG_SYS_RCAR_I2C0_BASE for setting the register channel 0
2282 - CONFIG_SYS_RCAR_I2C0_SPEED for for the speed channel 0
2283 - CONFIG_SYS_RCAR_I2C1_BASE for setting the register channel 1
2284 - CONFIG_SYS_RCAR_I2C1_SPEED for for the speed channel 1
2285 - CONFIG_SYS_RCAR_I2C2_BASE for setting the register channel 2
2286 - CONFIG_SYS_RCAR_I2C2_SPEED for for the speed channel 2
2287 - CONFIG_SYS_RCAR_I2C3_BASE for setting the register channel 3
2288 - CONFIG_SYS_RCAR_I2C3_SPEED for for the speed channel 3
2289 - CONFIF_SYS_RCAR_I2C_NUM_CONTROLLERS for number of i2c buses
2290
Nobuhiro Iwamatsu2035d772013-10-29 13:33:51 +09002291 - drivers/i2c/sh_i2c.c:
2292 - activate this driver with CONFIG_SYS_I2C_SH
2293 - This driver adds from 2 to 5 i2c buses
2294
2295 - CONFIG_SYS_I2C_SH_BASE0 for setting the register channel 0
2296 - CONFIG_SYS_I2C_SH_SPEED0 for for the speed channel 0
2297 - CONFIG_SYS_I2C_SH_BASE1 for setting the register channel 1
2298 - CONFIG_SYS_I2C_SH_SPEED1 for for the speed channel 1
2299 - CONFIG_SYS_I2C_SH_BASE2 for setting the register channel 2
2300 - CONFIG_SYS_I2C_SH_SPEED2 for for the speed channel 2
2301 - CONFIG_SYS_I2C_SH_BASE3 for setting the register channel 3
2302 - CONFIG_SYS_I2C_SH_SPEED3 for for the speed channel 3
2303 - CONFIG_SYS_I2C_SH_BASE4 for setting the register channel 4
2304 - CONFIG_SYS_I2C_SH_SPEED4 for for the speed channel 4
2305 - CONFIG_SYS_I2C_SH_BASE5 for setting the register channel 5
2306 - CONFIG_SYS_I2C_SH_SPEED5 for for the speed channel 5
2307 - CONFIF_SYS_I2C_SH_NUM_CONTROLLERS for nummber of i2c buses
2308
Heiko Schocher6789e842013-10-22 11:03:18 +02002309 - drivers/i2c/omap24xx_i2c.c
2310 - activate this driver with CONFIG_SYS_I2C_OMAP24XX
2311 - CONFIG_SYS_OMAP24_I2C_SPEED speed channel 0
2312 - CONFIG_SYS_OMAP24_I2C_SLAVE slave addr channel 0
2313 - CONFIG_SYS_OMAP24_I2C_SPEED1 speed channel 1
2314 - CONFIG_SYS_OMAP24_I2C_SLAVE1 slave addr channel 1
2315 - CONFIG_SYS_OMAP24_I2C_SPEED2 speed channel 2
2316 - CONFIG_SYS_OMAP24_I2C_SLAVE2 slave addr channel 2
2317 - CONFIG_SYS_OMAP24_I2C_SPEED3 speed channel 3
2318 - CONFIG_SYS_OMAP24_I2C_SLAVE3 slave addr channel 3
2319 - CONFIG_SYS_OMAP24_I2C_SPEED4 speed channel 4
2320 - CONFIG_SYS_OMAP24_I2C_SLAVE4 slave addr channel 4
2321
Heiko Schocher0bdffe72013-11-08 07:30:53 +01002322 - drivers/i2c/zynq_i2c.c
2323 - activate this driver with CONFIG_SYS_I2C_ZYNQ
2324 - set CONFIG_SYS_I2C_ZYNQ_SPEED for speed setting
2325 - set CONFIG_SYS_I2C_ZYNQ_SLAVE for slave addr
2326
Naveen Krishna Che717fc62013-12-06 12:12:38 +05302327 - drivers/i2c/s3c24x0_i2c.c:
2328 - activate this driver with CONFIG_SYS_I2C_S3C24X0
2329 - This driver adds i2c buses (11 for Exynos5250, Exynos5420
2330 9 i2c buses for Exynos4 and 1 for S3C24X0 SoCs from Samsung)
2331 with a fix speed from 100000 and the slave addr 0!
2332
Dirk Eibachb46226b2014-07-03 09:28:18 +02002333 - drivers/i2c/ihs_i2c.c
2334 - activate this driver with CONFIG_SYS_I2C_IHS
2335 - CONFIG_SYS_I2C_IHS_CH0 activate hardware channel 0
2336 - CONFIG_SYS_I2C_IHS_SPEED_0 speed channel 0
2337 - CONFIG_SYS_I2C_IHS_SLAVE_0 slave addr channel 0
2338 - CONFIG_SYS_I2C_IHS_CH1 activate hardware channel 1
2339 - CONFIG_SYS_I2C_IHS_SPEED_1 speed channel 1
2340 - CONFIG_SYS_I2C_IHS_SLAVE_1 slave addr channel 1
2341 - CONFIG_SYS_I2C_IHS_CH2 activate hardware channel 2
2342 - CONFIG_SYS_I2C_IHS_SPEED_2 speed channel 2
2343 - CONFIG_SYS_I2C_IHS_SLAVE_2 slave addr channel 2
2344 - CONFIG_SYS_I2C_IHS_CH3 activate hardware channel 3
2345 - CONFIG_SYS_I2C_IHS_SPEED_3 speed channel 3
2346 - CONFIG_SYS_I2C_IHS_SLAVE_3 slave addr channel 3
2347
Heiko Schocher3f4978c2012-01-16 21:12:24 +00002348 additional defines:
2349
2350 CONFIG_SYS_NUM_I2C_BUSES
2351 Hold the number of i2c busses you want to use. If you
2352 don't use/have i2c muxes on your i2c bus, this
2353 is equal to CONFIG_SYS_NUM_I2C_ADAPTERS, and you can
2354 omit this define.
2355
2356 CONFIG_SYS_I2C_DIRECT_BUS
2357 define this, if you don't use i2c muxes on your hardware.
2358 if CONFIG_SYS_I2C_MAX_HOPS is not defined or == 0 you can
2359 omit this define.
2360
2361 CONFIG_SYS_I2C_MAX_HOPS
2362 define how many muxes are maximal consecutively connected
2363 on one i2c bus. If you not use i2c muxes, omit this
2364 define.
2365
2366 CONFIG_SYS_I2C_BUSES
2367 hold a list of busses you want to use, only used if
2368 CONFIG_SYS_I2C_DIRECT_BUS is not defined, for example
2369 a board with CONFIG_SYS_I2C_MAX_HOPS = 1 and
2370 CONFIG_SYS_NUM_I2C_BUSES = 9:
2371
2372 CONFIG_SYS_I2C_BUSES {{0, {I2C_NULL_HOP}}, \
2373 {0, {{I2C_MUX_PCA9547, 0x70, 1}}}, \
2374 {0, {{I2C_MUX_PCA9547, 0x70, 2}}}, \
2375 {0, {{I2C_MUX_PCA9547, 0x70, 3}}}, \
2376 {0, {{I2C_MUX_PCA9547, 0x70, 4}}}, \
2377 {0, {{I2C_MUX_PCA9547, 0x70, 5}}}, \
2378 {1, {I2C_NULL_HOP}}, \
2379 {1, {{I2C_MUX_PCA9544, 0x72, 1}}}, \
2380 {1, {{I2C_MUX_PCA9544, 0x72, 2}}}, \
2381 }
2382
2383 which defines
2384 bus 0 on adapter 0 without a mux
Heiko Schocherea818db2013-01-29 08:53:15 +01002385 bus 1 on adapter 0 with a PCA9547 on address 0x70 port 1
2386 bus 2 on adapter 0 with a PCA9547 on address 0x70 port 2
2387 bus 3 on adapter 0 with a PCA9547 on address 0x70 port 3
2388 bus 4 on adapter 0 with a PCA9547 on address 0x70 port 4
2389 bus 5 on adapter 0 with a PCA9547 on address 0x70 port 5
Heiko Schocher3f4978c2012-01-16 21:12:24 +00002390 bus 6 on adapter 1 without a mux
Heiko Schocherea818db2013-01-29 08:53:15 +01002391 bus 7 on adapter 1 with a PCA9544 on address 0x72 port 1
2392 bus 8 on adapter 1 with a PCA9544 on address 0x72 port 2
Heiko Schocher3f4978c2012-01-16 21:12:24 +00002393
2394 If you do not have i2c muxes on your board, omit this define.
2395
Heiko Schocherea818db2013-01-29 08:53:15 +01002396- Legacy I2C Support: CONFIG_HARD_I2C
Heiko Schocher3f4978c2012-01-16 21:12:24 +00002397
2398 NOTE: It is intended to move drivers to CONFIG_SYS_I2C which
2399 provides the following compelling advantages:
2400
2401 - more than one i2c adapter is usable
2402 - approved multibus support
2403 - better i2c mux support
2404
2405 ** Please consider updating your I2C driver now. **
2406
Heiko Schocherea818db2013-01-29 08:53:15 +01002407 These enable legacy I2C serial bus commands. Defining
2408 CONFIG_HARD_I2C will include the appropriate I2C driver
2409 for the selected CPU.
wdenkc6097192002-11-03 00:24:07 +00002410
wdenk945af8d2003-07-16 21:53:01 +00002411 This will allow you to use i2c commands at the u-boot
Jon Loeliger602ad3b2007-06-11 19:03:39 -05002412 command line (as long as you set CONFIG_CMD_I2C in
wdenkb37c7e52003-06-30 16:24:52 +00002413 CONFIG_COMMANDS) and communicate with i2c based realtime
2414 clock chips. See common/cmd_i2c.c for a description of the
wdenk43d96162003-03-06 00:02:04 +00002415 command line interface.
wdenkc6097192002-11-03 00:24:07 +00002416
Ben Warrenbb99ad62006-09-07 16:50:54 -04002417 CONFIG_HARD_I2C selects a hardware I2C controller.
wdenkc6097192002-11-03 00:24:07 +00002418
wdenk945af8d2003-07-16 21:53:01 +00002419 There are several other quantities that must also be
Heiko Schocherea818db2013-01-29 08:53:15 +01002420 defined when you define CONFIG_HARD_I2C.
wdenkc6097192002-11-03 00:24:07 +00002421
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +02002422 In both cases you will need to define CONFIG_SYS_I2C_SPEED
wdenk945af8d2003-07-16 21:53:01 +00002423 to be the frequency (in Hz) at which you wish your i2c bus
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +02002424 to run and CONFIG_SYS_I2C_SLAVE to be the address of this node (ie
Marcel Ziswiler11ccc332008-07-09 08:17:15 +02002425 the CPU's i2c node address).
wdenk945af8d2003-07-16 21:53:01 +00002426
Peter Tyser8d321b82010-04-12 22:28:21 -05002427 Now, the u-boot i2c code for the mpc8xx
Stefan Roesea47a12b2010-04-15 16:07:28 +02002428 (arch/powerpc/cpu/mpc8xx/i2c.c) sets the CPU up as a master node
Peter Tyser8d321b82010-04-12 22:28:21 -05002429 and so its address should therefore be cleared to 0 (See,
2430 eg, MPC823e User's Manual p.16-473). So, set
2431 CONFIG_SYS_I2C_SLAVE to 0.
wdenkc6097192002-11-03 00:24:07 +00002432
Eric Millbrandt5da71ef2009-09-03 08:09:44 -05002433 CONFIG_SYS_I2C_INIT_MPC5XXX
2434
2435 When a board is reset during an i2c bus transfer
2436 chips might think that the current transfer is still
2437 in progress. Reset the slave devices by sending start
2438 commands until the slave device responds.
2439
wdenk945af8d2003-07-16 21:53:01 +00002440 That's all that's required for CONFIG_HARD_I2C.
wdenkb37c7e52003-06-30 16:24:52 +00002441
Heiko Schocherea818db2013-01-29 08:53:15 +01002442 If you use the software i2c interface (CONFIG_SYS_I2C_SOFT)
wdenkb37c7e52003-06-30 16:24:52 +00002443 then the following macros need to be defined (examples are
2444 from include/configs/lwmon.h):
wdenkc6097192002-11-03 00:24:07 +00002445
2446 I2C_INIT
2447
wdenkb37c7e52003-06-30 16:24:52 +00002448 (Optional). Any commands necessary to enable the I2C
wdenk43d96162003-03-06 00:02:04 +00002449 controller or configure ports.
wdenkc6097192002-11-03 00:24:07 +00002450
wdenkba56f622004-02-06 23:19:44 +00002451 eg: #define I2C_INIT (immr->im_cpm.cp_pbdir |= PB_SCL)
wdenkb37c7e52003-06-30 16:24:52 +00002452
wdenkc6097192002-11-03 00:24:07 +00002453 I2C_PORT
2454
wdenk43d96162003-03-06 00:02:04 +00002455 (Only for MPC8260 CPU). The I/O port to use (the code
2456 assumes both bits are on the same port). Valid values
2457 are 0..3 for ports A..D.
wdenkc6097192002-11-03 00:24:07 +00002458
2459 I2C_ACTIVE
2460
2461 The code necessary to make the I2C data line active
2462 (driven). If the data line is open collector, this
2463 define can be null.
2464
wdenkb37c7e52003-06-30 16:24:52 +00002465 eg: #define I2C_ACTIVE (immr->im_cpm.cp_pbdir |= PB_SDA)
2466
wdenkc6097192002-11-03 00:24:07 +00002467 I2C_TRISTATE
2468
2469 The code necessary to make the I2C data line tri-stated
2470 (inactive). If the data line is open collector, this
2471 define can be null.
2472
wdenkb37c7e52003-06-30 16:24:52 +00002473 eg: #define I2C_TRISTATE (immr->im_cpm.cp_pbdir &= ~PB_SDA)
2474
wdenkc6097192002-11-03 00:24:07 +00002475 I2C_READ
2476
York Sun472d5462013-04-01 11:29:11 -07002477 Code that returns true if the I2C data line is high,
2478 false if it is low.
wdenkc6097192002-11-03 00:24:07 +00002479
wdenkb37c7e52003-06-30 16:24:52 +00002480 eg: #define I2C_READ ((immr->im_cpm.cp_pbdat & PB_SDA) != 0)
2481
wdenkc6097192002-11-03 00:24:07 +00002482 I2C_SDA(bit)
2483
York Sun472d5462013-04-01 11:29:11 -07002484 If <bit> is true, sets the I2C data line high. If it
2485 is false, it clears it (low).
wdenkc6097192002-11-03 00:24:07 +00002486
wdenkb37c7e52003-06-30 16:24:52 +00002487 eg: #define I2C_SDA(bit) \
wdenk2535d602003-07-17 23:16:40 +00002488 if(bit) immr->im_cpm.cp_pbdat |= PB_SDA; \
wdenkba56f622004-02-06 23:19:44 +00002489 else immr->im_cpm.cp_pbdat &= ~PB_SDA
wdenkb37c7e52003-06-30 16:24:52 +00002490
wdenkc6097192002-11-03 00:24:07 +00002491 I2C_SCL(bit)
2492
York Sun472d5462013-04-01 11:29:11 -07002493 If <bit> is true, sets the I2C clock line high. If it
2494 is false, it clears it (low).
wdenkc6097192002-11-03 00:24:07 +00002495
wdenkb37c7e52003-06-30 16:24:52 +00002496 eg: #define I2C_SCL(bit) \
wdenk2535d602003-07-17 23:16:40 +00002497 if(bit) immr->im_cpm.cp_pbdat |= PB_SCL; \
wdenkba56f622004-02-06 23:19:44 +00002498 else immr->im_cpm.cp_pbdat &= ~PB_SCL
wdenkb37c7e52003-06-30 16:24:52 +00002499
wdenkc6097192002-11-03 00:24:07 +00002500 I2C_DELAY
2501
2502 This delay is invoked four times per clock cycle so this
2503 controls the rate of data transfer. The data rate thus
wdenkb37c7e52003-06-30 16:24:52 +00002504 is 1 / (I2C_DELAY * 4). Often defined to be something
wdenk945af8d2003-07-16 21:53:01 +00002505 like:
2506
wdenk