blob: 2008c1520e61cb70da7c7238504ed233a0591a21 [file] [log] [blame]
Tom Rini83d290c2018-05-06 17:58:06 -04001// SPDX-License-Identifier: GPL-2.0+
Heiko Schocherb2f97cf2014-07-18 06:07:19 +02002/*
3 * (C) Copyright 2014
4 * Heiko Schocher, DENX Software Engineering, hs@denx.de.
5 *
Robert P. J. Day5052e812016-09-13 08:35:18 -04006 * Basic support for the pwm module on imx6.
Heiko Schocherb2f97cf2014-07-18 06:07:19 +02007 */
8
9#include <common.h>
10#include <div64.h>
Heiko Schocher46e10e92019-05-28 06:51:52 +020011#include <dm.h>
Simon Glassf7ae49f2020-05-10 11:40:05 -060012#include <log.h>
Heiko Schocherb2f97cf2014-07-18 06:07:19 +020013#include <pwm.h>
14#include <asm/arch/imx-regs.h>
15#include <asm/io.h>
16#include "pwm-imx-util.h"
17
18int pwm_init(int pwm_id, int div, int invert)
19{
20 struct pwm_regs *pwm = (struct pwm_regs *)pwm_id_to_reg(pwm_id);
21
Axel Lin16b0c0c2015-05-23 15:16:48 +080022 if (!pwm)
23 return -1;
24
Heiko Schocherb2f97cf2014-07-18 06:07:19 +020025 writel(0, &pwm->ir);
26 return 0;
27}
28
Heiko Schocher46e10e92019-05-28 06:51:52 +020029int pwm_config_internal(struct pwm_regs *pwm, unsigned long period_cycles,
30 unsigned long duty_cycles, unsigned long prescale)
Heiko Schocherb2f97cf2014-07-18 06:07:19 +020031{
Heiko Schocherb2f97cf2014-07-18 06:07:19 +020032 u32 cr;
33
Heiko Schocher46e10e92019-05-28 06:51:52 +020034 writel(0, &pwm->ir);
Heiko Schocherb2f97cf2014-07-18 06:07:19 +020035 cr = PWMCR_PRESCALER(prescale) |
36 PWMCR_DOZEEN | PWMCR_WAITEN |
37 PWMCR_DBGEN | PWMCR_CLKSRC_IPG_HIGH;
38
39 writel(cr, &pwm->cr);
40 /* set duty cycles */
41 writel(duty_cycles, &pwm->sar);
42 /* set period cycles */
43 writel(period_cycles, &pwm->pr);
44 return 0;
45}
46
Heiko Schocher46e10e92019-05-28 06:51:52 +020047int pwm_config(int pwm_id, int duty_ns, int period_ns)
48{
49 struct pwm_regs *pwm = (struct pwm_regs *)pwm_id_to_reg(pwm_id);
50 unsigned long period_cycles, duty_cycles, prescale;
51
52 if (!pwm)
53 return -1;
54
55 pwm_imx_get_parms(period_ns, duty_ns, &period_cycles, &duty_cycles,
56 &prescale);
57
58 return pwm_config_internal(pwm, period_cycles, duty_cycles, prescale);
59}
60
Heiko Schocherb2f97cf2014-07-18 06:07:19 +020061int pwm_enable(int pwm_id)
62{
63 struct pwm_regs *pwm = (struct pwm_regs *)pwm_id_to_reg(pwm_id);
64
Axel Lin16b0c0c2015-05-23 15:16:48 +080065 if (!pwm)
66 return -1;
67
Heiko Schocherb2f97cf2014-07-18 06:07:19 +020068 setbits_le32(&pwm->cr, PWMCR_EN);
69 return 0;
70}
71
72void pwm_disable(int pwm_id)
73{
74 struct pwm_regs *pwm = (struct pwm_regs *)pwm_id_to_reg(pwm_id);
75
Axel Lin16b0c0c2015-05-23 15:16:48 +080076 if (!pwm)
77 return;
78
Heiko Schocherb2f97cf2014-07-18 06:07:19 +020079 clrbits_le32(&pwm->cr, PWMCR_EN);
80}
Heiko Schocher46e10e92019-05-28 06:51:52 +020081
82#if defined(CONFIG_DM_PWM)
83struct imx_pwm_priv {
84 struct pwm_regs *regs;
85 bool invert;
86};
87
88static int imx_pwm_set_invert(struct udevice *dev, uint channel,
89 bool polarity)
90{
91 struct imx_pwm_priv *priv = dev_get_priv(dev);
92
93 debug("%s: polarity=%u\n", __func__, polarity);
94 priv->invert = polarity;
95
96 return 0;
97}
98
99static int imx_pwm_set_config(struct udevice *dev, uint channel,
100 uint period_ns, uint duty_ns)
101{
102 struct imx_pwm_priv *priv = dev_get_priv(dev);
103 struct pwm_regs *regs = priv->regs;
104 unsigned long period_cycles, duty_cycles, prescale;
105
106 debug("%s: Config '%s' channel: %d\n", __func__, dev->name, channel);
107
108 pwm_imx_get_parms(period_ns, duty_ns, &period_cycles, &duty_cycles,
109 &prescale);
110
111 return pwm_config_internal(regs, period_cycles, duty_cycles, prescale);
112};
113
114static int imx_pwm_set_enable(struct udevice *dev, uint channel, bool enable)
115{
116 struct imx_pwm_priv *priv = dev_get_priv(dev);
117 struct pwm_regs *regs = priv->regs;
118
119 debug("%s: Enable '%s' state: %d\n", __func__, dev->name, enable);
120
121 if (enable)
122 setbits_le32(&regs->cr, PWMCR_EN);
123 else
124 clrbits_le32(&regs->cr, PWMCR_EN);
125
126 return 0;
127};
128
Simon Glassd1998a92020-12-03 16:55:21 -0700129static int imx_pwm_of_to_plat(struct udevice *dev)
Heiko Schocher46e10e92019-05-28 06:51:52 +0200130{
131 struct imx_pwm_priv *priv = dev_get_priv(dev);
132
Masahiro Yamada8613c8d2020-07-17 14:36:46 +0900133 priv->regs = dev_read_addr_ptr(dev);
Heiko Schocher46e10e92019-05-28 06:51:52 +0200134
135 return 0;
136}
137
138static int imx_pwm_probe(struct udevice *dev)
139{
140 return 0;
141}
142
143static const struct pwm_ops imx_pwm_ops = {
144 .set_invert = imx_pwm_set_invert,
145 .set_config = imx_pwm_set_config,
146 .set_enable = imx_pwm_set_enable,
147};
148
149static const struct udevice_id imx_pwm_ids[] = {
150 { .compatible = "fsl,imx27-pwm" },
151 { }
152};
153
154U_BOOT_DRIVER(imx_pwm) = {
155 .name = "imx_pwm",
156 .id = UCLASS_PWM,
157 .of_match = imx_pwm_ids,
158 .ops = &imx_pwm_ops,
Simon Glassd1998a92020-12-03 16:55:21 -0700159 .of_to_plat = imx_pwm_of_to_plat,
Heiko Schocher46e10e92019-05-28 06:51:52 +0200160 .probe = imx_pwm_probe,
Simon Glass41575d82020-12-03 16:55:17 -0700161 .priv_auto = sizeof(struct imx_pwm_priv),
Heiko Schocher46e10e92019-05-28 06:51:52 +0200162};
163#endif