Blame - board/pandora/pandora.h - platform/external/u-boot

blob: 9c4c5d1cd795a36c5af93277dc67c810b0011122 [file] [log] [blame]

Tom Rini	83d290c	2018-05-06 17:58:06 -0400	[diff] [blame]	1	/* SPDX-License-Identifier: GPL-2.0+ */
Dirk Behme	2be2c6c	2009-01-28 21:39:58 +0100	[diff] [blame]	2	/*
				3	* (C) Copyright 2008
				4	* Grazvydas Ignotas <notasas@gmail.com>
Dirk Behme	2be2c6c	2009-01-28 21:39:58 +0100	[diff] [blame]	5	*/
				6	#ifndef _PANDORA_H_
				7	#define _PANDORA_H_
				8
				9	const omap3_sysinfo sysinfo = {
Dirk Behme	2be2c6c	2009-01-28 21:39:58 +0100	[diff] [blame]	10	DDR_STACKED,
Dirk Behme	2be2c6c	2009-01-28 21:39:58 +0100	[diff] [blame]	11	"OMAP3 Pandora",
				12	"NAND",
				13	};
				14
				15	/*
				16	* IEN - Input Enable
				17	* IDIS - Input Disable
				18	* PTD - Pull type Down
				19	* PTU - Pull type Up
				20	* DIS - Pull type selection is inactive
				21	* EN - Pull type selection is active
				22	* M0 - Mode 0
				23	* The commented string gives the final mux configuration for that pin
				24	*/
				25	#define MUX_PANDORA() \
				26	/SDRC/\
Olof Johansson	fc9165f	2009-09-28 08:19:30 -0400	[diff] [blame]	27	MUX_VAL(CP(SDRC_D0), (IEN \| PTD \| DIS \| M0)) /SDRC_D0/\
				28	MUX_VAL(CP(SDRC_D1), (IEN \| PTD \| DIS \| M0)) /SDRC_D1/\
				29	MUX_VAL(CP(SDRC_D2), (IEN \| PTD \| DIS \| M0)) /SDRC_D2/\
				30	MUX_VAL(CP(SDRC_D3), (IEN \| PTD \| DIS \| M0)) /SDRC_D3/\
				31	MUX_VAL(CP(SDRC_D4), (IEN \| PTD \| DIS \| M0)) /SDRC_D4/\
				32	MUX_VAL(CP(SDRC_D5), (IEN \| PTD \| DIS \| M0)) /SDRC_D5/\
				33	MUX_VAL(CP(SDRC_D6), (IEN \| PTD \| DIS \| M0)) /SDRC_D6/\
				34	MUX_VAL(CP(SDRC_D7), (IEN \| PTD \| DIS \| M0)) /SDRC_D7/\
				35	MUX_VAL(CP(SDRC_D8), (IEN \| PTD \| DIS \| M0)) /SDRC_D8/\
				36	MUX_VAL(CP(SDRC_D9), (IEN \| PTD \| DIS \| M0)) /SDRC_D9/\
				37	MUX_VAL(CP(SDRC_D10), (IEN \| PTD \| DIS \| M0)) /SDRC_D10/\
				38	MUX_VAL(CP(SDRC_D11), (IEN \| PTD \| DIS \| M0)) /SDRC_D11/\
				39	MUX_VAL(CP(SDRC_D12), (IEN \| PTD \| DIS \| M0)) /SDRC_D12/\
				40	MUX_VAL(CP(SDRC_D13), (IEN \| PTD \| DIS \| M0)) /SDRC_D13/\
				41	MUX_VAL(CP(SDRC_D14), (IEN \| PTD \| DIS \| M0)) /SDRC_D14/\
				42	MUX_VAL(CP(SDRC_D15), (IEN \| PTD \| DIS \| M0)) /SDRC_D15/\
				43	MUX_VAL(CP(SDRC_D16), (IEN \| PTD \| DIS \| M0)) /SDRC_D16/\
				44	MUX_VAL(CP(SDRC_D17), (IEN \| PTD \| DIS \| M0)) /SDRC_D17/\
				45	MUX_VAL(CP(SDRC_D18), (IEN \| PTD \| DIS \| M0)) /SDRC_D18/\
				46	MUX_VAL(CP(SDRC_D19), (IEN \| PTD \| DIS \| M0)) /SDRC_D19/\
				47	MUX_VAL(CP(SDRC_D20), (IEN \| PTD \| DIS \| M0)) /SDRC_D20/\
				48	MUX_VAL(CP(SDRC_D21), (IEN \| PTD \| DIS \| M0)) /SDRC_D21/\
				49	MUX_VAL(CP(SDRC_D22), (IEN \| PTD \| DIS \| M0)) /SDRC_D22/\
				50	MUX_VAL(CP(SDRC_D23), (IEN \| PTD \| DIS \| M0)) /SDRC_D23/\
				51	MUX_VAL(CP(SDRC_D24), (IEN \| PTD \| DIS \| M0)) /SDRC_D24/\
				52	MUX_VAL(CP(SDRC_D25), (IEN \| PTD \| DIS \| M0)) /SDRC_D25/\
				53	MUX_VAL(CP(SDRC_D26), (IEN \| PTD \| DIS \| M0)) /SDRC_D26/\
				54	MUX_VAL(CP(SDRC_D27), (IEN \| PTD \| DIS \| M0)) /SDRC_D27/\
				55	MUX_VAL(CP(SDRC_D28), (IEN \| PTD \| DIS \| M0)) /SDRC_D28/\
				56	MUX_VAL(CP(SDRC_D29), (IEN \| PTD \| DIS \| M0)) /SDRC_D29/\
				57	MUX_VAL(CP(SDRC_D30), (IEN \| PTD \| DIS \| M0)) /SDRC_D30/\
				58	MUX_VAL(CP(SDRC_D31), (IEN \| PTD \| DIS \| M0)) /SDRC_D31/\
				59	MUX_VAL(CP(SDRC_CLK), (IEN \| PTD \| DIS \| M0)) /SDRC_CLK/\
				60	MUX_VAL(CP(SDRC_DQS0), (IEN \| PTD \| DIS \| M0)) /SDRC_DQS0/\
				61	MUX_VAL(CP(SDRC_DQS1), (IEN \| PTD \| DIS \| M0)) /SDRC_DQS1/\
				62	MUX_VAL(CP(SDRC_DQS2), (IEN \| PTD \| DIS \| M0)) /SDRC_DQS2/\
				63	MUX_VAL(CP(SDRC_DQS3), (IEN \| PTD \| DIS \| M0)) /SDRC_DQS3/\
Dirk Behme	2be2c6c	2009-01-28 21:39:58 +0100	[diff] [blame]	64	/GPMC/\
Olof Johansson	fc9165f	2009-09-28 08:19:30 -0400	[diff] [blame]	65	MUX_VAL(CP(GPMC_A1), (IDIS \| PTD \| DIS \| M0)) /GPMC_A1/\
				66	MUX_VAL(CP(GPMC_A2), (IDIS \| PTD \| DIS \| M0)) /GPMC_A2/\
				67	MUX_VAL(CP(GPMC_A3), (IDIS \| PTD \| DIS \| M0)) /GPMC_A3/\
				68	MUX_VAL(CP(GPMC_A4), (IDIS \| PTD \| DIS \| M0)) /GPMC_A4/\
				69	MUX_VAL(CP(GPMC_A5), (IDIS \| PTD \| DIS \| M0)) /GPMC_A5/\
				70	MUX_VAL(CP(GPMC_A6), (IDIS \| PTD \| DIS \| M0)) /GPMC_A6/\
				71	MUX_VAL(CP(GPMC_A7), (IDIS \| PTD \| DIS \| M0)) /GPMC_A7/\
				72	MUX_VAL(CP(GPMC_A8), (IDIS \| PTD \| DIS \| M0)) /GPMC_A8/\
				73	MUX_VAL(CP(GPMC_A9), (IDIS \| PTD \| DIS \| M0)) /GPMC_A9/\
				74	MUX_VAL(CP(GPMC_A10), (IDIS \| PTD \| DIS \| M0)) /GPMC_A10/\
				75	MUX_VAL(CP(GPMC_D0), (IEN \| PTD \| DIS \| M0)) /GPMC_D0/\
				76	MUX_VAL(CP(GPMC_D1), (IEN \| PTD \| DIS \| M0)) /GPMC_D1/\
				77	MUX_VAL(CP(GPMC_D2), (IEN \| PTD \| DIS \| M0)) /GPMC_D2/\
				78	MUX_VAL(CP(GPMC_D3), (IEN \| PTD \| DIS \| M0)) /GPMC_D3/\
				79	MUX_VAL(CP(GPMC_D4), (IEN \| PTD \| DIS \| M0)) /GPMC_D4/\
				80	MUX_VAL(CP(GPMC_D5), (IEN \| PTD \| DIS \| M0)) /GPMC_D5/\
				81	MUX_VAL(CP(GPMC_D6), (IEN \| PTD \| DIS \| M0)) /GPMC_D6/\
				82	MUX_VAL(CP(GPMC_D7), (IEN \| PTD \| DIS \| M0)) /GPMC_D7/\
				83	MUX_VAL(CP(GPMC_D8), (IEN \| PTD \| DIS \| M0)) /GPMC_D8/\
				84	MUX_VAL(CP(GPMC_D9), (IEN \| PTD \| DIS \| M0)) /GPMC_D9/\
				85	MUX_VAL(CP(GPMC_D10), (IEN \| PTD \| DIS \| M0)) /GPMC_D10/\
				86	MUX_VAL(CP(GPMC_D11), (IEN \| PTD \| DIS \| M0)) /GPMC_D11/\
				87	MUX_VAL(CP(GPMC_D12), (IEN \| PTD \| DIS \| M0)) /GPMC_D12/\
				88	MUX_VAL(CP(GPMC_D13), (IEN \| PTD \| DIS \| M0)) /GPMC_D13/\
				89	MUX_VAL(CP(GPMC_D14), (IEN \| PTD \| DIS \| M0)) /GPMC_D14/\
				90	MUX_VAL(CP(GPMC_D15), (IEN \| PTD \| DIS \| M0)) /GPMC_D15/\
				91	MUX_VAL(CP(GPMC_NCS0), (IDIS \| PTU \| EN \| M0)) /GPMC_nCS0/\
				92	MUX_VAL(CP(GPMC_NCS1), (IDIS \| PTU \| EN \| M0)) /GPMC_nCS1/\
				93	MUX_VAL(CP(GPMC_CLK), (IDIS \| PTD \| DIS \| M0)) /GPMC_CLK/\
				94	MUX_VAL(CP(GPMC_NADV_ALE), (IDIS \| PTD \| DIS \| M0)) /GPMC_nADV_ALE/\
				95	MUX_VAL(CP(GPMC_NOE), (IDIS \| PTD \| DIS \| M0)) /GPMC_nOE/\
				96	MUX_VAL(CP(GPMC_NWE), (IDIS \| PTD \| DIS \| M0)) /GPMC_nWE/\
				97	MUX_VAL(CP(GPMC_NBE0_CLE), (IDIS \| PTD \| DIS \| M0)) /GPMC_nBE0_CLE/\
				98	MUX_VAL(CP(GPMC_NWP), (IEN \| PTD \| DIS \| M0)) /GPMC_nWP/\
				99	MUX_VAL(CP(GPMC_WAIT0), (IEN \| PTU \| EN \| M0)) /GPMC_WAIT0/\
				100	MUX_VAL(CP(GPMC_WAIT1), (IEN \| PTU \| EN \| M0)) /GPMC_WAIT1/\
Dirk Behme	2be2c6c	2009-01-28 21:39:58 +0100	[diff] [blame]	101	/DSS/\
Olof Johansson	fc9165f	2009-09-28 08:19:30 -0400	[diff] [blame]	102	MUX_VAL(CP(DSS_PCLK), (IDIS \| PTD \| DIS \| M0)) /DSS_PCLK/\
				103	MUX_VAL(CP(DSS_HSYNC), (IDIS \| PTD \| DIS \| M0)) /DSS_HSYNC/\
				104	MUX_VAL(CP(DSS_VSYNC), (IDIS \| PTD \| DIS \| M0)) /DSS_VSYNC/\
				105	MUX_VAL(CP(DSS_ACBIAS), (IDIS \| PTD \| DIS \| M0)) /DSS_ACBIAS/\
				106	MUX_VAL(CP(DSS_DATA0), (IDIS \| PTD \| DIS \| M0)) /DSS_DATA0/\
				107	MUX_VAL(CP(DSS_DATA1), (IDIS \| PTD \| DIS \| M0)) /DSS_DATA1/\
				108	MUX_VAL(CP(DSS_DATA2), (IDIS \| PTD \| DIS \| M0)) /DSS_DATA2/\
				109	MUX_VAL(CP(DSS_DATA3), (IDIS \| PTD \| DIS \| M0)) /DSS_DATA3/\
				110	MUX_VAL(CP(DSS_DATA4), (IDIS \| PTD \| DIS \| M0)) /DSS_DATA4/\
				111	MUX_VAL(CP(DSS_DATA5), (IDIS \| PTD \| DIS \| M0)) /DSS_DATA5/\
				112	MUX_VAL(CP(DSS_DATA6), (IDIS \| PTD \| DIS \| M0)) /DSS_DATA6/\
				113	MUX_VAL(CP(DSS_DATA7), (IDIS \| PTD \| DIS \| M0)) /DSS_DATA7/\
				114	MUX_VAL(CP(DSS_DATA8), (IDIS \| PTD \| DIS \| M0)) /DSS_DATA8/\
				115	MUX_VAL(CP(DSS_DATA9), (IDIS \| PTD \| DIS \| M0)) /DSS_DATA9/\
				116	MUX_VAL(CP(DSS_DATA10), (IDIS \| PTD \| DIS \| M0)) /DSS_DATA10/\
				117	MUX_VAL(CP(DSS_DATA11), (IDIS \| PTD \| DIS \| M0)) /DSS_DATA11/\
				118	MUX_VAL(CP(DSS_DATA12), (IDIS \| PTD \| DIS \| M0)) /DSS_DATA12/\
				119	MUX_VAL(CP(DSS_DATA13), (IDIS \| PTD \| DIS \| M0)) /DSS_DATA13/\
				120	MUX_VAL(CP(DSS_DATA14), (IDIS \| PTD \| DIS \| M0)) /DSS_DATA14/\
				121	MUX_VAL(CP(DSS_DATA15), (IDIS \| PTD \| DIS \| M0)) /DSS_DATA15/\
				122	MUX_VAL(CP(DSS_DATA16), (IDIS \| PTD \| DIS \| M0)) /DSS_DATA16/\
				123	MUX_VAL(CP(DSS_DATA17), (IDIS \| PTD \| DIS \| M0)) /DSS_DATA17/\
				124	MUX_VAL(CP(DSS_DATA18), (IDIS \| PTD \| DIS \| M0)) /DSS_DATA18/\
				125	MUX_VAL(CP(DSS_DATA19), (IDIS \| PTD \| DIS \| M0)) /DSS_DATA19/\
				126	MUX_VAL(CP(DSS_DATA20), (IDIS \| PTD \| DIS \| M0)) /DSS_DATA20/\
				127	MUX_VAL(CP(DSS_DATA21), (IDIS \| PTD \| DIS \| M0)) /DSS_DATA21/\
				128	MUX_VAL(CP(DSS_DATA22), (IDIS \| PTD \| DIS \| M0)) /DSS_DATA22/\
				129	MUX_VAL(CP(DSS_DATA23), (IDIS \| PTD \| DIS \| M0)) /DSS_DATA23/\
Dirk Behme	2be2c6c	2009-01-28 21:39:58 +0100	[diff] [blame]	130	/GPIO based game buttons/\
Olof Johansson	fc9165f	2009-09-28 08:19:30 -0400	[diff] [blame]	131	MUX_VAL(CP(CAM_XCLKA), (IEN \| PTD \| DIS \| M4)) /GPIO_96 - LEFT/\
				132	MUX_VAL(CP(CAM_PCLK), (IEN \| PTD \| DIS \| M4)) /GPIO_97 - L2/\
				133	MUX_VAL(CP(CAM_FLD), (IEN \| PTD \| DIS \| M4)) /GPIO_98 - RIGHT/\
				134	MUX_VAL(CP(CAM_D0), (IEN \| PTD \| DIS \| M4)) /GPIO_99 - MENU/\
				135	MUX_VAL(CP(CAM_D1), (IEN \| PTD \| DIS \| M4)) /GPIO_100 - START/\
				136	MUX_VAL(CP(CAM_D2), (IEN \| PTD \| DIS \| M4)) /GPIO_101 - Y/\
				137	MUX_VAL(CP(CAM_D3), (IEN \| PTD \| DIS \| M4)) /GPIO_102 - L1/\
				138	MUX_VAL(CP(CAM_D4), (IEN \| PTD \| DIS \| M4)) /GPIO_103 - DOWN/\
				139	MUX_VAL(CP(CAM_D5), (IEN \| PTD \| DIS \| M4)) /GPIO_104 - SELECT/\
				140	MUX_VAL(CP(CAM_D6), (IEN \| PTD \| DIS \| M4)) /GPIO_105 - R1/\
				141	MUX_VAL(CP(CAM_D7), (IEN \| PTD \| DIS \| M4)) /GPIO_106 - B/\
				142	MUX_VAL(CP(CAM_D8), (IEN \| PTD \| DIS \| M4)) /GPIO_107 - R2/\
				143	MUX_VAL(CP(CAM_D10), (IEN \| PTD \| DIS \| M4)) /GPIO_109 - X/\
				144	MUX_VAL(CP(CAM_D11), (IEN \| PTD \| DIS \| M4)) /GPIO_110 - UP/\
				145	MUX_VAL(CP(CAM_XCLKB), (IEN \| PTD \| DIS \| M4)) /GPIO_111 - A/\
Dirk Behme	2be2c6c	2009-01-28 21:39:58 +0100	[diff] [blame]	146	/Audio Interface To External DAC (Headphone, Speakers)/\
Olof Johansson	fc9165f	2009-09-28 08:19:30 -0400	[diff] [blame]	147	MUX_VAL(CP(MCBSP2_FSX), (IDIS \| PTD \| DIS \| M0)) /McBSP2_FSX/\
				148	MUX_VAL(CP(MCBSP2_CLKX), (IDIS \| PTD \| DIS \| M0)) /McBSP2_CLKX/\
				149	MUX_VAL(CP(MCBSP2_DX), (IDIS \| PTD \| DIS \| M0)) /McBSP2_DX/\
				150	MUX_VAL(CP(MCBSP_CLKS), (IEN \| PTD \| DIS \| M0)) /McBSP_CLKS/\
				151	MUX_VAL(CP(MCBSP2_DR), (IDIS \| PTD \| DIS \| M4)) /GPIO_118/\
				152	/* - nPOWERDOWN_DAC*/\
Dirk Behme	2be2c6c	2009-01-28 21:39:58 +0100	[diff] [blame]	153	/Expansion card 1/\
Olof Johansson	fc9165f	2009-09-28 08:19:30 -0400	[diff] [blame]	154	MUX_VAL(CP(MMC1_CLK), (IDIS \| PTU \| EN \| M0)) /MMC1_CLK/\
				155	MUX_VAL(CP(MMC1_CMD), (IEN \| PTU \| EN \| M0)) /MMC1_CMD/\
				156	MUX_VAL(CP(MMC1_DAT0), (IEN \| PTU \| EN \| M0)) /MMC1_DAT0/\
				157	MUX_VAL(CP(MMC1_DAT1), (IEN \| PTU \| EN \| M0)) /MMC1_DAT1/\
				158	MUX_VAL(CP(MMC1_DAT2), (IEN \| PTU \| EN \| M0)) /MMC1_DAT2/\
				159	MUX_VAL(CP(MMC1_DAT3), (IEN \| PTU \| EN \| M0)) /MMC1_DAT3/\
				160	MUX_VAL(CP(MMC1_DAT4), (IEN \| PTD \| DIS \| M4)) /GPIO_126 - MMC1_WP/\
Dirk Behme	2be2c6c	2009-01-28 21:39:58 +0100	[diff] [blame]	161	/Expansion card 2/\
Olof Johansson	fc9165f	2009-09-28 08:19:30 -0400	[diff] [blame]	162	MUX_VAL(CP(MMC2_CLK), (IDIS \| PTD \| DIS \| M0)) /MMC2_CLK/\
				163	MUX_VAL(CP(MMC2_CMD), (IEN \| PTU \| EN \| M0)) /MMC2_CMD/\
				164	MUX_VAL(CP(MMC2_DAT0), (IEN \| PTU \| EN \| M0)) /MMC2_DAT0/\
				165	MUX_VAL(CP(MMC2_DAT1), (IEN \| PTU \| EN \| M0)) /MMC2_DAT1/\
				166	MUX_VAL(CP(MMC2_DAT2), (IEN \| PTU \| EN \| M0)) /MMC2_DAT2/\
				167	MUX_VAL(CP(MMC2_DAT3), (IEN \| PTU \| EN \| M0)) /MMC2_DAT3/\
				168	MUX_VAL(CP(MMC2_DAT4), (IDIS \| PTD \| DIS \| M1)) /MMC2_DIR_DAT0/\
				169	MUX_VAL(CP(MMC2_DAT5), (IDIS \| PTD \| DIS \| M1)) /MMC2_DIR_DAT1/\
				170	MUX_VAL(CP(MMC2_DAT6), (IDIS \| PTD \| DIS \| M1)) /MMC2_DIR_CMD /\
				171	MUX_VAL(CP(MMC2_DAT7), (IEN \| PTU \| EN \| M1)) /MMC2_CLKIN/\
				172	MUX_VAL(CP(MMC1_DAT5), (IEN \| PTD \| DIS \| M4)) /GPIO_127 - MMC2_WP/\
Dirk Behme	2be2c6c	2009-01-28 21:39:58 +0100	[diff] [blame]	173	/SDIO Interface to WIFI Module/\
Olof Johansson	fc9165f	2009-09-28 08:19:30 -0400	[diff] [blame]	174	MUX_VAL(CP(ETK_CLK_ES2), (IEN \| PTD \| DIS \| M2)) /MMC3_CLK/\
				175	MUX_VAL(CP(ETK_CTL_ES2), (IEN \| PTU \| EN \| M2)) /MMC3_CMD/\
				176	MUX_VAL(CP(ETK_D4_ES2), (IEN \| PTU \| EN \| M2)) /MMC3_DAT0/\
				177	MUX_VAL(CP(ETK_D5_ES2), (IEN \| PTU \| EN \| M2)) /MMC3_DAT1/\
				178	MUX_VAL(CP(ETK_D6_ES2), (IEN \| PTU \| EN \| M2)) /MMC3_DAT2/\
				179	MUX_VAL(CP(ETK_D3_ES2), (IEN \| PTU \| EN \| M2)) /MMC3_DAT3/\
Dirk Behme	2be2c6c	2009-01-28 21:39:58 +0100	[diff] [blame]	180	/Audio Interface To Bluetooth chip/\
Olof Johansson	fc9165f	2009-09-28 08:19:30 -0400	[diff] [blame]	181	MUX_VAL(CP(MCBSP3_DX), (IDIS \| PTD \| DIS \| M0)) /McBSP3_DX/\
				182	MUX_VAL(CP(MCBSP3_DR), (IEN \| PTD \| DIS \| M0)) /McBSP3_DR/\
				183	MUX_VAL(CP(MCBSP3_CLKX), (IEN \| PTD \| DIS \| M0)) /McBSP3_CLKX/\
				184	MUX_VAL(CP(MCBSP3_FSX), (IEN \| PTD \| DIS \| M0)) /McBSP3_FSX/\
Dirk Behme	2be2c6c	2009-01-28 21:39:58 +0100	[diff] [blame]	185	/Digital Interface to Bluetooth (UART)/\
Olof Johansson	fc9165f	2009-09-28 08:19:30 -0400	[diff] [blame]	186	MUX_VAL(CP(UART1_TX), (IDIS \| PTD \| DIS \| M0)) /UART1_TX/\
				187	MUX_VAL(CP(UART1_RTS), (IDIS \| PTD \| DIS \| M0)) /UART1_RTS/\
				188	MUX_VAL(CP(UART1_CTS), (IEN \| PTU \| EN \| M0)) /UART1_CTS/\
				189	MUX_VAL(CP(UART1_RX), (IEN \| PTD \| DIS \| M0)) /UART1_RX/\
Dirk Behme	2be2c6c	2009-01-28 21:39:58 +0100	[diff] [blame]	190	/Audio Interface to Triton2 chip (TPS65950)/\
Olof Johansson	fc9165f	2009-09-28 08:19:30 -0400	[diff] [blame]	191	MUX_VAL(CP(MCBSP4_CLKX), (IEN \| PTD \| DIS \| M0)) /McBSP4_CLKX/\
				192	MUX_VAL(CP(MCBSP4_DR), (IEN \| PTD \| DIS \| M0)) /McBSP4_DR/\
				193	MUX_VAL(CP(MCBSP4_DX), (IDIS \| PTD \| DIS \| M0)) /McBSP4_DX/\
				194	MUX_VAL(CP(MCBSP4_FSX), (IEN \| PTD \| DIS \| M0)) /McBSP4_FSX/\
Dirk Behme	2be2c6c	2009-01-28 21:39:58 +0100	[diff] [blame]	195	/GPIO definitions for muxed pins on AV connector/\
Olof Johansson	fc9165f	2009-09-28 08:19:30 -0400	[diff] [blame]	196	MUX_VAL(CP(UART2_CTS), (IEN \| PTD \| EN \| M4)) /GPIO_144,/\
				197	/UART2_CTS/\
				198	MUX_VAL(CP(UART2_RTS), (IEN \| PTD \| EN \| M4)) /GPIO_145,/\
				199	/UART2_RTS/\
				200	MUX_VAL(CP(UART2_TX), (IEN \| PTD \| EN \| M4)) /GPIO_146,/\
				201	/UART2_TX/\
				202	MUX_VAL(CP(UART2_RX), (IEN \| PTD \| EN \| M4)) /GPIO_147,/\
				203	/UART2_RX/\
Dirk Behme	2be2c6c	2009-01-28 21:39:58 +0100	[diff] [blame]	204	/Serial Interface (Peripheral boot, Linux console, on AV connector)/\
Grazvydas Ignotas	01826ab	2009-11-12 11:46:07 +0200	[diff] [blame]	205	/RX pulled up to avoid noise when nothing is connected to serial port/\
				206	MUX_VAL(CP(UART3_RX_IRRX), (IEN \| PTU \| EN \| M0)) /UART3_RX/\
Olof Johansson	fc9165f	2009-09-28 08:19:30 -0400	[diff] [blame]	207	MUX_VAL(CP(UART3_TX_IRTX), (IDIS \| PTD \| DIS \| M0)) /UART3_TX/\
Dirk Behme	2be2c6c	2009-01-28 21:39:58 +0100	[diff] [blame]	208	/LEDs (Controlled by OMAP)/\
Olof Johansson	fc9165f	2009-09-28 08:19:30 -0400	[diff] [blame]	209	MUX_VAL(CP(MMC1_DAT6), (IDIS \| PTD \| DIS \| M4)) /GPIO_128/\
				210	/* - LED_MMC1*/\
				211	MUX_VAL(CP(MMC1_DAT7), (IDIS \| PTD \| DIS \| M4)) /GPIO_129/\
				212	/* - LED_MMC2*/\
				213	MUX_VAL(CP(MCBSP1_DX), (IDIS \| PTD \| DIS \| M4)) /GPIO_158/\
				214	/* - LED_BT*/\
				215	MUX_VAL(CP(MCBSP1_DR), (IDIS \| PTD \| DIS \| M4)) /GPIO_159/\
				216	/* - LED_WIFI*/\
Dirk Behme	2be2c6c	2009-01-28 21:39:58 +0100	[diff] [blame]	217	/Switches/\
Olof Johansson	fc9165f	2009-09-28 08:19:30 -0400	[diff] [blame]	218	MUX_VAL(CP(MCSPI1_CS2), (IEN \| PTD \| DIS \| M4)) /GPIO_176/\
				219	/* - nHOLD_SWITCH*/\
				220	MUX_VAL(CP(CAM_D9), (IEN \| PTD \| DIS \| M4)) /GPIO_108/\
				221	/* - nLID_SWITCH*/\
Dirk Behme	2be2c6c	2009-01-28 21:39:58 +0100	[diff] [blame]	222	/External IRQs/\
Olof Johansson	fc9165f	2009-09-28 08:19:30 -0400	[diff] [blame]	223	MUX_VAL(CP(CAM_HS), (IEN \| PTD \| DIS \| M4)) /GPIO_94/\
				224	/* - nTOUCH_IRQ*/\
				225	MUX_VAL(CP(ETK_D7_ES2), (IEN \| PTD \| DIS \| M4)) /GPIO_21/\
				226	/* - WIFI_IRQ*/\
				227	MUX_VAL(CP(MCBSP1_FSX), (IEN \| PTD \| DIS \| M4)) /GPIO_161/\
				228	/* - nIRQ_NUB1*/\
				229	MUX_VAL(CP(MCBSP1_CLKX), (IEN \| PTD \| DIS \| M4)) /GPIO_162/\
				230	/* - nIRQ_NUB2*/\
Dirk Behme	2be2c6c	2009-01-28 21:39:58 +0100	[diff] [blame]	231	/Various other stuff/\
Olof Johansson	fc9165f	2009-09-28 08:19:30 -0400	[diff] [blame]	232	MUX_VAL(CP(UART3_CTS_RCTX), (IEN \| PTD \| DIS \| M4)) /GPIO_163/\
				233	/* - nOC_USB5*/\
				234	MUX_VAL(CP(ETK_D8_ES2), (IEN \| PTD \| DIS \| M4)) /GPIO_22/\
				235	/* - MSECURE*/\
				236	MUX_VAL(CP(CSI2_DY1), (IEN \| PTD \| DIS \| M4)) /GPIO_115/\
				237	/* - POP_OVERHEAT*/\
Dirk Behme	2be2c6c	2009-01-28 21:39:58 +0100	[diff] [blame]	238	/External Resets and Enables/\
Olof Johansson	fc9165f	2009-09-28 08:19:30 -0400	[diff] [blame]	239	MUX_VAL(CP(ETK_D0_ES2), (IDIS \| PTD \| DIS \| M4)) /GPIO_14/\
				240	/* - nHDPHN_SHUTDOWN*/\
				241	MUX_VAL(CP(ETK_D1_ES2), (IDIS \| PTD \| DIS \| M4)) /GPIO_15/\
				242	/* - nBT_SHUTDOWN*/\
				243	MUX_VAL(CP(ETK_D9_ES2), (IDIS \| PTD \| DIS \| M4)) /GPIO_23/\
				244	/* - nWIFI_RESET*/\
				245	MUX_VAL(CP(MCBSP1_FSR), (IDIS \| PTU \| DIS \| M4)) /GPIO_157/\
				246	/* - nLCD_RESET*/\
				247	MUX_VAL(CP(MCBSP1_CLKR), (IDIS \| PTD \| DIS \| M4)) /GPIO_156/\
				248	/* - RESET_NUBS*/\
				249	MUX_VAL(CP(UART3_RTS_SD), (IDIS \| PTD \| DIS \| M4)) /GPIO_164/\
				250	/* - EN_USB_5V*/\
Grazvydas Ignotas	5ff7812	2009-07-08 00:29:59 +0300	[diff] [blame]	251	/Spare GPIOs/\
Olof Johansson	fc9165f	2009-09-28 08:19:30 -0400	[diff] [blame]	252	MUX_VAL(CP(GPMC_NCS7), (IEN \| PTD \| EN \| M4)) /GPIO_58/\
				253	MUX_VAL(CP(GPMC_WAIT2), (IEN \| PTD \| EN \| M4)) /GPIO_64/\
				254	MUX_VAL(CP(GPMC_WAIT3), (IEN \| PTD \| EN \| M4)) /GPIO_65/\
				255	MUX_VAL(CP(CAM_VS), (IEN \| PTU \| EN \| M4)) /GPIO_95/\
				256	MUX_VAL(CP(CAM_WEN), (IEN \| PTD \| EN \| M4)) /GPIO_167/\
				257	MUX_VAL(CP(HDQ_SIO), (IEN \| PTD \| EN \| M4)) /GPIO_170/\
Dirk Behme	2be2c6c	2009-01-28 21:39:58 +0100	[diff] [blame]	258	/HS USB OTG Port (connects to HSUSB0)/\
Olof Johansson	fc9165f	2009-09-28 08:19:30 -0400	[diff] [blame]	259	MUX_VAL(CP(HSUSB0_CLK), (IEN \| PTD \| DIS \| M0)) /HSUSB0_CLK/\
				260	MUX_VAL(CP(HSUSB0_STP), (IDIS \| PTU \| EN \| M0)) /HSUSB0_STP/\
				261	MUX_VAL(CP(HSUSB0_DIR), (IEN \| PTD \| DIS \| M0)) /HSUSB0_DIR/\
				262	MUX_VAL(CP(HSUSB0_NXT), (IEN \| PTD \| DIS \| M0)) /HSUSB0_NXT/\
				263	MUX_VAL(CP(HSUSB0_DATA0), (IEN \| PTD \| DIS \| M0)) /HSUSB0_DATA0/\
				264	MUX_VAL(CP(HSUSB0_DATA1), (IEN \| PTD \| DIS \| M0)) /HSUSB0_DATA1/\
				265	MUX_VAL(CP(HSUSB0_DATA2), (IEN \| PTD \| DIS \| M0)) /HSUSB0_DATA2/\
				266	MUX_VAL(CP(HSUSB0_DATA3), (IEN \| PTD \| DIS \| M0)) /HSUSB0_DATA3/\
				267	MUX_VAL(CP(HSUSB0_DATA4), (IEN \| PTD \| DIS \| M0)) /HSUSB0_DATA4/\
				268	MUX_VAL(CP(HSUSB0_DATA5), (IEN \| PTD \| DIS \| M0)) /HSUSB0_DATA5/\
				269	MUX_VAL(CP(HSUSB0_DATA6), (IEN \| PTD \| DIS \| M0)) /HSUSB0_DATA6/\
				270	MUX_VAL(CP(HSUSB0_DATA7), (IEN \| PTD \| DIS \| M0)) /HSUSB0_DATA7/\
Dirk Behme	2be2c6c	2009-01-28 21:39:58 +0100	[diff] [blame]	271	/I2C Ports/\
Olof Johansson	fc9165f	2009-09-28 08:19:30 -0400	[diff] [blame]	272	MUX_VAL(CP(I2C1_SCL), (IEN \| PTU \| EN \| M0)) /I2C1_SCL - T2_CTRL/\
				273	MUX_VAL(CP(I2C1_SDA), (IEN \| PTU \| EN \| M0)) /I2C1_SDA - T2_CTRL/\
				274	MUX_VAL(CP(I2C3_SCL), (IEN \| PTU \| EN \| M0)) /I2C3_SCL - NUBS/\
				275	MUX_VAL(CP(I2C3_SDA), (IEN \| PTU \| EN \| M0)) /I2C3_SDA - NUBS/\
				276	MUX_VAL(CP(I2C4_SCL), (IEN \| PTU \| EN \| M0)) /I2C4_SCL - T2_SR/\
				277	MUX_VAL(CP(I2C4_SDA), (IEN \| PTU \| EN \| M0)) /I2C4_SDA - T2_SR/\
Dirk Behme	2be2c6c	2009-01-28 21:39:58 +0100	[diff] [blame]	278	/Serial Interface (Touch, LCD control)/\
Olof Johansson	fc9165f	2009-09-28 08:19:30 -0400	[diff] [blame]	279	MUX_VAL(CP(MCSPI1_CLK), (IEN \| PTD \| DIS \| M0)) /McSPI1_CLK/\
				280	MUX_VAL(CP(MCSPI1_SIMO), (IEN \| PTD \| DIS \| M0)) /McSPI1_SIMO/\
				281	MUX_VAL(CP(MCSPI1_SOMI), (IEN \| PTD \| DIS \| M0)) /McSPI1_SOMI/\
				282	MUX_VAL(CP(MCSPI1_CS0), (IDIS \| PTU \| EN \| M0)) /McSPI1_CS0 - TOUCH/\
				283	MUX_VAL(CP(MCSPI1_CS1), (IDIS \| PTU \| EN \| M0)) /McSPI1_CS1 - LCD/\
Dirk Behme	2be2c6c	2009-01-28 21:39:58 +0100	[diff] [blame]	284	/HS USB HOST Port (connects to HSUSB2)/\
Olof Johansson	fc9165f	2009-09-28 08:19:30 -0400	[diff] [blame]	285	MUX_VAL(CP(ETK_D10_ES2), (IDIS \| PTD \| DIS \| M3)) /USB_HOST_CLK/\
				286	MUX_VAL(CP(ETK_D11_ES2), (IDIS \| PTU \| EN \| M3)) /USB_HOST_STP/\
				287	MUX_VAL(CP(ETK_D12_ES2), (IEN \| PTD \| DIS \| M3)) /USB_HOST_DIR/\
				288	MUX_VAL(CP(ETK_D13_ES2), (IEN \| PTD \| DIS \| M3)) /USB_HOST_NXT/\
				289	MUX_VAL(CP(ETK_D14_ES2), (IEN \| PTD \| DIS \| M3)) /USB_HOST_D0/\
				290	MUX_VAL(CP(ETK_D15_ES2), (IEN \| PTD \| DIS \| M3)) /USB_HOST_D1/\
				291	MUX_VAL(CP(MCSPI1_CS3), (IEN \| PTD \| DIS \| M3)) /USB_HOST_D2/\
				292	MUX_VAL(CP(MCSPI2_CS1), (IEN \| PTD \| DIS \| M3)) /USB_HOST_D3/\
				293	MUX_VAL(CP(MCSPI2_SIMO), (IEN \| PTD \| DIS \| M3)) /USB_HOST_D4/\
				294	MUX_VAL(CP(MCSPI2_SOMI), (IEN \| PTD \| DIS \| M3)) /USB_HOST_D5/\
				295	MUX_VAL(CP(MCSPI2_CS0), (IEN \| PTD \| DIS \| M3)) /USB_HOST_D6/\
				296	MUX_VAL(CP(MCSPI2_CLK), (IEN \| PTD \| DIS \| M3)) /USB_HOST_D7/\
				297	MUX_VAL(CP(ETK_D2_ES2), (IDIS \| PTD \| DIS \| M4)) /GPIO_16/\
				298	/* - nRESET_USB_HOST*/\
Dirk Behme	2be2c6c	2009-01-28 21:39:58 +0100	[diff] [blame]	299	/Control and debug /\
Olof Johansson	fc9165f	2009-09-28 08:19:30 -0400	[diff] [blame]	300	MUX_VAL(CP(SYS_32K), (IEN \| PTD \| DIS \| M0)) /SYS_32K/\
				301	MUX_VAL(CP(SYS_CLKREQ), (IEN \| PTD \| DIS \| M0)) /SYS_CLKREQ/\
				302	MUX_VAL(CP(SYS_NIRQ), (IEN \| PTU \| EN \| M0)) /SYS_nIRQ/\
				303	MUX_VAL(CP(SYS_BOOT0), (IEN \| PTD \| DIS \| M4)) /GPIO_2/\
				304	MUX_VAL(CP(SYS_BOOT1), (IEN \| PTD \| DIS \| M4)) /GPIO_3/\
				305	MUX_VAL(CP(SYS_BOOT2), (IEN \| PTD \| DIS \| M4)) /GPIO_4/\
				306	MUX_VAL(CP(SYS_BOOT3), (IEN \| PTD \| DIS \| M4)) /GPIO_5/\
				307	MUX_VAL(CP(SYS_BOOT4), (IEN \| PTD \| DIS \| M4)) /GPIO_6/\
				308	MUX_VAL(CP(SYS_BOOT5), (IEN \| PTD \| DIS \| M4)) /GPIO_7/\
				309	MUX_VAL(CP(SYS_BOOT6), (IEN \| PTD \| DIS \| M4)) /GPIO_8/\
				310	MUX_VAL(CP(SYS_OFF_MODE), (IEN \| PTD \| DIS \| M0)) /SYS_OFF_MODE/\
Dirk Behme	2be2c6c	2009-01-28 21:39:58 +0100	[diff] [blame]	311	/JTAG/\
Igor Grinberg	b5ff205	2014-10-21 18:25:30 +0300	[diff] [blame]	312	MUX_VAL(CP(JTAG_NTRST), (IEN \| PTD \| DIS \| M0)) /JTAG_NTRST/\
Olof Johansson	fc9165f	2009-09-28 08:19:30 -0400	[diff] [blame]	313	MUX_VAL(CP(JTAG_TCK), (IEN \| PTD \| DIS \| M0)) /JTAG_TCK/\
				314	MUX_VAL(CP(JTAG_TMS), (IEN \| PTD \| DIS \| M0)) /JTAG_TMS/\
				315	MUX_VAL(CP(JTAG_TDI), (IEN \| PTD \| DIS \| M0)) /JTAG_TDI/\
				316	MUX_VAL(CP(JTAG_EMU0), (IEN \| PTD \| DIS \| M0)) /JTAG_EMU0/\
				317	MUX_VAL(CP(JTAG_EMU1), (IEN \| PTD \| DIS \| M0)) /JTAG_EMU1/\
Dirk Behme	2be2c6c	2009-01-28 21:39:58 +0100	[diff] [blame]	318	/Die to Die stuff/\
Olof Johansson	fc9165f	2009-09-28 08:19:30 -0400	[diff] [blame]	319	MUX_VAL(CP(D2D_MCAD1), (IEN \| PTD \| EN \| M0)) /d2d_mcad1/\
				320	MUX_VAL(CP(D2D_MCAD2), (IEN \| PTD \| EN \| M0)) /d2d_mcad2/\
				321	MUX_VAL(CP(D2D_MCAD3), (IEN \| PTD \| EN \| M0)) /d2d_mcad3/\
				322	MUX_VAL(CP(D2D_MCAD4), (IEN \| PTD \| EN \| M0)) /d2d_mcad4/\
				323	MUX_VAL(CP(D2D_MCAD5), (IEN \| PTD \| EN \| M0)) /d2d_mcad5/\
				324	MUX_VAL(CP(D2D_MCAD6), (IEN \| PTD \| EN \| M0)) /d2d_mcad6/\
				325	MUX_VAL(CP(D2D_MCAD7), (IEN \| PTD \| EN \| M0)) /d2d_mcad7/\
				326	MUX_VAL(CP(D2D_MCAD8), (IEN \| PTD \| EN \| M0)) /d2d_mcad8/\
				327	MUX_VAL(CP(D2D_MCAD9), (IEN \| PTD \| EN \| M0)) /d2d_mcad9/\
				328	MUX_VAL(CP(D2D_MCAD10), (IEN \| PTD \| EN \| M0)) /d2d_mcad10/\
				329	MUX_VAL(CP(D2D_MCAD11), (IEN \| PTD \| EN \| M0)) /d2d_mcad11/\
				330	MUX_VAL(CP(D2D_MCAD12), (IEN \| PTD \| EN \| M0)) /d2d_mcad12/\
				331	MUX_VAL(CP(D2D_MCAD13), (IEN \| PTD \| EN \| M0)) /d2d_mcad13/\
				332	MUX_VAL(CP(D2D_MCAD14), (IEN \| PTD \| EN \| M0)) /d2d_mcad14/\
				333	MUX_VAL(CP(D2D_MCAD15), (IEN \| PTD \| EN \| M0)) /d2d_mcad15/\
				334	MUX_VAL(CP(D2D_MCAD16), (IEN \| PTD \| EN \| M0)) /d2d_mcad16/\
				335	MUX_VAL(CP(D2D_MCAD17), (IEN \| PTD \| EN \| M0)) /d2d_mcad17/\
				336	MUX_VAL(CP(D2D_MCAD18), (IEN \| PTD \| EN \| M0)) /d2d_mcad18/\
				337	MUX_VAL(CP(D2D_MCAD19), (IEN \| PTD \| EN \| M0)) /d2d_mcad19/\
				338	MUX_VAL(CP(D2D_MCAD20), (IEN \| PTD \| EN \| M0)) /d2d_mcad20/\
				339	MUX_VAL(CP(D2D_MCAD21), (IEN \| PTD \| EN \| M0)) /d2d_mcad21/\
				340	MUX_VAL(CP(D2D_MCAD22), (IEN \| PTD \| EN \| M0)) /d2d_mcad22/\
				341	MUX_VAL(CP(D2D_MCAD23), (IEN \| PTD \| EN \| M0)) /d2d_mcad23/\
				342	MUX_VAL(CP(D2D_MCAD24), (IEN \| PTD \| EN \| M0)) /d2d_mcad24/\
				343	MUX_VAL(CP(D2D_MCAD25), (IEN \| PTD \| EN \| M0)) /d2d_mcad25/\
				344	MUX_VAL(CP(D2D_MCAD26), (IEN \| PTD \| EN \| M0)) /d2d_mcad26/\
				345	MUX_VAL(CP(D2D_MCAD27), (IEN \| PTD \| EN \| M0)) /d2d_mcad27/\
				346	MUX_VAL(CP(D2D_MCAD28), (IEN \| PTD \| EN \| M0)) /d2d_mcad28/\
				347	MUX_VAL(CP(D2D_MCAD29), (IEN \| PTD \| EN \| M0)) /d2d_mcad29/\
				348	MUX_VAL(CP(D2D_MCAD30), (IEN \| PTD \| EN \| M0)) /d2d_mcad30/\
				349	MUX_VAL(CP(D2D_MCAD31), (IEN \| PTD \| EN \| M0)) /d2d_mcad31/\
				350	MUX_VAL(CP(D2D_MCAD32), (IEN \| PTD \| EN \| M0)) /d2d_mcad32/\
				351	MUX_VAL(CP(D2D_MCAD33), (IEN \| PTD \| EN \| M0)) /d2d_mcad33/\
				352	MUX_VAL(CP(D2D_MCAD34), (IEN \| PTD \| EN \| M0)) /d2d_mcad34/\
				353	MUX_VAL(CP(D2D_MCAD35), (IEN \| PTD \| EN \| M0)) /d2d_mcad35/\
				354	MUX_VAL(CP(D2D_MCAD36), (IEN \| PTD \| EN \| M0)) /d2d_mcad36/\
				355	MUX_VAL(CP(D2D_CLK26MI), (IEN \| PTD \| DIS \| M0)) /d2d_clk26mi/\
				356	MUX_VAL(CP(D2D_NRESPWRON), (IEN \| PTD \| EN \| M0)) /d2d_nrespwron/\
				357	MUX_VAL(CP(D2D_NRESWARM), (IEN \| PTU \| EN \| M0)) /d2d_nreswarm/\
				358	MUX_VAL(CP(D2D_ARM9NIRQ), (IEN \| PTD \| DIS \| M0)) /d2d_arm9nirq/\
				359	MUX_VAL(CP(D2D_UMA2P6FIQ), (IEN \| PTD \| DIS \| M0)) /d2d_uma2p6fiq/\
				360	MUX_VAL(CP(D2D_SPINT), (IEN \| PTD \| EN \| M0)) /d2d_spint/\
				361	MUX_VAL(CP(D2D_FRINT), (IEN \| PTD \| EN \| M0)) /d2d_frint/\
				362	MUX_VAL(CP(D2D_DMAREQ0), (IEN \| PTD \| DIS \| M0)) /d2d_dmareq0/\
				363	MUX_VAL(CP(D2D_DMAREQ1), (IEN \| PTD \| DIS \| M0)) /d2d_dmareq1/\
				364	MUX_VAL(CP(D2D_DMAREQ2), (IEN \| PTD \| DIS \| M0)) /d2d_dmareq2/\
				365	MUX_VAL(CP(D2D_DMAREQ3), (IEN \| PTD \| DIS \| M0)) /d2d_dmareq3/\
				366	MUX_VAL(CP(D2D_N3GTRST), (IEN \| PTD \| DIS \| M0)) /d2d_n3gtrst/\
				367	MUX_VAL(CP(D2D_N3GTDI), (IEN \| PTD \| DIS \| M0)) /d2d_n3gtdi/\
				368	MUX_VAL(CP(D2D_N3GTDO), (IEN \| PTD \| DIS \| M0)) /d2d_n3gtdo/\
				369	MUX_VAL(CP(D2D_N3GTMS), (IEN \| PTD \| DIS \| M0)) /d2d_n3gtms/\
				370	MUX_VAL(CP(D2D_N3GTCK), (IEN \| PTD \| DIS \| M0)) /d2d_n3gtck/\
				371	MUX_VAL(CP(D2D_N3GRTCK), (IEN \| PTD \| DIS \| M0)) /d2d_n3grtck/\
				372	MUX_VAL(CP(D2D_MSTDBY), (IEN \| PTU \| EN \| M0)) /d2d_mstdby/\
				373	MUX_VAL(CP(D2D_SWAKEUP), (IEN \| PTD \| EN \| M0)) /d2d_swakeup/\
				374	MUX_VAL(CP(D2D_IDLEREQ), (IEN \| PTD \| DIS \| M0)) /d2d_idlereq/\
				375	MUX_VAL(CP(D2D_IDLEACK), (IEN \| PTU \| EN \| M0)) /d2d_idleack/\
				376	MUX_VAL(CP(D2D_MWRITE), (IEN \| PTD \| DIS \| M0)) /d2d_mwrite/\
				377	MUX_VAL(CP(D2D_SWRITE), (IEN \| PTD \| DIS \| M0)) /d2d_swrite/\
				378	MUX_VAL(CP(D2D_MREAD), (IEN \| PTD \| DIS \| M0)) /d2d_mread/\
				379	MUX_VAL(CP(D2D_SREAD), (IEN \| PTD \| DIS \| M0)) /d2d_sread/\
				380	MUX_VAL(CP(D2D_MBUSFLAG), (IEN \| PTD \| DIS \| M0)) /d2d_mbusflag/\
				381	MUX_VAL(CP(D2D_SBUSFLAG), (IEN \| PTD \| DIS \| M0)) /d2d_sbusflag/\
				382	MUX_VAL(CP(SDRC_CKE0), (IDIS \| PTU \| EN \| M0)) /sdrc_cke0/\
				383	MUX_VAL(CP(SDRC_CKE1), (IDIS \| PTU \| EN \| M0)) /sdrc_cke1/
Dirk Behme	2be2c6c	2009-01-28 21:39:58 +0100	[diff] [blame]	384
Grazvydas Ignotas	10cd73b	2012-03-22 13:49:21 +0000	[diff] [blame]	385	#define MUX_PANDORA_3730() \
				386	MUX_VAL(CP(GPIO126), (IEN \| PTD \| DIS \| M4)) /GPIO_126 - MMC1_WP/\
				387	MUX_VAL(CP(GPIO127), (IEN \| PTD \| DIS \| M4)) /GPIO_127 - MMC2_WP/\
				388	MUX_VAL(CP(GPIO128), (IDIS \| PTD \| DIS \| M4)) /GPIO_128 - LED_MMC1/\
				389	MUX_VAL(CP(GPIO129), (IDIS \| PTD \| DIS \| M4)) /GPIO_129 - LED_MMC2/
				390
Dirk Behme	2be2c6c	2009-01-28 21:39:58 +0100	[diff] [blame]	391	#endif