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Vadim Bendebury5e124722011-10-17 08:36:14 +00001/*
2 * Copyright (c) 2011 The Chromium OS Authors.
3 *
Wolfgang Denk1a459662013-07-08 09:37:19 +02004 * SPDX-License-Identifier: GPL-2.0+
Vadim Bendebury5e124722011-10-17 08:36:14 +00005 */
6
7/*
8 * The code in this file is based on the article "Writing a TPM Device Driver"
9 * published on http://ptgmedia.pearsoncmg.com.
10 *
11 * One principal difference is that in the simplest config the other than 0
12 * TPM localities do not get mapped by some devices (for instance, by Infineon
13 * slb9635), so this driver provides access to locality 0 only.
14 */
15
16#include <common.h>
Simon Glassd616ba52015-08-22 18:31:39 -060017#include <dm.h>
18#include <mapmem.h>
Simon Glassf255d312015-08-22 18:31:31 -060019#include <tis.h>
Vadim Bendebury5e124722011-10-17 08:36:14 +000020#include <tpm.h>
Simon Glassd616ba52015-08-22 18:31:39 -060021#include <asm/io.h>
Vadim Bendebury5e124722011-10-17 08:36:14 +000022
23#define PREFIX "lpc_tpm: "
24
25struct tpm_locality {
26 u32 access;
27 u8 padding0[4];
28 u32 int_enable;
29 u8 vector;
30 u8 padding1[3];
31 u32 int_status;
32 u32 int_capability;
33 u32 tpm_status;
34 u8 padding2[8];
35 u8 data;
36 u8 padding3[3803];
37 u32 did_vid;
38 u8 rid;
39 u8 padding4[251];
40};
41
Simon Glassd616ba52015-08-22 18:31:39 -060042struct tpm_tis_lpc_priv {
43 struct tpm_locality *regs;
44};
45
Vadim Bendebury5e124722011-10-17 08:36:14 +000046/*
47 * This pointer refers to the TPM chip, 5 of its localities are mapped as an
48 * array.
49 */
50#define TPM_TOTAL_LOCALITIES 5
Vadim Bendebury5e124722011-10-17 08:36:14 +000051
52/* Some registers' bit field definitions */
53#define TIS_STS_VALID (1 << 7) /* 0x80 */
54#define TIS_STS_COMMAND_READY (1 << 6) /* 0x40 */
55#define TIS_STS_TPM_GO (1 << 5) /* 0x20 */
56#define TIS_STS_DATA_AVAILABLE (1 << 4) /* 0x10 */
57#define TIS_STS_EXPECT (1 << 3) /* 0x08 */
58#define TIS_STS_RESPONSE_RETRY (1 << 1) /* 0x02 */
59
60#define TIS_ACCESS_TPM_REG_VALID_STS (1 << 7) /* 0x80 */
61#define TIS_ACCESS_ACTIVE_LOCALITY (1 << 5) /* 0x20 */
62#define TIS_ACCESS_BEEN_SEIZED (1 << 4) /* 0x10 */
63#define TIS_ACCESS_SEIZE (1 << 3) /* 0x08 */
64#define TIS_ACCESS_PENDING_REQUEST (1 << 2) /* 0x04 */
65#define TIS_ACCESS_REQUEST_USE (1 << 1) /* 0x02 */
66#define TIS_ACCESS_TPM_ESTABLISHMENT (1 << 0) /* 0x01 */
67
68#define TIS_STS_BURST_COUNT_MASK (0xffff)
69#define TIS_STS_BURST_COUNT_SHIFT (8)
70
Vadim Bendebury5e124722011-10-17 08:36:14 +000071 /* 1 second is plenty for anything TPM does. */
72#define MAX_DELAY_US (1000 * 1000)
73
74/* Retrieve burst count value out of the status register contents. */
75static u16 burst_count(u32 status)
76{
Simon Glassd616ba52015-08-22 18:31:39 -060077 return (status >> TIS_STS_BURST_COUNT_SHIFT) &
78 TIS_STS_BURST_COUNT_MASK;
Vadim Bendebury5e124722011-10-17 08:36:14 +000079}
80
Vadim Bendebury5e124722011-10-17 08:36:14 +000081/* TPM access wrappers to support tracing */
Simon Glassd616ba52015-08-22 18:31:39 -060082static u8 tpm_read_byte(struct tpm_tis_lpc_priv *priv, const u8 *ptr)
Vadim Bendebury5e124722011-10-17 08:36:14 +000083{
84 u8 ret = readb(ptr);
85 debug(PREFIX "Read reg 0x%4.4x returns 0x%2.2x\n",
Simon Glassd616ba52015-08-22 18:31:39 -060086 (u32)(uintptr_t)ptr - (u32)(uintptr_t)priv->regs, ret);
Vadim Bendebury5e124722011-10-17 08:36:14 +000087 return ret;
88}
89
Simon Glassd616ba52015-08-22 18:31:39 -060090static u32 tpm_read_word(struct tpm_tis_lpc_priv *priv, const u32 *ptr)
Vadim Bendebury5e124722011-10-17 08:36:14 +000091{
92 u32 ret = readl(ptr);
93 debug(PREFIX "Read reg 0x%4.4x returns 0x%8.8x\n",
Simon Glassd616ba52015-08-22 18:31:39 -060094 (u32)(uintptr_t)ptr - (u32)(uintptr_t)priv->regs, ret);
Vadim Bendebury5e124722011-10-17 08:36:14 +000095 return ret;
96}
97
Simon Glassd616ba52015-08-22 18:31:39 -060098static void tpm_write_byte(struct tpm_tis_lpc_priv *priv, u8 value, u8 *ptr)
Vadim Bendebury5e124722011-10-17 08:36:14 +000099{
100 debug(PREFIX "Write reg 0x%4.4x with 0x%2.2x\n",
Simon Glassd616ba52015-08-22 18:31:39 -0600101 (u32)(uintptr_t)ptr - (u32)(uintptr_t)priv->regs, value);
Vadim Bendebury5e124722011-10-17 08:36:14 +0000102 writeb(value, ptr);
103}
104
Simon Glassd616ba52015-08-22 18:31:39 -0600105static void tpm_write_word(struct tpm_tis_lpc_priv *priv, u32 value,
106 u32 *ptr)
Vadim Bendebury5e124722011-10-17 08:36:14 +0000107{
108 debug(PREFIX "Write reg 0x%4.4x with 0x%8.8x\n",
Simon Glassd616ba52015-08-22 18:31:39 -0600109 (u32)(uintptr_t)ptr - (u32)(uintptr_t)priv->regs, value);
Vadim Bendebury5e124722011-10-17 08:36:14 +0000110 writel(value, ptr);
111}
112
113/*
114 * tis_wait_reg()
115 *
116 * Wait for at least a second for a register to change its state to match the
117 * expected state. Normally the transition happens within microseconds.
118 *
119 * @reg - pointer to the TPM register
120 * @mask - bitmask for the bitfield(s) to watch
121 * @expected - value the field(s) are supposed to be set to
122 *
123 * Returns the register contents in case the expected value was found in the
Simon Glassd616ba52015-08-22 18:31:39 -0600124 * appropriate register bits, or -ETIMEDOUT on timeout.
Vadim Bendebury5e124722011-10-17 08:36:14 +0000125 */
Simon Glassd616ba52015-08-22 18:31:39 -0600126static int tis_wait_reg(struct tpm_tis_lpc_priv *priv, u32 *reg, u8 mask,
127 u8 expected)
Vadim Bendebury5e124722011-10-17 08:36:14 +0000128{
129 u32 time_us = MAX_DELAY_US;
130
131 while (time_us > 0) {
Simon Glassd616ba52015-08-22 18:31:39 -0600132 u32 value = tpm_read_word(priv, reg);
Vadim Bendebury5e124722011-10-17 08:36:14 +0000133 if ((value & mask) == expected)
134 return value;
135 udelay(1); /* 1 us */
136 time_us--;
137 }
Simon Glassd616ba52015-08-22 18:31:39 -0600138
139 return -ETIMEDOUT;
Vadim Bendebury5e124722011-10-17 08:36:14 +0000140}
141
142/*
143 * Probe the TPM device and try determining its manufacturer/device name.
144 *
Simon Glassd616ba52015-08-22 18:31:39 -0600145 * Returns 0 on success, -ve on error
Vadim Bendebury5e124722011-10-17 08:36:14 +0000146 */
Simon Glassd616ba52015-08-22 18:31:39 -0600147static int tpm_tis_lpc_probe(struct udevice *dev)
Vadim Bendebury5e124722011-10-17 08:36:14 +0000148{
Simon Glassd616ba52015-08-22 18:31:39 -0600149 struct tpm_tis_lpc_priv *priv = dev_get_priv(dev);
150 u32 vid, did;
151 fdt_addr_t addr;
152 u32 didvid;
Vadim Bendebury5e124722011-10-17 08:36:14 +0000153
Simon Glassd616ba52015-08-22 18:31:39 -0600154 addr = dev_get_addr(dev);
155 if (addr == FDT_ADDR_T_NONE)
156 return -EINVAL;
157 priv->regs = map_sysmem(addr, 0);
158 didvid = tpm_read_word(priv, &priv->regs[0].did_vid);
Vadim Bendebury5e124722011-10-17 08:36:14 +0000159
160 vid = didvid & 0xffff;
161 did = (didvid >> 16) & 0xffff;
Simon Glassd616ba52015-08-22 18:31:39 -0600162 if (vid != 0x15d1 || did != 0xb) {
163 debug("Invalid vendor/device ID %04x/%04x\n", vid, did);
164 return -ENOSYS;
Vadim Bendebury5e124722011-10-17 08:36:14 +0000165 }
166
Simon Glassd616ba52015-08-22 18:31:39 -0600167 debug("Found TPM %s by %s\n", "SLB9635 TT 1.2", "Infineon");
168
Vadim Bendebury5e124722011-10-17 08:36:14 +0000169 return 0;
170}
171
172/*
173 * tis_senddata()
174 *
175 * send the passed in data to the TPM device.
176 *
177 * @data - address of the data to send, byte by byte
178 * @len - length of the data to send
179 *
Simon Glassd616ba52015-08-22 18:31:39 -0600180 * Returns 0 on success, -ve on error (in case the device does not accept
181 * the entire command).
Vadim Bendebury5e124722011-10-17 08:36:14 +0000182 */
Simon Glassd616ba52015-08-22 18:31:39 -0600183static int tis_senddata(struct udevice *dev, const u8 *data, size_t len)
Vadim Bendebury5e124722011-10-17 08:36:14 +0000184{
Simon Glassd616ba52015-08-22 18:31:39 -0600185 struct tpm_tis_lpc_priv *priv = dev_get_priv(dev);
186 struct tpm_locality *regs = priv->regs;
Vadim Bendebury5e124722011-10-17 08:36:14 +0000187 u32 offset = 0;
188 u16 burst = 0;
189 u32 max_cycles = 0;
190 u8 locality = 0;
191 u32 value;
192
Simon Glassd616ba52015-08-22 18:31:39 -0600193 value = tis_wait_reg(priv, &regs[locality].tpm_status,
Vadim Bendebury5e124722011-10-17 08:36:14 +0000194 TIS_STS_COMMAND_READY, TIS_STS_COMMAND_READY);
Simon Glassd616ba52015-08-22 18:31:39 -0600195 if (value == -ETIMEDOUT) {
Vadim Bendebury5e124722011-10-17 08:36:14 +0000196 printf("%s:%d - failed to get 'command_ready' status\n",
197 __FILE__, __LINE__);
Simon Glassd616ba52015-08-22 18:31:39 -0600198 return value;
Vadim Bendebury5e124722011-10-17 08:36:14 +0000199 }
200 burst = burst_count(value);
201
202 while (1) {
203 unsigned count;
204
205 /* Wait till the device is ready to accept more data. */
206 while (!burst) {
207 if (max_cycles++ == MAX_DELAY_US) {
208 printf("%s:%d failed to feed %d bytes of %d\n",
209 __FILE__, __LINE__, len - offset, len);
Simon Glassd616ba52015-08-22 18:31:39 -0600210 return -ETIMEDOUT;
Vadim Bendebury5e124722011-10-17 08:36:14 +0000211 }
212 udelay(1);
Simon Glassd616ba52015-08-22 18:31:39 -0600213 burst = burst_count(tpm_read_word(priv,
214 &regs[locality].tpm_status));
Vadim Bendebury5e124722011-10-17 08:36:14 +0000215 }
216
217 max_cycles = 0;
218
219 /*
220 * Calculate number of bytes the TPM is ready to accept in one
221 * shot.
222 *
223 * We want to send the last byte outside of the loop (hence
224 * the -1 below) to make sure that the 'expected' status bit
225 * changes to zero exactly after the last byte is fed into the
226 * FIFO.
227 */
Masahiro Yamadab4141192014-11-07 03:03:31 +0900228 count = min((u32)burst, len - offset - 1);
Vadim Bendebury5e124722011-10-17 08:36:14 +0000229 while (count--)
Simon Glassd616ba52015-08-22 18:31:39 -0600230 tpm_write_byte(priv, data[offset++],
231 &regs[locality].data);
Vadim Bendebury5e124722011-10-17 08:36:14 +0000232
Simon Glassd616ba52015-08-22 18:31:39 -0600233 value = tis_wait_reg(priv, &regs[locality].tpm_status,
Vadim Bendebury5e124722011-10-17 08:36:14 +0000234 TIS_STS_VALID, TIS_STS_VALID);
235
Simon Glassd616ba52015-08-22 18:31:39 -0600236 if ((value == -ETIMEDOUT) || !(value & TIS_STS_EXPECT)) {
Vadim Bendebury5e124722011-10-17 08:36:14 +0000237 printf("%s:%d TPM command feed overflow\n",
238 __FILE__, __LINE__);
Simon Glassd616ba52015-08-22 18:31:39 -0600239 return value == -ETIMEDOUT ? value : -EIO;
Vadim Bendebury5e124722011-10-17 08:36:14 +0000240 }
241
242 burst = burst_count(value);
243 if ((offset == (len - 1)) && burst) {
244 /*
245 * We need to be able to send the last byte to the
246 * device, so burst size must be nonzero before we
247 * break out.
248 */
249 break;
250 }
251 }
252
253 /* Send the last byte. */
Simon Glassd616ba52015-08-22 18:31:39 -0600254 tpm_write_byte(priv, data[offset++], &regs[locality].data);
Vadim Bendebury5e124722011-10-17 08:36:14 +0000255 /*
256 * Verify that TPM does not expect any more data as part of this
257 * command.
258 */
Simon Glassd616ba52015-08-22 18:31:39 -0600259 value = tis_wait_reg(priv, &regs[locality].tpm_status,
Vadim Bendebury5e124722011-10-17 08:36:14 +0000260 TIS_STS_VALID, TIS_STS_VALID);
Simon Glassd616ba52015-08-22 18:31:39 -0600261 if ((value == -ETIMEDOUT) || (value & TIS_STS_EXPECT)) {
Vadim Bendebury5e124722011-10-17 08:36:14 +0000262 printf("%s:%d unexpected TPM status 0x%x\n",
263 __FILE__, __LINE__, value);
Simon Glassd616ba52015-08-22 18:31:39 -0600264 return value == -ETIMEDOUT ? value : -EIO;
Vadim Bendebury5e124722011-10-17 08:36:14 +0000265 }
266
267 /* OK, sitting pretty, let's start the command execution. */
Simon Glassd616ba52015-08-22 18:31:39 -0600268 tpm_write_word(priv, TIS_STS_TPM_GO, &regs[locality].tpm_status);
Vadim Bendebury5e124722011-10-17 08:36:14 +0000269 return 0;
270}
271
272/*
273 * tis_readresponse()
274 *
275 * read the TPM device response after a command was issued.
276 *
277 * @buffer - address where to read the response, byte by byte.
278 * @len - pointer to the size of buffer
279 *
280 * On success stores the number of received bytes to len and returns 0. On
281 * errors (misformatted TPM data or synchronization problems) returns
Simon Glassd616ba52015-08-22 18:31:39 -0600282 * -ve value.
Vadim Bendebury5e124722011-10-17 08:36:14 +0000283 */
Simon Glassd616ba52015-08-22 18:31:39 -0600284static int tis_readresponse(struct udevice *dev, u8 *buffer, size_t len)
Vadim Bendebury5e124722011-10-17 08:36:14 +0000285{
Simon Glassd616ba52015-08-22 18:31:39 -0600286 struct tpm_tis_lpc_priv *priv = dev_get_priv(dev);
287 struct tpm_locality *regs = priv->regs;
Vadim Bendebury5e124722011-10-17 08:36:14 +0000288 u16 burst;
289 u32 value;
290 u32 offset = 0;
291 u8 locality = 0;
292 const u32 has_data = TIS_STS_DATA_AVAILABLE | TIS_STS_VALID;
Simon Glassd616ba52015-08-22 18:31:39 -0600293 u32 expected_count = len;
Vadim Bendebury5e124722011-10-17 08:36:14 +0000294 int max_cycles = 0;
295
296 /* Wait for the TPM to process the command. */
Simon Glassd616ba52015-08-22 18:31:39 -0600297 value = tis_wait_reg(priv, &regs[locality].tpm_status,
Vadim Bendebury5e124722011-10-17 08:36:14 +0000298 has_data, has_data);
Simon Glassd616ba52015-08-22 18:31:39 -0600299 if (value == -ETIMEDOUT) {
Vadim Bendebury5e124722011-10-17 08:36:14 +0000300 printf("%s:%d failed processing command\n",
301 __FILE__, __LINE__);
Simon Glassd616ba52015-08-22 18:31:39 -0600302 return value;
Vadim Bendebury5e124722011-10-17 08:36:14 +0000303 }
304
305 do {
306 while ((burst = burst_count(value)) == 0) {
307 if (max_cycles++ == MAX_DELAY_US) {
308 printf("%s:%d TPM stuck on read\n",
309 __FILE__, __LINE__);
Simon Glassd616ba52015-08-22 18:31:39 -0600310 return -EIO;
Vadim Bendebury5e124722011-10-17 08:36:14 +0000311 }
312 udelay(1);
Simon Glassd616ba52015-08-22 18:31:39 -0600313 value = tpm_read_word(priv, &regs[locality].tpm_status);
Vadim Bendebury5e124722011-10-17 08:36:14 +0000314 }
315
316 max_cycles = 0;
317
318 while (burst-- && (offset < expected_count)) {
Simon Glassd616ba52015-08-22 18:31:39 -0600319 buffer[offset++] = tpm_read_byte(priv,
320 &regs[locality].data);
Vadim Bendebury5e124722011-10-17 08:36:14 +0000321
322 if (offset == 6) {
323 /*
324 * We got the first six bytes of the reply,
325 * let's figure out how many bytes to expect
326 * total - it is stored as a 4 byte number in
327 * network order, starting with offset 2 into
328 * the body of the reply.
329 */
330 u32 real_length;
331 memcpy(&real_length,
332 buffer + 2,
333 sizeof(real_length));
334 expected_count = be32_to_cpu(real_length);
335
336 if ((expected_count < offset) ||
Simon Glassd616ba52015-08-22 18:31:39 -0600337 (expected_count > len)) {
Vadim Bendebury5e124722011-10-17 08:36:14 +0000338 printf("%s:%d bad response size %d\n",
339 __FILE__, __LINE__,
340 expected_count);
Simon Glassd616ba52015-08-22 18:31:39 -0600341 return -ENOSPC;
Vadim Bendebury5e124722011-10-17 08:36:14 +0000342 }
343 }
344 }
345
346 /* Wait for the next portion. */
Simon Glassd616ba52015-08-22 18:31:39 -0600347 value = tis_wait_reg(priv, &regs[locality].tpm_status,
Vadim Bendebury5e124722011-10-17 08:36:14 +0000348 TIS_STS_VALID, TIS_STS_VALID);
Simon Glassd616ba52015-08-22 18:31:39 -0600349 if (value == -ETIMEDOUT) {
Vadim Bendebury5e124722011-10-17 08:36:14 +0000350 printf("%s:%d failed to read response\n",
351 __FILE__, __LINE__);
Simon Glassd616ba52015-08-22 18:31:39 -0600352 return value;
Vadim Bendebury5e124722011-10-17 08:36:14 +0000353 }
354
355 if (offset == expected_count)
356 break; /* We got all we needed. */
357
358 } while ((value & has_data) == has_data);
359
360 /*
361 * Make sure we indeed read all there was. The TIS_STS_VALID bit is
362 * known to be set.
363 */
364 if (value & TIS_STS_DATA_AVAILABLE) {
365 printf("%s:%d wrong receive status %x\n",
366 __FILE__, __LINE__, value);
Simon Glassd616ba52015-08-22 18:31:39 -0600367 return -EBADMSG;
Vadim Bendebury5e124722011-10-17 08:36:14 +0000368 }
369
370 /* Tell the TPM that we are done. */
Simon Glassd616ba52015-08-22 18:31:39 -0600371 tpm_write_word(priv, TIS_STS_COMMAND_READY,
372 &regs[locality].tpm_status);
373
374 return offset;
Vadim Bendebury5e124722011-10-17 08:36:14 +0000375}
376
Simon Glassd616ba52015-08-22 18:31:39 -0600377static int tpm_tis_lpc_open(struct udevice *dev)
Vadim Bendebury5e124722011-10-17 08:36:14 +0000378{
Simon Glassd616ba52015-08-22 18:31:39 -0600379 struct tpm_tis_lpc_priv *priv = dev_get_priv(dev);
380 struct tpm_locality *regs = priv->regs;
Vadim Bendebury5e124722011-10-17 08:36:14 +0000381 u8 locality = 0; /* we use locality zero for everything. */
Simon Glassd616ba52015-08-22 18:31:39 -0600382 int ret;
Vadim Bendebury5e124722011-10-17 08:36:14 +0000383
Vadim Bendebury5e124722011-10-17 08:36:14 +0000384 /* now request access to locality. */
Simon Glassd616ba52015-08-22 18:31:39 -0600385 tpm_write_word(priv, TIS_ACCESS_REQUEST_USE, &regs[locality].access);
Vadim Bendebury5e124722011-10-17 08:36:14 +0000386
387 /* did we get a lock? */
Simon Glassd616ba52015-08-22 18:31:39 -0600388 ret = tis_wait_reg(priv, &regs[locality].access,
Vadim Bendebury5e124722011-10-17 08:36:14 +0000389 TIS_ACCESS_ACTIVE_LOCALITY,
Simon Glassd616ba52015-08-22 18:31:39 -0600390 TIS_ACCESS_ACTIVE_LOCALITY);
391 if (ret == -ETIMEDOUT) {
Vadim Bendebury5e124722011-10-17 08:36:14 +0000392 printf("%s:%d - failed to lock locality %d\n",
393 __FILE__, __LINE__, locality);
Simon Glassd616ba52015-08-22 18:31:39 -0600394 return ret;
Vadim Bendebury5e124722011-10-17 08:36:14 +0000395 }
396
Simon Glassd616ba52015-08-22 18:31:39 -0600397 tpm_write_word(priv, TIS_STS_COMMAND_READY,
398 &regs[locality].tpm_status);
Vadim Bendebury5e124722011-10-17 08:36:14 +0000399 return 0;
400}
401
Simon Glassd616ba52015-08-22 18:31:39 -0600402static int tpm_tis_lpc_close(struct udevice *dev)
Vadim Bendebury5e124722011-10-17 08:36:14 +0000403{
Simon Glassd616ba52015-08-22 18:31:39 -0600404 struct tpm_tis_lpc_priv *priv = dev_get_priv(dev);
405 struct tpm_locality *regs = priv->regs;
Vadim Bendebury5e124722011-10-17 08:36:14 +0000406 u8 locality = 0;
407
Simon Glassd616ba52015-08-22 18:31:39 -0600408 if (tpm_read_word(priv, &regs[locality].access) &
Vadim Bendebury5e124722011-10-17 08:36:14 +0000409 TIS_ACCESS_ACTIVE_LOCALITY) {
Simon Glassd616ba52015-08-22 18:31:39 -0600410 tpm_write_word(priv, TIS_ACCESS_ACTIVE_LOCALITY,
411 &regs[locality].access);
Vadim Bendebury5e124722011-10-17 08:36:14 +0000412
Simon Glassd616ba52015-08-22 18:31:39 -0600413 if (tis_wait_reg(priv, &regs[locality].access,
414 TIS_ACCESS_ACTIVE_LOCALITY, 0) == -ETIMEDOUT) {
Vadim Bendebury5e124722011-10-17 08:36:14 +0000415 printf("%s:%d - failed to release locality %d\n",
416 __FILE__, __LINE__, locality);
Simon Glassd616ba52015-08-22 18:31:39 -0600417 return -ETIMEDOUT;
Vadim Bendebury5e124722011-10-17 08:36:14 +0000418 }
419 }
420 return 0;
421}
422
Simon Glassd616ba52015-08-22 18:31:39 -0600423static int tpm_tis_get_desc(struct udevice *dev, char *buf, int size)
Vadim Bendebury5e124722011-10-17 08:36:14 +0000424{
Simon Glassd616ba52015-08-22 18:31:39 -0600425 if (size < 50)
426 return -ENOSPC;
Vadim Bendebury5e124722011-10-17 08:36:14 +0000427
Simon Glassd616ba52015-08-22 18:31:39 -0600428 return snprintf(buf, size, "1.2 TPM (vendor %s, chip %s)",
429 "Infineon", "SLB9635 TT 1.2");
Vadim Bendebury5e124722011-10-17 08:36:14 +0000430}
Simon Glassd616ba52015-08-22 18:31:39 -0600431
432
433static const struct tpm_ops tpm_tis_lpc_ops = {
434 .open = tpm_tis_lpc_open,
435 .close = tpm_tis_lpc_close,
436 .get_desc = tpm_tis_get_desc,
437 .send = tis_senddata,
438 .recv = tis_readresponse,
439};
440
441static const struct udevice_id tpm_tis_lpc_ids[] = {
442 { .compatible = "infineon,slb9635lpc" },
443 { }
444};
445
446U_BOOT_DRIVER(tpm_tis_lpc) = {
447 .name = "tpm_tis_lpc",
448 .id = UCLASS_TPM,
449 .of_match = tpm_tis_lpc_ids,
450 .ops = &tpm_tis_lpc_ops,
451 .probe = tpm_tis_lpc_probe,
452 .priv_auto_alloc_size = sizeof(struct tpm_tis_lpc_priv),
453};