blob: 76c0ab26ae3273a0e2bd23ba9991114f919e8897 [file] [log] [blame]
Zong Li43a21832021-09-01 15:01:39 +08001// SPDX-License-Identifier: GPL-2.0
2/*
3 * Copyright (C) 2021 SiFive
4 */
5
6#include <common.h>
7#include <cache.h>
8#include <dm.h>
9#include <asm/io.h>
10#include <dm/device.h>
11#include <linux/bitfield.h>
12
13#define SIFIVE_CCACHE_CONFIG 0x000
14#define SIFIVE_CCACHE_CONFIG_WAYS GENMASK(15, 8)
15
16#define SIFIVE_CCACHE_WAY_ENABLE 0x008
17
18struct sifive_ccache {
19 void __iomem *base;
20};
21
22static int sifive_ccache_enable(struct udevice *dev)
23{
24 struct sifive_ccache *priv = dev_get_priv(dev);
25 u32 config;
26 u32 ways;
27
28 /* Enable all ways of composable cache */
29 config = readl(priv->base + SIFIVE_CCACHE_CONFIG);
30 ways = FIELD_GET(SIFIVE_CCACHE_CONFIG_WAYS, config);
31
32 writel(ways - 1, priv->base + SIFIVE_CCACHE_WAY_ENABLE);
33
34 return 0;
35}
36
37static int sifive_ccache_get_info(struct udevice *dev, struct cache_info *info)
38{
39 struct sifive_ccache *priv = dev_get_priv(dev);
40
41 info->base = (phys_addr_t)priv->base;
42
43 return 0;
44}
45
46static const struct cache_ops sifive_ccache_ops = {
47 .enable = sifive_ccache_enable,
48 .get_info = sifive_ccache_get_info,
49};
50
51static int sifive_ccache_probe(struct udevice *dev)
52{
53 struct sifive_ccache *priv = dev_get_priv(dev);
54
55 priv->base = dev_read_addr_ptr(dev);
56 if (!priv->base)
57 return -EINVAL;
58
59 return 0;
60}
61
62static const struct udevice_id sifive_ccache_ids[] = {
63 { .compatible = "sifive,fu540-c000-ccache" },
64 { .compatible = "sifive,fu740-c000-ccache" },
65 {}
66};
67
68U_BOOT_DRIVER(sifive_ccache) = {
69 .name = "sifive_ccache",
70 .id = UCLASS_CACHE,
71 .of_match = sifive_ccache_ids,
72 .probe = sifive_ccache_probe,
73 .priv_auto = sizeof(struct sifive_ccache),
74 .ops = &sifive_ccache_ops,
75};