blob: 5d1a9d5572a51dbd9444319c0259c31205a6d394 [file] [log] [blame]
Tinghui Wangd977d6f2014-08-28 21:16:40 +10001/*
2 * (C) Copyright 2012 Xilinx
3 * (C) Copyright 2014 Digilent Inc.
4 *
5 * Configuration for Zynq Development Board - ZYBO
6 * See zynq-common.h for Zynq common configs
7 *
8 * SPDX-License-Identifier: GPL-2.0+
9 */
10
11#ifndef __CONFIG_ZYNQ_ZYBO_H
12#define __CONFIG_ZYNQ_ZYBO_H
13
14#define CONFIG_SYS_SDRAM_SIZE (512 * 1024 * 1024)
15
Tinghui Wangd977d6f2014-08-28 21:16:40 +100016#define CONFIG_SYS_NO_FLASH
17
18#define CONFIG_ZYNQ_SDHCI0
19#define CONFIG_ZYNQ_BOOT_FREEBSD
Tinghui Wangd977d6f2014-08-28 21:16:40 +100020
21/* Define ZYBO PS Clock Frequency to 50MHz */
22#define CONFIG_ZYNQ_PS_CLK_FREQ 50000000UL
23
24#include <configs/zynq-common.h>
25
26#endif /* __CONFIG_ZYNQ_ZYBO_H */