Eran Liberty | f046ccd | 2005-07-28 10:08:46 -0500 | [diff] [blame] | 1 | /* |
| 2 | * Copyright 2004 Freescale Semiconductor, Inc. |
| 3 | * |
| 4 | * See file CREDITS for list of people who contributed to this |
| 5 | * project. |
| 6 | * |
| 7 | * This program is free software; you can redistribute it and/or |
| 8 | * modify it under the terms of the GNU General Public License as |
| 9 | * published by the Free Software Foundation; either version 2 of |
| 10 | * the License, or (at your option) any later version. |
| 11 | * |
| 12 | * This program is distributed in the hope that it will be useful, |
| 13 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 14 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 15 | * GNU General Public License for more details. |
| 16 | * |
| 17 | * You should have received a copy of the GNU General Public License |
| 18 | * along with this program; if not, write to the Free Software |
| 19 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, |
| 20 | * MA 02111-1307 USA |
| 21 | * |
| 22 | * Change log: |
| 23 | * |
| 24 | * 20050101: Eran Liberty (liberty@freescale.com) |
Wolfgang Denk | 07a2505 | 2005-08-05 19:49:35 +0200 | [diff] [blame] | 25 | * Initial file creating (porting from 85XX & 8260) |
Eran Liberty | f046ccd | 2005-07-28 10:08:46 -0500 | [diff] [blame] | 26 | */ |
| 27 | |
| 28 | /* |
| 29 | * CPU specific code for the MPC83xx family. |
| 30 | * |
| 31 | * Derived from the MPC8260 and MPC85xx. |
| 32 | */ |
| 33 | |
| 34 | #include <common.h> |
| 35 | #include <watchdog.h> |
| 36 | #include <command.h> |
| 37 | #include <mpc83xx.h> |
Kumar Gala | 62ec641 | 2006-01-11 16:48:10 -0600 | [diff] [blame^] | 38 | #include <ft_build.h> |
Eran Liberty | f046ccd | 2005-07-28 10:08:46 -0500 | [diff] [blame] | 39 | #include <asm/processor.h> |
| 40 | |
| 41 | |
| 42 | int checkcpu(void) |
| 43 | { |
| 44 | DECLARE_GLOBAL_DATA_PTR; |
| 45 | ulong clock = gd->cpu_clk; |
| 46 | u32 pvr = get_pvr(); |
| 47 | char buf[32]; |
| 48 | |
| 49 | if ((pvr & 0xFFFF0000) != PVR_83xx) { |
| 50 | puts("Not MPC83xx Family!!!\n"); |
| 51 | return -1; |
| 52 | } |
| 53 | |
Marian Balakowicz | e6f2e90 | 2005-10-11 19:09:42 +0200 | [diff] [blame] | 54 | puts("CPU: MPC83xx, "); |
Eran Liberty | f046ccd | 2005-07-28 10:08:46 -0500 | [diff] [blame] | 55 | switch(pvr) { |
| 56 | case PVR_8349_REV10: |
| 57 | break; |
| 58 | case PVR_8349_REV11: |
| 59 | break; |
| 60 | default: |
| 61 | puts("Rev: Unknown\n"); |
| 62 | return -1; /* Not sure what this is */ |
| 63 | } |
Rafal Jaworowski | 6902df5 | 2005-10-17 02:39:53 +0200 | [diff] [blame] | 64 | printf("Rev: %d.%d at %s MHz\n", (pvr & 0xf0) >> 4, |
| 65 | (pvr & 0x0f), strmhz(buf, clock)); |
| 66 | |
Eran Liberty | f046ccd | 2005-07-28 10:08:46 -0500 | [diff] [blame] | 67 | return 0; |
| 68 | } |
| 69 | |
| 70 | |
| 71 | void upmconfig (uint upm, uint *table, uint size) |
| 72 | { |
| 73 | hang(); /* FIXME: upconfig() needed? */ |
| 74 | } |
| 75 | |
| 76 | |
| 77 | int |
| 78 | do_reset (cmd_tbl_t * cmdtp, int flag, int argc, char *argv[]) |
| 79 | { |
Wolfgang Denk | 07a2505 | 2005-08-05 19:49:35 +0200 | [diff] [blame] | 80 | ulong msr; |
| 81 | #ifndef MPC83xx_RESET |
| 82 | ulong addr; |
| 83 | #endif |
Eran Liberty | f046ccd | 2005-07-28 10:08:46 -0500 | [diff] [blame] | 84 | |
| 85 | volatile immap_t *immap = (immap_t *) CFG_IMMRBAR; |
| 86 | |
| 87 | #ifdef MPC83xx_RESET |
| 88 | /* Interrupts and MMU off */ |
| 89 | __asm__ __volatile__ ("mfmsr %0":"=r" (msr):); |
| 90 | |
| 91 | msr &= ~( MSR_EE | MSR_IR | MSR_DR); |
| 92 | __asm__ __volatile__ ("mtmsr %0"::"r" (msr)); |
| 93 | |
| 94 | /* enable Reset Control Reg */ |
| 95 | immap->reset.rpr = 0x52535445; |
| 96 | |
| 97 | /* confirm Reset Control Reg is enabled */ |
| 98 | while(!((immap->reset.rcer) & RCER_CRE)); |
| 99 | |
| 100 | printf("Resetting the board."); |
| 101 | printf("\n"); |
| 102 | |
| 103 | udelay(200); |
| 104 | |
| 105 | /* perform reset, only one bit */ |
Wolfgang Denk | 07a2505 | 2005-08-05 19:49:35 +0200 | [diff] [blame] | 106 | immap->reset.rcr = RCR_SWHR; |
Eran Liberty | f046ccd | 2005-07-28 10:08:46 -0500 | [diff] [blame] | 107 | |
Wolfgang Denk | 07a2505 | 2005-08-05 19:49:35 +0200 | [diff] [blame] | 108 | #else /* ! MPC83xx_RESET */ |
| 109 | |
| 110 | immap->reset.rmr = RMR_CSRE; /* Checkstop Reset enable */ |
| 111 | |
| 112 | /* Interrupts and MMU off */ |
| 113 | __asm__ __volatile__ ("mfmsr %0":"=r" (msr):); |
Eran Liberty | f046ccd | 2005-07-28 10:08:46 -0500 | [diff] [blame] | 114 | |
| 115 | msr &= ~(MSR_ME | MSR_EE | MSR_IR | MSR_DR); |
| 116 | __asm__ __volatile__ ("mtmsr %0"::"r" (msr)); |
| 117 | |
| 118 | /* |
| 119 | * Trying to execute the next instruction at a non-existing address |
| 120 | * should cause a machine check, resulting in reset |
| 121 | */ |
| 122 | addr = CFG_RESET_ADDRESS; |
| 123 | |
| 124 | printf("resetting the board."); |
| 125 | printf("\n"); |
| 126 | ((void (*)(void)) addr) (); |
Wolfgang Denk | 07a2505 | 2005-08-05 19:49:35 +0200 | [diff] [blame] | 127 | #endif /* MPC83xx_RESET */ |
| 128 | |
Eran Liberty | f046ccd | 2005-07-28 10:08:46 -0500 | [diff] [blame] | 129 | return 1; |
| 130 | } |
| 131 | |
| 132 | |
| 133 | /* |
| 134 | * Get timebase clock frequency (like cpu_clk in Hz) |
| 135 | */ |
| 136 | |
| 137 | unsigned long get_tbclk(void) |
| 138 | { |
| 139 | DECLARE_GLOBAL_DATA_PTR; |
| 140 | |
| 141 | ulong tbclk; |
| 142 | |
| 143 | tbclk = (gd->bus_clk + 3L) / 4L; |
| 144 | |
| 145 | return tbclk; |
| 146 | } |
| 147 | |
| 148 | |
| 149 | #if defined(CONFIG_WATCHDOG) |
| 150 | void watchdog_reset (void) |
| 151 | { |
| 152 | hang(); /* FIXME: implement watchdog_reset()? */ |
| 153 | } |
| 154 | #endif /* CONFIG_WATCHDOG */ |
Kumar Gala | 62ec641 | 2006-01-11 16:48:10 -0600 | [diff] [blame^] | 155 | |
| 156 | #if defined(CONFIG_OF_FLAT_TREE) |
| 157 | void |
| 158 | ft_cpu_setup(void *blob, bd_t *bd) |
| 159 | { |
| 160 | u32 *p; |
| 161 | int len; |
| 162 | ulong clock; |
| 163 | |
| 164 | clock = bd->bi_busfreq; |
| 165 | p = ft_get_prop(blob, "/cpus/" OF_CPU "/bus-frequency", &len); |
| 166 | if (p != NULL) |
| 167 | *p = cpu_to_be32(clock); |
| 168 | |
| 169 | p = ft_get_prop(blob, "/" OF_SOC "/bus-frequency", &len); |
| 170 | if (p != NULL) |
| 171 | *p = cpu_to_be32(clock); |
| 172 | |
| 173 | p = ft_get_prop(blob, "/" OF_SOC "/serial@4500/clock-frequency", &len); |
| 174 | if (p != NULL) |
| 175 | *p = cpu_to_be32(clock); |
| 176 | |
| 177 | p = ft_get_prop(blob, "/" OF_SOC "/serial@4600/clock-frequency", &len); |
| 178 | if (p != NULL) |
| 179 | *p = cpu_to_be32(clock); |
| 180 | |
| 181 | #ifdef CONFIG_MPC83XX_TSEC1 |
| 182 | p = ft_get_prop(blob, "/" OF_SOC "/ethernet@24000/address", &len); |
| 183 | memcpy(p, bd->bi_enetaddr, 6); |
| 184 | #endif |
| 185 | |
| 186 | #ifdef CONFIG_MPC83XX_TSEC2 |
| 187 | p = ft_get_prop(blob, "/" OF_SOC "/ethernet@25000/address", &len); |
| 188 | memcpy(p, bd->bi_enet1addr, 6); |
| 189 | #endif |
| 190 | } |
| 191 | #endif |