Blame - arch/arm/mach-zynqmp/Kconfig - platform/external/u-boot

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Siva Durga Prasad Paladugu	0b54a9d	2015-06-10 15:50:57 +0530	[diff] [blame]	1	if ARCH_ZYNQMP
				2
Tien Fong Chee	0c3a9ed	2019-01-23 14:20:03 +0800	[diff] [blame]	3	config SPL_FS_FAT
Simon Glass	ae56db5	2016-09-12 23:18:38 -0600	[diff] [blame]	4	default y
				5
Simon Glass	77d2f7f	2016-09-12 23:18:41 -0600	[diff] [blame]	6	config SPL_LIBCOMMON_SUPPORT
				7	default y
				8
Simon Glass	1646eba	2016-09-12 23:18:42 -0600	[diff] [blame]	9	config SPL_LIBDISK_SUPPORT
				10	default y
				11
Simon Glass	cc4288e	2016-09-12 23:18:43 -0600	[diff] [blame]	12	config SPL_LIBGENERIC_SUPPORT
				13	default y
				14
Simon Glass	1fdf7c6	2016-09-12 23:18:44 -0600	[diff] [blame]	15	config SPL_MMC_SUPPORT
Alexandru Gagniuc	0dcf18c	2017-04-04 10:02:58 -0700	[diff] [blame]	16	default y if MMC_SDHCI_ZYNQ
Simon Glass	1fdf7c6	2016-09-12 23:18:44 -0600	[diff] [blame]	17
Simon Glass	e00f76c	2016-09-12 23:18:56 -0600	[diff] [blame]	18	config SPL_SERIAL_SUPPORT
				19	default y
				20
Simon Glass	e404ade	2016-09-12 23:18:57 -0600	[diff] [blame]	21	config SPL_SPI_FLASH_SUPPORT
				22	default y if ZYNQ_QSPI
				23
Simon Glass	f35ed9e	2016-09-12 23:18:58 -0600	[diff] [blame]	24	config SPL_SPI_SUPPORT
				25	default y if ZYNQ_QSPI
				26
Michal Simek	84c7204	2015-01-15 10:01:51 +0100	[diff] [blame]	27	config SYS_BOARD
				28	default "zynqmp"
				29
				30	config SYS_VENDOR
Mike Looijmans	ef4cab9	2017-01-03 09:47:52 +0100	[diff] [blame]	31	string "Vendor name"
Michal Simek	84c7204	2015-01-15 10:01:51 +0100	[diff] [blame]	32	default "xilinx"
				33
				34	config SYS_SOC
				35	default "zynqmp"
				36
				37	config SYS_CONFIG_NAME
Michal Simek	a1108da	2016-03-18 18:21:36 +0100	[diff] [blame]	38	string "Board configuration name"
				39	default "xilinx_zynqmp"
				40	help
				41	This option contains information about board configuration name.
				42	Based on this option include/configs/<CONFIG_SYS_CONFIG_NAME>.h header
				43	will be used for board configuration.
Michal Simek	84c7204	2015-01-15 10:01:51 +0100	[diff] [blame]	44
Siva Durga Prasad Paladugu	e042d36	2017-07-13 19:01:11 +0530	[diff] [blame]	45	config SYS_MEM_RSVD_FOR_MMU
				46	bool "Reserve memory for MMU Table"
				47	help
				48	If defined this option is used to setup different space for
				49	MMU table than the one which will be allocated during
				50	relocation.
				51
Mike Looijmans	3b64608	2016-09-20 11:37:24 +0200	[diff] [blame]	52	config BOOT_INIT_FILE
				53	string "boot.bin init register filename"
Michal Simek	9cf9da7	2016-12-16 13:00:26 +0100	[diff] [blame]	54	depends on SPL
Mike Looijmans	3b64608	2016-09-20 11:37:24 +0200	[diff] [blame]	55	default ""
				56	help
				57	Add register writes to boot.bin format (max 256 pairs).
				58	Expect a table of register-value pairs, e.g. "0x12345678 0x4321"
				59
Michal Simek	c85a6b7	2016-10-21 12:58:17 +0200	[diff] [blame]	60	config PMUFW_INIT_FILE
				61	string "PMU firmware"
				62	depends on SPL
				63	default ""
				64	help
				65	Include external PMUFW (Platform Management Unit FirmWare) to
				66	a Xilinx bootable image (boot.bin).
				67
Luca Ceresoli	c28a9cf	2019-05-21 18:06:43 +0200	[diff] [blame]	68	config ZYNQMP_SPL_PM_CFG_OBJ_FILE
				69	string "PMU firmware configuration object to load at runtime by SPL"
				70	depends on SPL
				71	help
				72	Path to a binary PMU firmware configuration object to be linked
				73	into U-Boot SPL and loaded at runtime into the PMU firmware.
				74
				75	The ZynqMP Power Management Unit (PMU) needs a configuration
				76	object for most SoC peripherals to work. To have it loaded by
				77	U-Boot SPL set here the file name (absolute path or relative to
				78	the top source tree) of your configuration, which must be a
				79	binary blob. It will be linked in the SPL binary and loaded
				80	into the PMU firmware by U-Boot SPL during board
				81	initialization.
				82
				83	Leave this option empty if your PMU firmware has a hard-coded
				84	configuration object or you are loading it by any other means.
				85
Siva Durga Prasad Paladugu	16fa00a	2015-08-04 13:03:26 +0530	[diff] [blame]	86	config ZYNQMP_USB
				87	bool "Configure ZynqMP USB"
				88
Siva Durga Prasad Paladugu	3b644a3	2018-01-12 15:35:46 +0530	[diff] [blame]	89	config ZYNQMP_NO_DDR
				90	bool "Disable DDR MMU mapping"
				91	help
				92	This option configures MMU with no DDR to avoid speculative
				93	access to DDR memory where DDR is not present.
				94
Simon Glass	04e3890	2016-07-05 17:10:13 -0600	[diff] [blame]	95	config SYS_MALLOC_F_LEN
				96	default 0x600
				97
Siva Durga Prasad Paladugu	189bec4	2017-07-13 19:01:10 +0530	[diff] [blame]	98	config DEFINE_TCM_OCM_MMAP
				99	bool "Define TCM and OCM memory in MMU Table"
Siva Durga Prasad Paladugu	8940148	2017-08-01 16:24:50 +0530	[diff] [blame]	100	default y if MP
Siva Durga Prasad Paladugu	189bec4	2017-07-13 19:01:10 +0530	[diff] [blame]	101	help
				102	This option if enabled defines the TCM and OCM memory and its
				103	memory attributes in MMU table entry.
				104
Michal Simek	fd1b635	2017-07-12 13:21:27 +0200	[diff] [blame]	105	config ZYNQMP_PSU_INIT_ENABLED
				106	bool "Include psu_init"
				107	help
				108	Include psu_init to full u-boot. SPL include psu_init by default.
				109
Michal Simek	7f491d7	2016-08-30 16:17:27 +0200	[diff] [blame]	110	config SPL_ZYNQMP_ALT_BOOTMODE_ENABLED
				111	bool "Overwrite SPL bootmode"
				112	depends on SPL
				113	help
				114	Overwrite bootmode selected via boot mode pins to tell SPL what should
				115	be the next boot device.
				116
Vipul Kumar	5dc5a53	2018-02-28 15:53:28 +0530	[diff] [blame]	117	config ZYNQ_SDHCI_MAX_FREQ
				118	default 200000000
				119
Michal Simek	35e2b92	2019-02-13 13:46:41 +0100	[diff] [blame]	120	config SPL_ZYNQMP_TWO_SDHCI
				121	bool "Enable booting from both SDHCIs"
				122	depends on SPL
				123	help
				124	This option reflects that board has two SDHCI controllers which
				125	platform can use as boot device. This option ensures that SPL will
				126	setup BOOT_DEVICE_MMC2 for SDHCI1 controller and BOOT_DEVICE_MMC1 for
				127	SDHCI0 controller. Platforms which have only one SDHCI controller
				128	shouldn't enable this option because it for software SDHCI0 or SDHCI1
				129	are both covered by BOOT_DEVICE_MMC1.
				130
Michal Simek	7f491d7	2016-08-30 16:17:27 +0200	[diff] [blame]	131	config SPL_ZYNQMP_ALT_BOOTMODE
				132	hex
				133	default 0x0 if JTAG_MODE
				134	default 0x1 if QSPI_MODE_24BIT
				135	default 0x2 if QSPI_MODE_32BIT
				136	default 0x3 if SD_MODE
				137	default 0x4 if NAND_MODE
				138	default 0x5 if SD_MODE1
				139	default 0x6 if EMMC_MODE
				140	default 0x7 if USB_MODE
Michal Simek	2661081	2016-10-26 09:24:32 +0200	[diff] [blame]	141	default 0xa if SW_USBHOST_MODE
				142	default 0xb if SW_SATA_MODE
Michal Simek	011f0c4	2017-02-15 09:41:53 +0100	[diff] [blame]	143	default 0xe if SD1_LSHFT_MODE
Michal Simek	7f491d7	2016-08-30 16:17:27 +0200	[diff] [blame]	144
				145	choice
				146	prompt "Boot mode"
Michal Simek	e367240	2016-08-30 16:17:27 +0200	[diff] [blame]	147	depends on SPL_ZYNQMP_ALT_BOOTMODE_ENABLED
Ulf Magnusson	e7563c2	2018-01-30 14:02:01 +0100	[diff] [blame]	148	default JTAG_MODE
Michal Simek	7f491d7	2016-08-30 16:17:27 +0200	[diff] [blame]	149
				150	config JTAG_MODE
				151	bool "JTAG_MODE"
				152
				153	config QSPI_MODE_24BIT
				154	bool "QSPI_MODE_24BIT"
				155
				156	config QSPI_MODE_32BIT
				157	bool "QSPI_MODE_32BIT"
				158
				159	config SD_MODE
				160	bool "SD_MODE"
				161
				162	config SD_MODE1
				163	bool "SD_MODE1"
				164
				165	config NAND_MODE
				166	bool "NAND_MODE"
				167
				168	config EMMC_MODE
				169	bool "EMMC_MODE"
				170
				171	config USB_MODE
				172	bool "USB"
				173
Michal Simek	2661081	2016-10-26 09:24:32 +0200	[diff] [blame]	174	config SW_USBHOST_MODE
				175	bool "SW USBHOST_MODE"
				176
				177	config SW_SATA_MODE
				178	bool "SW SATA_MODE"
				179
Michal Simek	011f0c4	2017-02-15 09:41:53 +0100	[diff] [blame]	180	config SD1_LSHFT_MODE
				181	bool "SD1_LSHFT_MODE"
				182
Michal Simek	7f491d7	2016-08-30 16:17:27 +0200	[diff] [blame]	183	endchoice
Simon Glass	04e3890	2016-07-05 17:10:13 -0600	[diff] [blame]	184
Michal Simek	84c7204	2015-01-15 10:01:51 +0100	[diff] [blame]	185	endif