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Marek Vasutc115a0d2014-12-30 18:16:08 +01001/*
2 * Copyright (C) 2014 Marek Vasut <marex@denx.de>
3 *
4 * SPDX-License-Identifier: GPL-2.0+
5 */
6#ifndef __CONFIG_SOCFPGA_ARRIA5_H__
7#define __CONFIG_SOCFPGA_ARRIA5_H__
8
9#include <asm/arch/socfpga_base_addrs.h>
Marek Vasutc115a0d2014-12-30 18:16:08 +010010
11/* U-Boot Commands */
12#define CONFIG_SYS_NO_FLASH
Marek Vasutc115a0d2014-12-30 18:16:08 +010013#define CONFIG_DOS_PARTITION
14#define CONFIG_FAT_WRITE
15#define CONFIG_HW_WATCHDOG
16
17#define CONFIG_CMD_ASKENV
18#define CONFIG_CMD_BOOTZ
19#define CONFIG_CMD_CACHE
20#define CONFIG_CMD_DFU
21#define CONFIG_CMD_DHCP
22#define CONFIG_CMD_EXT4
23#define CONFIG_CMD_EXT4_WRITE
24#define CONFIG_CMD_FAT
Marek Vasutc115a0d2014-12-30 18:16:08 +010025#define CONFIG_CMD_FS_GENERIC
26#define CONFIG_CMD_GREPENV
27#define CONFIG_CMD_MII
28#define CONFIG_CMD_MMC
Marek Vasutc115a0d2014-12-30 18:16:08 +010029#define CONFIG_CMD_PING
Marek Vasutc115a0d2014-12-30 18:16:08 +010030#define CONFIG_CMD_USB
31#define CONFIG_CMD_USB_MASS_STORAGE
32
Marek Vasutc115a0d2014-12-30 18:16:08 +010033
34/* Memory configurations */
35#define PHYS_SDRAM_1_SIZE 0x40000000 /* 1GiB on SoCDK */
36
37/* Booting Linux */
38#define CONFIG_BOOTDELAY 3
39#define CONFIG_BOOTFILE "zImage"
40#define CONFIG_BOOTARGS "console=ttyS0," __stringify(CONFIG_BAUDRATE)
41#ifdef CONFIG_SOCFPGA_VIRTUAL_TARGET
42#define CONFIG_BOOTCOMMAND "run ramboot"
43#else
44#define CONFIG_BOOTCOMMAND "run mmcload; run mmcboot"
45#endif
Marek Vasut4c6d8b92015-07-22 06:18:19 +020046#define CONFIG_LOADADDR 0x01000000
Marek Vasutc115a0d2014-12-30 18:16:08 +010047#define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
48
49/* Ethernet on SoC (EMAC) */
50#if defined(CONFIG_CMD_NET)
Marek Vasutc115a0d2014-12-30 18:16:08 +010051
52/* PHY */
53#define CONFIG_PHY_MICREL
54#define CONFIG_PHY_MICREL_KSZ9021
55#define CONFIG_KSZ9021_CLK_SKEW_ENV "micrel-ksz9021-clk-skew"
56#define CONFIG_KSZ9021_CLK_SKEW_VAL 0xf0f0
57#define CONFIG_KSZ9021_DATA_SKEW_ENV "micrel-ksz9021-data-skew"
58#define CONFIG_KSZ9021_DATA_SKEW_VAL 0x0
59
60#endif
61
62/* USB */
63#ifdef CONFIG_CMD_USB
64#define CONFIG_USB_DWC2_REG_ADDR SOCFPGA_USB1_ADDRESS
65#endif
66#define CONFIG_G_DNL_MANUFACTURER "Altera"
67
68/* Extra Environment */
69#define CONFIG_HOSTNAME socfpga_arria5
70
71#define CONFIG_EXTRA_ENV_SETTINGS \
72 "verify=n\0" \
73 "loadaddr= " __stringify(CONFIG_SYS_LOAD_ADDR) "\0" \
74 "ramboot=setenv bootargs " CONFIG_BOOTARGS ";" \
75 "bootm ${loadaddr} - ${fdt_addr}\0" \
76 "bootimage=zImage\0" \
77 "fdt_addr=100\0" \
78 "fdtimage=socfpga.dtb\0" \
79 "fsloadcmd=ext2load\0" \
80 "bootm ${loadaddr} - ${fdt_addr}\0" \
81 "mmcroot=/dev/mmcblk0p2\0" \
82 "mmcboot=setenv bootargs " CONFIG_BOOTARGS \
83 " root=${mmcroot} rw rootwait;" \
84 "bootz ${loadaddr} - ${fdt_addr}\0" \
85 "mmcload=mmc rescan;" \
86 "load mmc 0:1 ${loadaddr} ${bootimage};" \
87 "load mmc 0:1 ${fdt_addr} ${fdtimage}\0" \
88 "qspiroot=/dev/mtdblock0\0" \
89 "qspirootfstype=jffs2\0" \
90 "qspiboot=setenv bootargs " CONFIG_BOOTARGS \
91 " root=${qspiroot} rw rootfstype=${qspirootfstype};"\
92 "bootm ${loadaddr} - ${fdt_addr}\0"
93
94/* The rest of the configuration is shared */
95#include <configs/socfpga_common.h>
96
97#endif /* __CONFIG_SOCFPGA_ARRIA5_H__ */