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Tom Rini83d290c2018-05-06 17:58:06 -04001/* SPDX-License-Identifier: GPL-2.0+ */
Wu, Josh9e336902013-04-16 23:42:44 +00002/*
3 * (C) Copyright 2013 Atmel Corporation.
4 * Josh Wu <josh.wu@atmel.com>
5 *
6 * Configuation settings for the AT91SAM9N12-EK boards.
Wu, Josh9e336902013-04-16 23:42:44 +00007 */
8
9#ifndef __AT91SAM9N12_CONFIG_H_
10#define __AT91SAM9N12_CONFIG_H_
11
Wu, Josh9e336902013-04-16 23:42:44 +000012/* ARM asynchronous clock */
13#define CONFIG_SYS_AT91_SLOW_CLOCK 32768 /* slow clock xtal */
14#define CONFIG_SYS_AT91_MAIN_CLOCK 16000000 /* main clock xtal */
Wu, Josh9e336902013-04-16 23:42:44 +000015
16/* Misc CPU related */
17#define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */
18#define CONFIG_SETUP_MEMORY_TAGS
19#define CONFIG_INITRD_TAG
20#define CONFIG_SKIP_LOWLEVEL_INIT
Wu, Josh9e336902013-04-16 23:42:44 +000021
Wu, Josh9e336902013-04-16 23:42:44 +000022/* LCD */
Wu, Josh9e336902013-04-16 23:42:44 +000023#define LCD_BPP LCD_COLOR16
24#define LCD_OUTPUT_BPP 24
25#define CONFIG_LCD_LOGO
26#define CONFIG_LCD_INFO
27#define CONFIG_LCD_INFO_BELOW_LOGO
Wu, Josh9e336902013-04-16 23:42:44 +000028#define CONFIG_ATMEL_HLCD
29#define CONFIG_ATMEL_LCD_RGB565
Wu, Josh9e336902013-04-16 23:42:44 +000030
Wu, Josh9e336902013-04-16 23:42:44 +000031/*
32 * BOOTP options
33 */
34#define CONFIG_BOOTP_BOOTFILESIZE
Wu, Josh9e336902013-04-16 23:42:44 +000035
Wu, Josh9e336902013-04-16 23:42:44 +000036#define CONFIG_NR_DRAM_BANKS 1
37#define CONFIG_SYS_SDRAM_BASE 0x20000000
38#define CONFIG_SYS_SDRAM_SIZE 0x08000000
39
40/*
41 * Initial stack pointer: 4k - GENERATED_GBL_DATA_SIZE in internal SRAM,
42 * leaving the correct space for initial global data structure above
43 * that address while providing maximum stack area below.
44 */
45# define CONFIG_SYS_INIT_SP_ADDR \
Wenyou Yange61ed482017-09-14 11:07:42 +080046 (0x00300000 + 16 * 1024 - GENERATED_GBL_DATA_SIZE)
Wu, Josh9e336902013-04-16 23:42:44 +000047
48/* DataFlash */
49#ifdef CONFIG_CMD_SF
Wu, Josh9e336902013-04-16 23:42:44 +000050#define CONFIG_SF_DEFAULT_SPEED 30000000
Wu, Josh9e336902013-04-16 23:42:44 +000051#endif
52
53/* NAND flash */
54#ifdef CONFIG_CMD_NAND
Wu, Josh9e336902013-04-16 23:42:44 +000055#define CONFIG_SYS_MAX_NAND_DEVICE 1
56#define CONFIG_SYS_NAND_BASE 0x40000000
57#define CONFIG_SYS_NAND_MASK_ALE (1 << 21)
58#define CONFIG_SYS_NAND_MASK_CLE (1 << 22)
Andreas Bießmannac45bb12013-11-29 12:13:45 +010059#define CONFIG_SYS_NAND_ENABLE_PIN GPIO_PIN_PD(4)
60#define CONFIG_SYS_NAND_READY_PIN GPIO_PIN_PD(5)
Tom Rini8f1a80e2017-07-28 21:31:42 -040061#endif
Wu, Josh9e336902013-04-16 23:42:44 +000062
63/* PMECC & PMERRLOC */
64#define CONFIG_ATMEL_NAND_HWECC
65#define CONFIG_ATMEL_NAND_HW_PMECC
66#define CONFIG_PMECC_CAP 2
67#define CONFIG_PMECC_SECTOR_SIZE 512
Bo Shence76f0a2013-06-26 10:48:53 +080068
Wu, Josh9e336902013-04-16 23:42:44 +000069#define CONFIG_EXTRA_ENV_SETTINGS \
70 "console=console=ttyS0,115200\0" \
Tom Rini43ede0b2017-10-22 17:55:07 -040071 "mtdparts="CONFIG_MTDPARTS_DEFAULT"\0" \
Wu, Josh9e336902013-04-16 23:42:44 +000072 "bootargs_nand=rootfstype=ubifs ubi.mtd=7 root=ubi0:rootfs rw\0"\
73 "bootargs_mmc=root=/dev/mmcblk0p2 rw rootfstype=ext4 rootwait\0"
74
Bo Shen16276222013-04-24 10:46:18 +080075/* Ethernet */
76#define CONFIG_KS8851_MLL
77#define CONFIG_KS8851_MLL_BASEADDR 0x30000000 /* use NCS2 */
78
Wu, Josh9e336902013-04-16 23:42:44 +000079#define CONFIG_SYS_LOAD_ADDR 0x22000000 /* load address */
80
81#define CONFIG_SYS_MEMTEST_START CONFIG_SYS_SDRAM_BASE
82#define CONFIG_SYS_MEMTEST_END 0x26e00000
83
Bo Shend9bef0a2013-10-21 16:13:59 +080084/* USB host */
85#ifdef CONFIG_CMD_USB
86#define CONFIG_USB_ATMEL
Bo Shendcd2f1a2013-10-21 16:14:00 +080087#define CONFIG_USB_ATMEL_CLK_SEL_PLLB
Bo Shend9bef0a2013-10-21 16:13:59 +080088#define CONFIG_USB_OHCI_NEW
89#define CONFIG_SYS_USB_OHCI_CPU_INIT
90#define CONFIG_SYS_USB_OHCI_REGS_BASE ATMEL_BASE_OHCI
91#define CONFIG_SYS_USB_OHCI_SLOT_NAME "at91sam9n12"
92#define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 1
Bo Shend9bef0a2013-10-21 16:13:59 +080093#endif
94
Wenyou Yang55415432017-09-14 11:07:44 +080095#ifdef CONFIG_SPI_BOOT
Wu, Josh9e336902013-04-16 23:42:44 +000096
97/* bootstrap + u-boot + env + linux in dataflash on CS0 */
Wu, Josh9e336902013-04-16 23:42:44 +000098#define CONFIG_ENV_OFFSET 0x5000
99#define CONFIG_ENV_SIZE 0x3000
100#define CONFIG_ENV_SECT_SIZE 0x1000
101#define CONFIG_BOOTCOMMAND \
102 "setenv bootargs ${console} ${mtdparts} ${bootargs_nand};" \
103 "sf probe 0; sf read 0x22000000 0x100000 0x300000; " \
104 "bootm 0x22000000"
105
Wenyou Yang55415432017-09-14 11:07:44 +0800106#elif defined(CONFIG_NAND_BOOT)
Wu, Josh9e336902013-04-16 23:42:44 +0000107
108/* bootstrap + u-boot + env + linux in nandflash */
Nicolas Ferre7b8b19f2018-05-09 10:30:25 +0300109#define CONFIG_ENV_OFFSET 0x140000
Wu, Josh9e336902013-04-16 23:42:44 +0000110#define CONFIG_ENV_OFFSET_REDUND 0x100000
111#define CONFIG_ENV_SIZE 0x20000 /* 1 sector = 128 kB */
112#define CONFIG_BOOTCOMMAND \
113 "setenv bootargs ${console} ${mtdparts} ${bootargs_nand};" \
114 "nand read 0x21000000 0x180000 0x080000;" \
115 "nand read 0x22000000 0x200000 0x400000;" \
116 "bootm 0x22000000 - 0x21000000"
117
Wenyou Yang55415432017-09-14 11:07:44 +0800118#else /* CONFIG_SD_BOOT */
Wu, Josh9e336902013-04-16 23:42:44 +0000119
120/* bootstrap + u-boot + env + linux in mmc */
Wu, Josh23ac62d2015-03-24 17:07:22 +0800121
122#ifdef CONFIG_ENV_IS_IN_MMC
123/* Use raw reserved sectors to save environment */
Wu, Josh9e336902013-04-16 23:42:44 +0000124#define CONFIG_ENV_OFFSET 0x2000
125#define CONFIG_ENV_SIZE 0x1000
126#define CONFIG_SYS_MMC_ENV_DEV 0
Wu, Josh23ac62d2015-03-24 17:07:22 +0800127#else
128/* Use file in FAT file to save environment */
Wu, Josh23ac62d2015-03-24 17:07:22 +0800129#define CONFIG_ENV_SIZE 0x4000
130#endif
131
Wu, Josh9e336902013-04-16 23:42:44 +0000132#define CONFIG_BOOTCOMMAND \
133 "setenv bootargs ${console} ${mtdparts} ${bootargs_mmc};" \
134 "fatload mmc 0:1 0x21000000 dtb;" \
135 "fatload mmc 0:1 0x22000000 uImage;" \
136 "bootm 0x22000000 - 0x21000000"
137
138#endif
139
Wu, Josh9e336902013-04-16 23:42:44 +0000140/*
141 * Size of malloc() pool
142 */
143#define CONFIG_SYS_MALLOC_LEN (4 * 1024 * 1024)
Bo Shenff255e82015-03-27 14:23:36 +0800144
145/* SPL */
Bo Shenff255e82015-03-27 14:23:36 +0800146#define CONFIG_SPL_TEXT_BASE 0x300000
147#define CONFIG_SPL_MAX_SIZE 0x6000
148#define CONFIG_SPL_STACK 0x308000
149
150#define CONFIG_SPL_BSS_START_ADDR 0x20000000
151#define CONFIG_SPL_BSS_MAX_SIZE 0x80000
152#define CONFIG_SYS_SPL_MALLOC_START 0x20080000
153#define CONFIG_SYS_SPL_MALLOC_SIZE 0x80000
154
Bo Shenff255e82015-03-27 14:23:36 +0800155#define CONFIG_SYS_MONITOR_LEN (512 << 10)
156
157#define CONFIG_SYS_MASTER_CLOCK 132096000
158#define CONFIG_SYS_AT91_PLLA 0x20953f03
159#define CONFIG_SYS_MCKR 0x1301
160#define CONFIG_SYS_MCKR_CSS 0x1302
161
Wenyou Yang55415432017-09-14 11:07:44 +0800162#ifdef CONFIG_SD_BOOT
Bo Shenff255e82015-03-27 14:23:36 +0800163#define CONFIG_SYS_MMCSD_FS_BOOT_PARTITION 1
164#define CONFIG_SPL_FS_LOAD_PAYLOAD_NAME "u-boot.img"
Bo Shenff255e82015-03-27 14:23:36 +0800165
166#elif CONFIG_SYS_USE_NANDFLASH
Wenyou Yang55415432017-09-14 11:07:44 +0800167#elif CONFIG_SPI_BOOT
Wenyou Yang55415432017-09-14 11:07:44 +0800168#define CONFIG_SYS_SPI_U_BOOT_OFFS 0x8400
169
170#elif CONFIG_NAND_BOOT
Bo Shenff255e82015-03-27 14:23:36 +0800171#define CONFIG_SPL_NAND_DRIVERS
172#define CONFIG_SPL_NAND_BASE
Wenyou Yang55415432017-09-14 11:07:44 +0800173#endif
Bo Shenff255e82015-03-27 14:23:36 +0800174#define CONFIG_SYS_NAND_U_BOOT_OFFS 0x40000
175#define CONFIG_SYS_NAND_5_ADDR_CYCLE
176#define CONFIG_SYS_NAND_PAGE_SIZE 0x800
177#define CONFIG_SYS_NAND_PAGE_COUNT 64
178#define CONFIG_SYS_NAND_OOBSIZE 64
179#define CONFIG_SYS_NAND_BLOCK_SIZE 0x20000
180#define CONFIG_SYS_NAND_BAD_BLOCK_POS 0x0
181#define CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER
182
Wu, Josh9e336902013-04-16 23:42:44 +0000183#endif