Tom Rini | 53633a8 | 2024-02-29 12:33:36 -0500 | [diff] [blame] | 1 | // SPDX-License-Identifier: GPL-2.0-only |
| 2 | /* |
| 3 | * Copyright (C) 2011 Texas Instruments Incorporated - https://www.ti.com/ |
| 4 | */ |
| 5 | /dts-v1/; |
| 6 | |
| 7 | #include "am3517.dtsi" |
| 8 | #include "am3517-som.dtsi" |
| 9 | #include "am3517-evm-ui.dtsi" |
| 10 | #include <dt-bindings/input/input.h> |
| 11 | |
| 12 | / { |
| 13 | model = "TI AM3517 EVM (AM3517/05 TMDSEVM3517)"; |
| 14 | compatible = "ti,am3517-evm", "ti,am3517", "ti,omap3"; |
| 15 | |
| 16 | aliases { |
| 17 | display0 = &lcd0; |
| 18 | }; |
| 19 | |
| 20 | chosen { |
| 21 | stdout-path = &uart3; |
| 22 | }; |
| 23 | |
| 24 | memory@80000000 { |
| 25 | device_type = "memory"; |
| 26 | reg = <0x80000000 0x10000000>; /* 256 MB */ |
| 27 | }; |
| 28 | |
| 29 | vmmc_fixed: vmmc { |
| 30 | compatible = "regulator-fixed"; |
| 31 | regulator-name = "vmmc_fixed"; |
| 32 | regulator-min-microvolt = <3300000>; |
| 33 | regulator-max-microvolt = <3300000>; |
| 34 | }; |
| 35 | |
| 36 | gpio-keys { |
| 37 | compatible = "gpio-keys-polled"; |
| 38 | poll-interval = <100>; |
| 39 | |
| 40 | button-user { |
| 41 | label = "User Push Button"; |
| 42 | linux,code = <BTN_0>; |
| 43 | gpios = <&tca6416 5 GPIO_ACTIVE_LOW>; |
| 44 | }; |
| 45 | |
| 46 | switch-1 { |
| 47 | label = "User Switch 1"; |
| 48 | linux,code = <BTN_1>; |
| 49 | gpios = <&tca6416 8 GPIO_ACTIVE_LOW>; |
| 50 | }; |
| 51 | |
| 52 | switch-2 { |
| 53 | label = "User Switch 2"; |
| 54 | linux,code = <BTN_2>; |
| 55 | gpios = <&tca6416 9 GPIO_ACTIVE_LOW>; |
| 56 | }; |
| 57 | |
| 58 | switch-3 { |
| 59 | label = "User Switch 3"; |
| 60 | linux,code = <BTN_3>; |
| 61 | gpios = <&tca6416 10 GPIO_ACTIVE_LOW>; |
| 62 | }; |
| 63 | |
| 64 | switch-4 { |
| 65 | label = "User Switch 4"; |
| 66 | linux,code = <BTN_4>; |
| 67 | gpios = <&tca6416 11 GPIO_ACTIVE_LOW>; |
| 68 | }; |
| 69 | |
| 70 | switch-5 { |
| 71 | label = "User Switch 5"; |
| 72 | linux,code = <BTN_5>; |
| 73 | gpios = <&tca6416 12 GPIO_ACTIVE_LOW>; |
| 74 | }; |
| 75 | |
| 76 | switch-6 { |
| 77 | label = "User Switch 6"; |
| 78 | linux,code = <BTN_6>; |
| 79 | gpios = <&tca6416 13 GPIO_ACTIVE_LOW>; |
| 80 | }; |
| 81 | |
| 82 | switch-7 { |
| 83 | label = "User Switch 7"; |
| 84 | linux,code = <BTN_7>; |
| 85 | gpios = <&tca6416 14 GPIO_ACTIVE_LOW>; |
| 86 | }; |
| 87 | |
| 88 | switch-8 { |
| 89 | label = "User Switch 8"; |
| 90 | linux,code = <BTN_8>; |
| 91 | gpios = <&tca6416 15 GPIO_ACTIVE_LOW>; |
| 92 | }; |
| 93 | }; |
| 94 | |
| 95 | gpio-leds { |
| 96 | compatible = "gpio-leds"; |
| 97 | |
| 98 | pinctrl-names = "default"; |
| 99 | pinctrl-0 = <&leds_pins>; |
| 100 | |
| 101 | user_led_1 { |
| 102 | label = "am3517evm:green:user_led_1"; |
| 103 | gpios = <&tca6416 7 GPIO_ACTIVE_LOW>; |
| 104 | default-state = "on"; |
| 105 | }; |
| 106 | |
| 107 | user_led_2 { |
| 108 | label = "am3517evm:green:user_led_2"; |
| 109 | gpios = <&tca6416 6 GPIO_ACTIVE_LOW>; |
| 110 | default-state = "on"; |
| 111 | }; |
| 112 | |
| 113 | user_led_3 { |
| 114 | label = "am3517evm:green:user_led_3"; |
| 115 | gpios = <&gpio1 11 GPIO_ACTIVE_HIGH>; |
| 116 | linux,default-trigger = "mmc0"; /* SD/MMC card activity */ |
| 117 | }; |
| 118 | |
| 119 | user_led_4 { |
| 120 | label = "am3517evm:green:user_led_4"; |
| 121 | gpios = <&gpio1 31 GPIO_ACTIVE_HIGH>; |
| 122 | linux,default-trigger = "heartbeat"; |
| 123 | }; |
| 124 | }; |
| 125 | |
| 126 | lcd0: display@0 { |
| 127 | /* This isn't the exact LCD, but the timings meet spec */ |
| 128 | /* To make it work, set CONFIG_OMAP2_DSS_MIN_FCK_PER_PCK=4 */ |
| 129 | compatible = "newhaven,nhd-4.3-480272ef-atxl"; |
| 130 | label = "15"; |
| 131 | backlight = <&bl>; |
| 132 | enable-gpios = <&gpio6 16 GPIO_ACTIVE_HIGH>; /* gpio176, lcd INI */ |
| 133 | vcc-supply = <&vdd_io_reg>; |
| 134 | |
| 135 | port { |
| 136 | lcd_in: endpoint { |
| 137 | remote-endpoint = <&dpi_out>; |
| 138 | }; |
| 139 | }; |
| 140 | }; |
| 141 | |
| 142 | bl: backlight { |
| 143 | compatible = "pwm-backlight"; |
| 144 | pinctrl-names = "default"; |
| 145 | power-supply = <&vdd_io_reg>; |
| 146 | pinctrl-0 = <&backlight_pins>; |
| 147 | pwms = <&pwm11 0 5000000 0>; |
| 148 | brightness-levels = <0 10 20 30 40 50 60 70 80 90 100>; |
| 149 | default-brightness-level = <7>; |
| 150 | enable-gpios = <&gpio6 22 GPIO_ACTIVE_HIGH>; /* gpio_182 */ |
| 151 | }; |
| 152 | |
| 153 | pwm11: pwm-11 { |
| 154 | compatible = "ti,omap-dmtimer-pwm"; |
| 155 | pinctrl-names = "default"; |
| 156 | pinctrl-0 = <&pwm_pins>; |
| 157 | ti,timers = <&timer11>; |
| 158 | #pwm-cells = <3>; |
| 159 | ti,clock-source = <0x01>; |
| 160 | }; |
| 161 | |
| 162 | /* HS USB Host PHY on PORT 1 */ |
| 163 | hsusb1_phy: hsusb1_phy { |
| 164 | pinctrl-names = "default"; |
| 165 | pinctrl-0 = <&hsusb1_rst_pins>; |
| 166 | compatible = "usb-nop-xceiv"; |
| 167 | reset-gpios = <&gpio2 25 GPIO_ACTIVE_LOW>; /* gpio_57 */ |
| 168 | #phy-cells = <0>; |
| 169 | }; |
| 170 | }; |
| 171 | |
| 172 | &davinci_emac { |
| 173 | pinctrl-names = "default"; |
| 174 | pinctrl-0 = <ðernet_pins>; |
| 175 | phy-mode = "rmii"; |
| 176 | phy-handle = <ðphy0>; |
| 177 | status = "okay"; |
| 178 | }; |
| 179 | |
| 180 | &davinci_mdio { |
| 181 | #address-cells = <1>; |
| 182 | #size-cells = <0>; |
| 183 | status = "okay"; |
| 184 | |
| 185 | ethphy0: ethernet-phy@0 { |
| 186 | pinctrl-names = "default"; |
| 187 | pinctrl-0 = <&enet_phy_pins>; |
| 188 | compatible = "ethernet-phy-ieee802.3-c22"; |
| 189 | reg = <0>; |
| 190 | interrupt-parent = <&gpio2>; |
| 191 | interrupts = <26 IRQ_TYPE_LEVEL_LOW>; /* gpio_58 */ |
| 192 | }; |
| 193 | }; |
| 194 | |
| 195 | &dss { |
| 196 | status = "okay"; |
| 197 | |
| 198 | pinctrl-names = "default"; |
| 199 | pinctrl-0 = <&dss_dpi_pins>; |
| 200 | |
| 201 | vdds_dsi-supply = <&vdd_io_reg>; |
| 202 | vdda_video-supply = <&vdd_io_reg>; |
| 203 | |
| 204 | port { |
| 205 | dpi_out: endpoint { |
| 206 | remote-endpoint = <&lcd_in>; |
| 207 | data-lines = <16>; |
| 208 | }; |
| 209 | }; |
| 210 | }; |
| 211 | |
| 212 | &i2c2 { |
| 213 | pinctrl-names = "default"; |
| 214 | pinctrl-0 = <&i2c2_pins>; |
| 215 | clock-frequency = <400000>; |
| 216 | /* User DIP swithes [1:8] / User LEDS [1:2] */ |
| 217 | tca6416: gpio@21 { |
| 218 | compatible = "ti,tca6416"; |
| 219 | reg = <0x21>; |
| 220 | gpio-controller; |
| 221 | #gpio-cells = <2>; |
| 222 | vcc-supply = <&vdd_io_reg>; |
| 223 | }; |
| 224 | }; |
| 225 | |
| 226 | &i2c3 { |
| 227 | pinctrl-names = "default"; |
| 228 | pinctrl-0 = <&i2c3_pins>; |
| 229 | clock-frequency = <400000>; |
| 230 | }; |
| 231 | |
| 232 | &mmc1 { |
| 233 | status = "okay"; |
| 234 | pinctrl-names = "default"; |
| 235 | pinctrl-0 = <&mmc1_pins>; |
| 236 | vmmc-supply = <&vmmc_fixed>; |
| 237 | bus-width = <4>; |
| 238 | wp-gpios = <&gpio4 30 GPIO_ACTIVE_HIGH>; /* gpio_126 */ |
| 239 | cd-gpios = <&gpio4 31 GPIO_ACTIVE_LOW>; /* gpio_127 */ |
| 240 | }; |
| 241 | |
| 242 | &mmc3 { |
| 243 | status = "disabled"; |
| 244 | }; |
| 245 | |
| 246 | &usbhshost { |
| 247 | pinctrl-names = "default"; |
| 248 | pinctrl-0 = <&hsusb1_pins>; |
| 249 | port1-mode = "ehci-phy"; |
| 250 | }; |
| 251 | |
| 252 | &usbhsehci { |
| 253 | phys = <&hsusb1_phy>; |
| 254 | }; |
| 255 | |
| 256 | &omap3_pmx_core { |
| 257 | |
| 258 | ethernet_pins: ethernet-pins { |
| 259 | pinctrl-single,pins = < |
| 260 | OMAP3_CORE1_IOPAD(0x21fe, PIN_INPUT | MUX_MODE0) /* rmii_mdio_data */ |
| 261 | OMAP3_CORE1_IOPAD(0x2200, MUX_MODE0) /* rmii_mdio_clk */ |
| 262 | OMAP3_CORE1_IOPAD(0x2202, PIN_INPUT_PULLDOWN | MUX_MODE0) /* rmii_rxd0 */ |
| 263 | OMAP3_CORE1_IOPAD(0x2204, PIN_INPUT_PULLDOWN | MUX_MODE0) /* rmii_rxd1 */ |
| 264 | OMAP3_CORE1_IOPAD(0x2206, PIN_INPUT_PULLDOWN | MUX_MODE0) /* rmii_crs_dv */ |
| 265 | OMAP3_CORE1_IOPAD(0x2208, PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* rmii_rxer */ |
| 266 | OMAP3_CORE1_IOPAD(0x220a, PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* rmii_txd0 */ |
| 267 | OMAP3_CORE1_IOPAD(0x220c, PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* rmii_txd1 */ |
| 268 | OMAP3_CORE1_IOPAD(0x220e, PIN_OUTPUT_PULLDOWN |MUX_MODE0) /* rmii_txen */ |
| 269 | OMAP3_CORE1_IOPAD(0x2210, PIN_INPUT_PULLDOWN | MUX_MODE0) /* rmii_50mhz_clk */ |
| 270 | >; |
| 271 | }; |
| 272 | |
| 273 | enet_phy_pins: ethernet-phy-pins { |
| 274 | pinctrl-single,pins = < |
| 275 | OMAP3_CORE1_IOPAD(0x20bc, PIN_INPUT | MUX_MODE4) /* gpmc_ncs7.gpio_57 */ |
| 276 | >; |
| 277 | }; |
| 278 | |
| 279 | i2c2_pins: i2c2-pins { |
| 280 | pinctrl-single,pins = < |
| 281 | OMAP3_CORE1_IOPAD(0x21be, PIN_INPUT_PULLUP | MUX_MODE0) /* i2c2_scl */ |
| 282 | OMAP3_CORE1_IOPAD(0x21c0, PIN_INPUT_PULLUP | MUX_MODE0) /* i2c2_sda */ |
| 283 | >; |
| 284 | }; |
| 285 | |
| 286 | i2c3_pins: i2c3-pins { |
| 287 | pinctrl-single,pins = < |
| 288 | OMAP3_CORE1_IOPAD(0x21c2, PIN_INPUT_PULLUP | MUX_MODE0) /* i2c3_scl */ |
| 289 | OMAP3_CORE1_IOPAD(0x21c4, PIN_INPUT_PULLUP | MUX_MODE0) /* i2c3_sda */ |
| 290 | >; |
| 291 | }; |
| 292 | |
| 293 | mmc1_pins: mmc1-pins { |
| 294 | pinctrl-single,pins = < |
| 295 | OMAP3_CORE1_IOPAD(0x2144, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_clk.sdmmc1_clk */ |
| 296 | OMAP3_CORE1_IOPAD(0x2146, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_cmd.sdmmc1_cmd */ |
| 297 | OMAP3_CORE1_IOPAD(0x2148, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_dat0.sdmmc1_dat0 */ |
| 298 | OMAP3_CORE1_IOPAD(0x214a, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_dat1.sdmmc1_dat1 */ |
| 299 | OMAP3_CORE1_IOPAD(0x214c, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_dat2.sdmmc1_dat2 */ |
| 300 | OMAP3_CORE1_IOPAD(0x214e, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_dat3.sdmmc1_dat3 */ |
| 301 | OMAP3_CORE1_IOPAD(0x2150, PIN_INPUT_PULLUP | MUX_MODE4) /* sdmmc1_dat4.gpio_126 */ |
| 302 | OMAP3_CORE1_IOPAD(0x2152, PIN_INPUT_PULLUP | MUX_MODE4) /* sdmmc1_dat5.gpio_127 */ |
| 303 | >; |
| 304 | }; |
| 305 | |
| 306 | pwm_pins: pwm-pins { |
| 307 | pinctrl-single,pins = < |
| 308 | OMAP3_CORE1_IOPAD(0x21dc, PIN_OUTPUT | MUX_MODE1) /* mcspi2_cs0.gpt11_pwm */ |
| 309 | >; |
| 310 | }; |
| 311 | |
| 312 | backlight_pins: backlight-pins { |
| 313 | pinctrl-single,pins = < |
| 314 | OMAP3_CORE1_IOPAD(0x21de, PIN_OUTPUT | MUX_MODE4) /* mcspi2_cs1.gpio_182 */ |
| 315 | >; |
| 316 | }; |
| 317 | |
| 318 | dss_dpi_pins: dss-dpi-pins { |
| 319 | pinctrl-single,pins = < |
| 320 | OMAP3_CORE1_IOPAD(0x21d2, PIN_OUTPUT | MUX_MODE4) /* mcspi1_cs2.gpio_176 */ |
| 321 | OMAP3_CORE1_IOPAD(0x20d4, PIN_OUTPUT | MUX_MODE0) /* dss_pclk.dss_pclk */ |
| 322 | OMAP3_CORE1_IOPAD(0x20d6, PIN_OUTPUT | MUX_MODE0) /* dss_hsync.dss_hsync */ |
| 323 | OMAP3_CORE1_IOPAD(0x20d8, PIN_OUTPUT | MUX_MODE0) /* dss_vsync.dss_vsync */ |
| 324 | OMAP3_CORE1_IOPAD(0x20da, PIN_OUTPUT | MUX_MODE0) /* dss_acbias.dss_acbias */ |
| 325 | OMAP3_CORE1_IOPAD(0x20dc, PIN_OUTPUT | MUX_MODE0) /* dss_data0.dss_data0 */ |
| 326 | OMAP3_CORE1_IOPAD(0x20de, PIN_OUTPUT | MUX_MODE0) /* dss_data1.dss_data1 */ |
| 327 | OMAP3_CORE1_IOPAD(0x20e0, PIN_OUTPUT | MUX_MODE0) /* dss_data2.dss_data2 */ |
| 328 | OMAP3_CORE1_IOPAD(0x20e2, PIN_OUTPUT | MUX_MODE0) /* dss_data3.dss_data3 */ |
| 329 | OMAP3_CORE1_IOPAD(0x20e4, PIN_OUTPUT | MUX_MODE0) /* dss_data4.dss_data4 */ |
| 330 | OMAP3_CORE1_IOPAD(0x20e6, PIN_OUTPUT | MUX_MODE0) /* dss_data5.dss_data5 */ |
| 331 | OMAP3_CORE1_IOPAD(0x20e8, PIN_OUTPUT | MUX_MODE0) /* dss_data6.dss_data6 */ |
| 332 | OMAP3_CORE1_IOPAD(0x20ea, PIN_OUTPUT | MUX_MODE0) /* dss_data7.dss_data7 */ |
| 333 | OMAP3_CORE1_IOPAD(0x20ec, PIN_OUTPUT | MUX_MODE0) /* dss_data8.dss_data8 */ |
| 334 | OMAP3_CORE1_IOPAD(0x20ee, PIN_OUTPUT | MUX_MODE0) /* dss_data9.dss_data9 */ |
| 335 | OMAP3_CORE1_IOPAD(0x20f0, PIN_OUTPUT | MUX_MODE0) /* dss_data10.dss_data10 */ |
| 336 | OMAP3_CORE1_IOPAD(0x20f2, PIN_OUTPUT | MUX_MODE0) /* dss_data11.dss_data11 */ |
| 337 | OMAP3_CORE1_IOPAD(0x20f4, PIN_OUTPUT | MUX_MODE0) /* dss_data12.dss_data12 */ |
| 338 | OMAP3_CORE1_IOPAD(0x20f6, PIN_OUTPUT | MUX_MODE0) /* dss_data13.dss_data13 */ |
| 339 | OMAP3_CORE1_IOPAD(0x20f8, PIN_OUTPUT | MUX_MODE0) /* dss_data14.dss_data14 */ |
| 340 | OMAP3_CORE1_IOPAD(0x20fa, PIN_OUTPUT | MUX_MODE0) /* dss_data15.dss_data15 */ |
| 341 | >; |
| 342 | }; |
| 343 | |
| 344 | hsusb1_rst_pins: hsusb1-rst-pins { |
| 345 | pinctrl-single,pins = < |
| 346 | OMAP3_CORE1_IOPAD(0x20ba, PIN_OUTPUT | MUX_MODE4) /* gpmc_ncs6.gpio_57 */ |
| 347 | >; |
| 348 | }; |
| 349 | }; |
| 350 | |
| 351 | &omap3_pmx_core2 { |
| 352 | |
| 353 | hsusb1_pins: hsusb1-pins { |
| 354 | pinctrl-single,pins = < |
| 355 | OMAP3430_CORE2_IOPAD(0x25d8, PIN_OUTPUT | MUX_MODE3) /* etk_clk.hsusb1_stp */ |
| 356 | OMAP3430_CORE2_IOPAD(0x25da, PIN_OUTPUT | MUX_MODE3) /* etk_ctl.hsusb1_clk */ |
| 357 | OMAP3430_CORE2_IOPAD(0x25ec, PIN_INPUT | MUX_MODE3) /* etk_d8.hsusb1_dir */ |
| 358 | OMAP3430_CORE2_IOPAD(0x25ee, PIN_INPUT | MUX_MODE3) /* etk_d9.hsusb1_nxt */ |
| 359 | OMAP3430_CORE2_IOPAD(0x25dc, PIN_INPUT | MUX_MODE3) /* etk_d0.hsusb1_data0 */ |
| 360 | OMAP3430_CORE2_IOPAD(0x25de, PIN_INPUT | MUX_MODE3) /* etk_d1.hsusb1_data1 */ |
| 361 | OMAP3430_CORE2_IOPAD(0x25e0, PIN_INPUT | MUX_MODE3) /* etk_d2.hsusb1_data2 */ |
| 362 | OMAP3430_CORE2_IOPAD(0x25ea, PIN_INPUT | MUX_MODE3) /* etk_d7.hsusb1_data3 */ |
| 363 | OMAP3430_CORE2_IOPAD(0x25e4, PIN_INPUT | MUX_MODE3) /* etk_d4.hsusb1_data4 */ |
| 364 | OMAP3430_CORE2_IOPAD(0x25e6, PIN_INPUT | MUX_MODE3) /* etk_d5.hsusb1_data5 */ |
| 365 | OMAP3430_CORE2_IOPAD(0x25e8, PIN_INPUT | MUX_MODE3) /* etk_d6.hsusb1_data6 */ |
| 366 | OMAP3430_CORE2_IOPAD(0x25e2, PIN_INPUT | MUX_MODE3) /* etk_d3.hsusb1_data7 */ |
| 367 | >; |
| 368 | }; |
| 369 | }; |
| 370 | |
| 371 | &omap3_pmx_wkup { |
| 372 | leds_pins: leds-pins { |
| 373 | pinctrl-single,pins = < |
| 374 | OMAP3_WKUP_IOPAD(0x2a24, PIN_OUTPUT_PULLUP | MUX_MODE4) /* jtag_emu0.gpio_11 */ |
| 375 | OMAP3_WKUP_IOPAD(0x2a26, PIN_OUTPUT_PULLUP | MUX_MODE4) /* jtag_emu1.gpio_31 */ |
| 376 | >; |
| 377 | }; |
| 378 | }; |