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wdenkd1cbe852003-06-28 17:24:46 +00001/*
wdenkc837dcb2004-01-20 23:12:12 +00002 * (C) Copyright 2000-2004
wdenkd1cbe852003-06-28 17:24:46 +00003 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
4 *
5 * See file CREDITS for list of people who contributed to this
6 * project.
7 *
8 * This program is free software; you can redistribute it and/or
9 * modify it under the terms of the GNU General Public License as
10 * published by the Free Software Foundation; either version 2 of
11 * the License, or (at your option) any later version.
12 *
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
17 *
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
21 * MA 02111-1307 USA
22 */
23
24/*
25 * board/config.h - configuration options, board specific
26 */
27
28#ifndef __CONFIG_H
29#define __CONFIG_H
30
31/*
32 * High Level Configuration Options
33 * (easy to change)
34 */
35
Wolfgang Denk53677ef2008-05-20 16:00:29 +020036#define CONFIG_405GP 1 /* This is a PPC405GP CPU */
wdenkd1cbe852003-06-28 17:24:46 +000037#define CONFIG_4xx 1 /* ...member of PPC4xx family */
38#define CONFIG_EXBITGEN 1 /* on a Exbit Generic board */
39
wdenkc837dcb2004-01-20 23:12:12 +000040#define CONFIG_BOARD_EARLY_INIT_F 1 /* Call board_early_init_f */
wdenkd1cbe852003-06-28 17:24:46 +000041
42#define CONFIG_SYS_CLK_FREQ 25000000 /* external frequency to pll */
43
44/* I2C configuration */
45#define CONFIG_HARD_I2C 1 /* I2C with hardware support */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +020046#define CONFIG_SYS_I2C_SPEED 40000 /* I2C speed */
47#define CONFIG_SYS_I2C_SLAVE 0x7F /* I2C slave address */
wdenkd1cbe852003-06-28 17:24:46 +000048
49/* environment is in EEPROM */
Jean-Christophe PLAGNIOL-VILLARDbb1f8b42008-09-05 09:19:30 +020050#define CONFIG_ENV_IS_IN_EEPROM 1
Jean-Christophe PLAGNIOL-VILLARD5a1aceb2008-09-10 22:48:04 +020051#undef CONFIG_ENV_IS_IN_FLASH
Jean-Christophe PLAGNIOL-VILLARD9314cee2008-09-10 22:47:59 +020052#undef CONFIG_ENV_IS_IN_NVRAM
wdenkd1cbe852003-06-28 17:24:46 +000053
Jean-Christophe PLAGNIOL-VILLARDbb1f8b42008-09-05 09:19:30 +020054#ifdef CONFIG_ENV_IS_IN_EEPROM
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +020055#define CONFIG_SYS_I2C_EEPROM_ADDR 0x56 /* 1010110 */
56#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1 /* 8-bit internal addressing */
57#define CONFIG_SYS_I2C_EEPROM_ADDR_OVERFLOW 1 /* ... and 1 bit in I2C address */
58#define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 3 /* 4 bytes per page */
59#define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 40 /* write takes up to 40 msec */
Jean-Christophe PLAGNIOL-VILLARD0e8d1582008-09-10 22:48:06 +020060#define CONFIG_ENV_OFFSET 4 /* Offset of Environment Sector */
61#define CONFIG_ENV_SIZE 350 /* that is 350 bytes only! */
wdenkd1cbe852003-06-28 17:24:46 +000062#endif
63
64#define CONFIG_BOOTDELAY 10 /* autoboot after 10 seconds */
65/* Explanation:
66 autbooting is altogether disabled and cannot be
67 enabled if CONFIG_BOOTDELAY is negative.
wdenk945af8d2003-07-16 21:53:01 +000068 If you want shorter bootdelay, then
wdenkd1cbe852003-06-28 17:24:46 +000069 - "setenv bootdelay <delay>" to the proper value
70*/
71
72#define CONFIG_BOOTCOMMAND "bootm 20400000 20800000"
73
74#define CONFIG_BOOTARGS "root=/dev/ram " \
75 "ramdisk_size=32768 " \
76 "console=ttyS0,115200 " \
77 "ram=128M debug"
78
79#define CONFIG_LOADS_ECHO 1 /* echo on for serial download */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +020080#define CONFIG_SYS_LOADS_BAUD_CHANGE 1 /* allow baudrate change */
wdenkd1cbe852003-06-28 17:24:46 +000081
82#define CONFIG_MII 1 /* MII PHY management */
83#define CONFIG_PHY_ADDR 0 /* PHY address */
84
wdenkd1cbe852003-06-28 17:24:46 +000085
Jon Loeligerdcaa7152007-07-07 20:56:05 -050086/*
Jon Loeliger11799432007-07-10 09:02:57 -050087 * BOOTP options
88 */
89#define CONFIG_BOOTP_BOOTFILESIZE
90#define CONFIG_BOOTP_BOOTPATH
91#define CONFIG_BOOTP_GATEWAY
92#define CONFIG_BOOTP_HOSTNAME
93
94
95/*
Jon Loeligerdcaa7152007-07-07 20:56:05 -050096 * Command line configuration.
97 */
98#include <config_cmd_default.h>
99
wdenkd1cbe852003-06-28 17:24:46 +0000100
101#undef CONFIG_WATCHDOG /* watchdog disabled */
102
103/*
104 * Miscellaneous configurable options
105 */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200106#define CONFIG_SYS_LONGHELP /* undef to save memory */
107#define CONFIG_SYS_PROMPT "=> " /* Monitor Command Prompt */
Jon Loeligerdcaa7152007-07-07 20:56:05 -0500108#if defined(CONFIG_CMD_KGDB)
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200109#define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */
wdenkd1cbe852003-06-28 17:24:46 +0000110#else
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200111#define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */
wdenkd1cbe852003-06-28 17:24:46 +0000112#endif
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200113#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) /* Print Buffer Size */
114#define CONFIG_SYS_MAXARGS 16 /* max number of command args */
115#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */
wdenkd1cbe852003-06-28 17:24:46 +0000116
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200117#define CONFIG_SYS_MEMTEST_START 0x0400000 /* memtest works on */
118#define CONFIG_SYS_MEMTEST_END 0x0C00000 /* 4 ... 12 MB in DRAM */
wdenkd1cbe852003-06-28 17:24:46 +0000119
120/* UART configuration */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200121#define CONFIG_SYS_BASE_BAUD 691200
wdenkd1cbe852003-06-28 17:24:46 +0000122
123/* Default baud rate */
124#define CONFIG_BAUDRATE 115200
wdenk945af8d2003-07-16 21:53:01 +0000125
wdenkd1cbe852003-06-28 17:24:46 +0000126/* The following table includes the supported baudrates */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200127#define CONFIG_SYS_BAUDRATE_TABLE \
wdenk945af8d2003-07-16 21:53:01 +0000128 { 300, 600, 1200, 2400, 4800, 9600, 19200, 38400, \
129 57600, 115200, 230400, 460800, 921600 }
wdenkd1cbe852003-06-28 17:24:46 +0000130
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200131#define CONFIG_SYS_CLKS_IN_HZ 1 /* everything, incl board info, in Hz */
wdenkd1cbe852003-06-28 17:24:46 +0000132
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200133#define CONFIG_SYS_LOAD_ADDR 0x100000 /* default load address */
134#define CONFIG_SYS_EXTBDINFO 1 /* To use extended board_into (bd_t) */
wdenkd1cbe852003-06-28 17:24:46 +0000135
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200136#define CONFIG_SYS_HZ 1000 /* decrementer freq: 1 ms ticks */
wdenkd1cbe852003-06-28 17:24:46 +0000137
138/*-----------------------------------------------------------------------
139 * PCI stuff
140 *-----------------------------------------------------------------------
141 */
142#undef CONFIG_PCI /* no pci support */
143
144/*-----------------------------------------------------------------------
145 * External peripheral base address
146 *-----------------------------------------------------------------------
147 */
148#undef CONFIG_IDE_PCMCIA /* no pcmcia interface required */
149#undef CONFIG_IDE_LED /* no led for ide supported */
150#undef CONFIG_IDE_RESET /* no reset for ide supported */
151
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200152#define CONFIG_SYS_KEY_REG_BASE_ADDR 0xF0100000
153#define CONFIG_SYS_IR_REG_BASE_ADDR 0xF0200000
154#define CONFIG_SYS_FPGA_REG_BASE_ADDR 0xF0300000
wdenkd1cbe852003-06-28 17:24:46 +0000155
156/*-----------------------------------------------------------------------
157 * Start addresses for the final memory configuration
158 * (Set up by the startup code)
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200159 * Please note that CONFIG_SYS_SDRAM_BASE _must_ start at 0
wdenkd1cbe852003-06-28 17:24:46 +0000160 */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200161#define CONFIG_SYS_SDRAM_BASE 0x00000000
162#define CONFIG_SYS_FLASH0_BASE 0xFFF80000
163#define CONFIG_SYS_FLASH0_SIZE 0x00080000
164#define CONFIG_SYS_FLASH1_BASE 0x20000000
165#define CONFIG_SYS_FLASH1_SIZE 0x02000000
166#define CONFIG_SYS_FLASH_BASE CONFIG_SYS_FLASH0_BASE
167#define CONFIG_SYS_FLASH_SIZE CONFIG_SYS_FLASH0_SIZE
168#define CONFIG_SYS_MONITOR_BASE TEXT_BASE
169#define CONFIG_SYS_MONITOR_LEN (192 * 1024) /* Reserve 196 kB for Monitor */
170#define CONFIG_SYS_MALLOC_LEN (128 * 1024) /* Reserve 128 kB for malloc() */
wdenkd1cbe852003-06-28 17:24:46 +0000171
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200172#if CONFIG_SYS_MONITOR_BASE < CONFIG_SYS_FLASH0_BASE
173#define CONFIG_SYS_RAMSTART
wdenkd1cbe852003-06-28 17:24:46 +0000174#endif
175
176/*
177 * For booting Linux, the board info and command line data
178 * have to be in the first 8 MB of memory, since this is
179 * the maximum mapped by the Linux kernel during initialization.
180 */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200181#define CONFIG_SYS_BOOTMAPSZ (8 << 20) /* Initial Memory map for Linux */
wdenkd1cbe852003-06-28 17:24:46 +0000182/*-----------------------------------------------------------------------
183 * FLASH organization
184 */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200185#define CONFIG_SYS_MAX_FLASH_BANKS 5 /* max number of memory banks */
186#define CONFIG_SYS_MAX_FLASH_SECT 128 /* max number of sectors on one chip */
wdenkd1cbe852003-06-28 17:24:46 +0000187
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200188#define CONFIG_SYS_FLASH_ERASE_TOUT 120000 /* Timeout for Flash Erase (in ms) */
189#define CONFIG_SYS_FLASH_WRITE_TOUT 500 /* Timeout for Flash Write (in ms) */
wdenkd1cbe852003-06-28 17:24:46 +0000190
Jean-Christophe PLAGNIOL-VILLARD5a1aceb2008-09-10 22:48:04 +0200191#ifdef CONFIG_ENV_IS_IN_FLASH
Jean-Christophe PLAGNIOL-VILLARD0e8d1582008-09-10 22:48:06 +0200192#define CONFIG_ENV_OFFSET 0x00060000 /* Offset of Environment Sector */
193#define CONFIG_ENV_SIZE 0x00010000 /* Total Size of Environment Sector */
194#define CONFIG_ENV_SECT_SIZE 0x00010000 /* see README - env sector total size */
wdenkd1cbe852003-06-28 17:24:46 +0000195#endif
196
197/* On Chip Memory location/size */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200198#define CONFIG_SYS_OCM_DATA_ADDR 0xF8000000
199#define CONFIG_SYS_OCM_DATA_SIZE 0x1000
wdenkd1cbe852003-06-28 17:24:46 +0000200
201/* Global info and initial stack */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200202#define CONFIG_SYS_INIT_RAM_ADDR CONFIG_SYS_OCM_DATA_ADDR /* inside of on-chip SRAM */
203#define CONFIG_SYS_INIT_RAM_END CONFIG_SYS_OCM_DATA_SIZE /* End of used area in RAM */
204#define CONFIG_SYS_GBL_DATA_SIZE 128 /* size in bytes reserved for initial data */
205#define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_END - CONFIG_SYS_GBL_DATA_SIZE)
206#define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET
wdenkd1cbe852003-06-28 17:24:46 +0000207
wdenkd1cbe852003-06-28 17:24:46 +0000208/*
209 * Internal Definitions
210 *
211 * Boot Flags
212 */
213#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */
214#define BOOTFLAG_WARM 0x02 /* Software reboot */
215
Jon Loeligerdcaa7152007-07-07 20:56:05 -0500216#if defined(CONFIG_CMD_KGDB)
wdenkd1cbe852003-06-28 17:24:46 +0000217#define CONFIG_KGDB_BAUDRATE 230400 /* speed to run kgdb serial port */
218#define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */
219#endif
220#endif /* __CONFIG_H */