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gerrit.devboardsforandroid.linaro.org / platform / external / u-boot / 6f5155a95cc6d4b80cda10785c64a55fbb18e8ee / . / cpu / mcf52x2 / start.S
blob: 3ab812b3d4bf0fe8fcdbab92bcc45663f8ce375f [file] [log] [blame]
wdenkbf9e3b32004-02-12 00:47:09 +0000[diff] [blame]1/*
2 * Copyright (C) 2003 Josef Baumgartner <josef.baumgartner@telex.de>
3 * Based on code from Bernhard Kuhn <bkuhn@metrowerks.com>
4 *
5 * See file CREDITS for list of people who contributed to this
6 * project.
7 *
8 * This program is free software; you can redistribute it and/or
9 * modify it under the terms of the GNU General Public License as
10 * published by the Free Software Foundation; either version 2 of
11 * the License, or (at your option) any later version.
12 *
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
17 *
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
21 * MA 02111-1307 USA
22 */
23
24#include <config.h>
25#include "version.h"
26
27#ifndef CONFIG_IDENT_STRING
28#define CONFIG_IDENT_STRING ""
29#endif
30
31
32#define _START _start
33#define _FAULT _fault
34
35
36#define SAVE_ALL \
37 move.w #0x2700,%sr; /* disable intrs */ \
38 subl #60,%sp; /* space for 15 regs */ \
39 moveml %d0-%d7/%a0-%a6,%sp@; \
40
41#define RESTORE_ALL \
42 moveml %sp@,%d0-%d7/%a0-%a6; \
43 addl #60,%sp; /* space for 15 regs */ \
44 rte
45
46/* If we come from a pre-loader we don't need an initial exception
47 * table.
48 */
49#if !defined(CONFIG_MONITOR_IS_IN_RAM)
50
51.text
52/*
53 * Vector table. This is used for initial platform startup.
54 * These vectors are to catch any un-intended traps.
55 */
56_vectors:
57
Marian Balakowicz6f5155a2006-05-09 11:51:51 +0200[diff] [blame^]58#ifndef CONFIG_R5200
wdenkbf9e3b32004-02-12 00:47:09 +0000[diff] [blame]59.long 0x00000000, _START
Zachary P. Landaueacbd312006-01-26 17:35:56 -0500[diff] [blame]60#else
61.long 0x00000000, 0x400 /* Flash offset is 0 until we setup CS0 */
62#endif
wdenkbf9e3b32004-02-12 00:47:09 +0000[diff] [blame]63.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
64.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
65.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
66.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
67.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
68.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
69.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
70.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
71
72.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
73.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
74.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
75.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
76.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
77.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
78.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
79.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
80
81.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
82.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
83.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
84.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
85.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
86.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
87.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
88.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
89
90.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
91.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
92.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
93.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
94.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
95.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
96.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
97.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
98
99#endif
100
101 .text
102
103 .globl _start
104_start:
105 nop
106 nop
107 move.w #0x2700,%sr
108
109 /* if we come from a pre-loader we have no exception table and
110 * therefore no VBR to set
111 */
112#if !defined(CONFIG_MONITOR_IS_IN_RAM)
113 move.l #CFG_FLASH_BASE, %d0
114 movec %d0, %VBR
115#endif
116
stroese8c725b92004-12-16 18:09:49 +0000[diff] [blame]117#if defined(CONFIG_M5272) || defined(CONFIG_M5249)
wdenkbf9e3b32004-02-12 00:47:09 +0000[diff] [blame]118 move.l #(CFG_MBAR + 1), %d0 /* set MBAR address + valid flag */
119 move.c %d0, %MBAR
120
stroese8c725b92004-12-16 18:09:49 +0000[diff] [blame]121 /*** The 5249 has MBAR2 as well ***/
122#ifdef CFG_MBAR2
123 move.l #(CFG_MBAR2 + 1), %d0 /* Get MBAR2 address */
124 movec %d0, #0xc0e /* Set MBAR2 */
125#endif
126
wdenkbf9e3b32004-02-12 00:47:09 +0000[diff] [blame]127 move.l #(CFG_INIT_RAM_ADDR + 1), %d0
128 movec %d0, %RAMBAR0
stroese8c725b92004-12-16 18:09:49 +0000[diff] [blame]129#endif /* #if defined(CONFIG_M5272) || defined(CONFIG_M5249) */
wdenkbf9e3b32004-02-12 00:47:09 +0000[diff] [blame]130
Zachary P. Landaueacbd312006-01-26 17:35:56 -0500[diff] [blame]131#if defined(CONFIG_M5282) || defined(CONFIG_M5271)
wdenkbf9e3b32004-02-12 00:47:09 +0000[diff] [blame]132 /* Initialize IPSBAR */
133 move.l #(CFG_MBAR + 1), %d0 /* set IPSBAR address + valid flag */
134 move.l %d0, 0x40000000
135
Zachary P. Landaueacbd312006-01-26 17:35:56 -0500[diff] [blame]136#ifdef CONFIG_M5282
wdenkbf9e3b32004-02-12 00:47:09 +0000[diff] [blame]137 /* Initialize FLASHBAR: locate internal Flash and validate it */
138 move.l #(CFG_INT_FLASH_BASE + 0x21), %d0
139 movec %d0, %RAMBAR0
Zachary P. Landaueacbd312006-01-26 17:35:56 -0500[diff] [blame]140#endif
wdenkbf9e3b32004-02-12 00:47:09 +0000[diff] [blame]141
142 /* Initialize RAMBAR1: locate SRAM and validate it */
143 move.l #(CFG_INIT_RAM_ADDR + 0x21), %d0
144 movec %d0, %RAMBAR1
Marian Balakowicz6f5155a2006-05-09 11:51:51 +0200[diff] [blame^]145#endif
146
147#ifdef CONFIG_R5200
Zachary P. Landaueacbd312006-01-26 17:35:56 -0500[diff] [blame]148 move.l #(_flash_setup-CFG_FLASH_BASE), %a0
149 move.l #(_flash_setup_end-CFG_FLASH_BASE), %a1
150 move.l #(CFG_INIT_RAM_ADDR), %a2
151_copy_flash:
152 move.l (%a0)+, (%a2)+
153 cmp.l %a0, %a1
154 bgt.s _copy_flash
Zachary P. Landaueacbd312006-01-26 17:35:56 -0500[diff] [blame]155 jmp CFG_INIT_RAM_ADDR
156_after_flash_copy:
157#endif
158
159#if 0
wdenkbf9e3b32004-02-12 00:47:09 +0000[diff] [blame]160 /* invalidate and disable cache */
161 move.l #0x01000000, %d0 /* Invalidate cache cmd */
162 movec %d0, %CACR /* Invalidate cache */
163 move.l #0, %d0
164 movec %d0, %ACR0
165 movec %d0, %ACR1
Zachary P. Landaueacbd312006-01-26 17:35:56 -0500[diff] [blame]166#endif
wdenkbf9e3b32004-02-12 00:47:09 +0000[diff] [blame]167
168 /* set stackpointer to end of internal ram to get some stackspace for the first c-code */
169 move.l #(CFG_INIT_RAM_ADDR + CFG_INIT_SP_OFFSET), %sp
170 clr.l %sp@-
171
172 move.l #__got_start, %a5 /* put relocation table address to a5 */
173
174 bsr cpu_init_f /* run low-level CPU init code (from flash) */
175 bsr board_init_f /* run low-level board init code (from flash) */
176
Marian Balakowicz6f5155a2006-05-09 11:51:51 +0200[diff] [blame^]177 /* board_init_f() does not return */
wdenkbf9e3b32004-02-12 00:47:09 +0000[diff] [blame]178
179/*------------------------------------------------------------------------------*/
180
Marian Balakowicz6f5155a2006-05-09 11:51:51 +0200[diff] [blame^]181#ifdef CONFIG_R5200
Zachary P. Landaueacbd312006-01-26 17:35:56 -0500[diff] [blame]182_flash_setup:
Marian Balakowicz6f5155a2006-05-09 11:51:51 +0200[diff] [blame^]183 /* CSAR0 */
184 move.l #((CFG_FLASH_BASE & 0xffff0000) >> 16), %d0
Zachary P. Landaueacbd312006-01-26 17:35:56 -0500[diff] [blame]185 move.w %d0, 0x40000080
Marian Balakowicz6f5155a2006-05-09 11:51:51 +0200[diff] [blame^]186
187 /* CSCR0 */
188 move.l #0x2180, %d0 /* 8 wait states, 16bit port, auto ack, */
Zachary P. Landaueacbd312006-01-26 17:35:56 -0500[diff] [blame]189 move.w %d0, 0x4000008A
Marian Balakowicz6f5155a2006-05-09 11:51:51 +0200[diff] [blame^]190
191 /* CSMR0 */
192 move.l #0x001f0001, %d0 /* 2 MB, valid */
Zachary P. Landaueacbd312006-01-26 17:35:56 -0500[diff] [blame]193 move.l %d0, 0x40000084
Marian Balakowicz6f5155a2006-05-09 11:51:51 +0200[diff] [blame^]194
Zachary P. Landaueacbd312006-01-26 17:35:56 -0500[diff] [blame]195 jmp _after_flash_copy.L
196_flash_setup_end:
197#endif
198
wdenkbf9e3b32004-02-12 00:47:09 +0000[diff] [blame]199/*
200 * void relocate_code (addr_sp, gd, addr_moni)
201 *
202 * This "function" does not return, instead it continues in RAM
203 * after relocating the monitor code.
204 *
205 * r3 = dest
206 * r4 = src
207 * r5 = length in bytes
208 * r6 = cachelinesize
209 */
210 .globl relocate_code
211relocate_code:
212 link.w %a6,#0
213 move.l 8(%a6), %sp /* set new stack pointer */
214
215 move.l 12(%a6), %d0 /* Save copy of Global Data pointer */
216 move.l 16(%a6), %a0 /* Save copy of Destination Address */
217
218 move.l #CFG_MONITOR_BASE, %a1
219 move.l #__init_end, %a2
220 move.l %a0, %a3
221
222 /* copy the code to RAM */
2231:
224 move.l (%a1)+, (%a3)+
225 cmp.l %a1,%a2
226 bgt.s 1b
227
228/*
229 * We are done. Do not return, instead branch to second part of board
230 * initialization, now running from RAM.
231 */
232 move.l %a0, %a1
233 add.l #(in_ram - CFG_MONITOR_BASE), %a1
234 jmp (%a1)
235
236in_ram:
237
238clear_bss:
239 /*
240 * Now clear BSS segment
241 */
242 move.l %a0, %a1
243 add.l #(_sbss - CFG_MONITOR_BASE),%a1
244 move.l %a0, %d1
245 add.l #(_ebss - CFG_MONITOR_BASE),%d1
2466:
247 clr.l (%a1)+
248 cmp.l %a1,%d1
249 bgt.s 6b
250
251 /*
252 * fix got table in RAM
253 */
254 move.l %a0, %a1
255 add.l #(__got_start - CFG_MONITOR_BASE),%a1
256 move.l %a1,%a5 /* * fix got pointer register a5 */
257
258 move.l %a0, %a2
259 add.l #(__got_end - CFG_MONITOR_BASE),%a2
260
2617:
262 move.l (%a1),%d1
263 sub.l #_start,%d1
264 add.l %a0,%d1
265 move.l %d1,(%a1)+
266 cmp.l %a2, %a1
267 bne 7b
268
269 /* calculate relative jump to board_init_r in ram */
270 move.l %a0, %a1
271 add.l #(board_init_r - CFG_MONITOR_BASE), %a1
272
273 /* set parameters for board_init_r */
274 move.l %a0,-(%sp) /* dest_addr */
275 move.l %d0,-(%sp) /* gd */
276 jsr (%a1)
277
278/*------------------------------------------------------------------------------*/
279/* exception code */
280 .globl _fault
281_fault:
282 jmp _fault
283
284 .globl _exc_handler
285_exc_handler:
286 SAVE_ALL
287 movel %sp,%sp@-
288 bsr exc_handler
289 addql #4,%sp
290 RESTORE_ALL
291
292 .globl _int_handler
293_int_handler:
294 SAVE_ALL
295 movel %sp,%sp@-
296 bsr int_handler
297 addql #4,%sp
298 RESTORE_ALL
299
300/*------------------------------------------------------------------------------*/
301/* cache functions */
302#ifdef CONFIG_M5272
303 .globl icache_enable
304icache_enable:
305 move.l #0x01000000, %d0 /* Invalidate cache cmd */
306 movec %d0, %CACR /* Invalidate cache */
307 move.l #0x0000c000, %d0 /* Setup cache mask */
308 movec %d0, %ACR0 /* Enable cache */
309 move.l #0xff00c000, %d0 /* Setup cache mask */
310 movec %d0, %ACR1 /* Enable cache */
311 move.l #0x80000100, %d0 /* Setup cache mask */
312 movec %d0, %CACR /* Enable cache */
313 moveq #1, %d0
314 move.l %d0, icache_state
315 rts
316#endif
317
318#ifdef CONFIG_M5282
319 .globl icache_enable
320icache_enable:
321 move.l #0x01000000, %d0 /* Invalidate cache cmd */
322 movec %d0, %CACR /* Invalidate cache */
323 move.l #0x0000c000, %d0 /* Setup cache mask */
324 movec %d0, %ACR0 /* Enable cache */
325 move.l #0xff00c000, %d0 /* Setup cache mask */
326 movec %d0, %ACR1 /* Enable cache */
327 move.l #0x80400100, %d0 /* Setup cache mask, data cache disabel*/
328 movec %d0, %CACR /* Enable cache */
329 moveq #1, %d0
330 move.l %d0, icache_state
331 rts
332#endif
333
stroese8c725b92004-12-16 18:09:49 +0000[diff] [blame]334#ifdef CONFIG_M5249
335 .globl icache_enable
336icache_enable:
337 /*
338 * Note: The 5249 Documentation doesn't give a bit position for CINV!
339 * From the 5272 and the 5307 documentation, I have deduced that it is
340 * probably CACR[24]. Should someone say something to Motorola?
341 * ~Jeremy
342 */
343 move.l #0x01000000, %d0 /* Invalidate whole cache */
344 move.c %d0,%CACR
345 move.l #0xff00c000, %d0 /* Set FLASH cachable: always match (SM=0b10) */
346 move.c %d0, %ACR0
347 move.l #0x0000c000, %d0 /* Set SDRAM cachable: always match (SM=0b10) */
348 move.c %d0, %ACR1
349 move.l #0x90000200, %d0 /* Set cache enable cmd */
350 move.c %d0,%CACR
351 moveq #1, %d0
352 move.l %d0, icache_state
353 rts
354#endif
355
wdenkbf9e3b32004-02-12 00:47:09 +0000[diff] [blame]356 .globl icache_disable
357icache_disable:
358 move.l #0x00000100, %d0 /* Setup cache mask */
359 movec %d0, %CACR /* Enable cache */
360 clr.l %d0 /* Setup cache mask */
361 movec %d0, %ACR0 /* Enable cache */
362 movec %d0, %ACR1 /* Enable cache */
363 moveq #0, %d0
364 move.l %d0, icache_state
365 rts
366
367 .globl icache_status
368icache_status:
369 move.l icache_state, %d0
370 rts
371
372 .data
373icache_state:
374 .long 1
375
stroese8c725b92004-12-16 18:09:49 +0000[diff] [blame]376
wdenkbf9e3b32004-02-12 00:47:09 +0000[diff] [blame]377/*------------------------------------------------------------------------------*/
378
379 .globl version_string
380version_string:
381 .ascii U_BOOT_VERSION
382 .ascii " (", __DATE__, " - ", __TIME__, ")"
383 .ascii CONFIG_IDENT_STRING, "\0"