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Tom Warrenf01b6312012-12-11 13:34:18 +00001/*
Tom Warren8ca79b22013-03-06 16:16:22 -07002 * (C) Copyright 2010-2013
Tom Warrenf01b6312012-12-11 13:34:18 +00003 * NVIDIA Corporation <www.nvidia.com>
4 *
Wolfgang Denk1a459662013-07-08 09:37:19 +02005 * SPDX-License-Identifier: GPL-2.0+
Tom Warrenf01b6312012-12-11 13:34:18 +00006 */
7
8#include <common.h>
Simon Glassb0e6ef42014-12-10 08:55:57 -07009#include <dm.h>
Tom Warrenf01b6312012-12-11 13:34:18 +000010#include <asm/arch/pinmux.h>
Tom Warren8ca79b22013-03-06 16:16:22 -070011#include <asm/arch/gp_padctrl.h>
Thierry Reding5a2c96a2014-12-09 22:25:17 -070012#include <asm/arch/gpio.h>
13#include <asm/gpio.h>
Tom Warrenf01b6312012-12-11 13:34:18 +000014#include "pinmux-config-cardhu.h"
Tom Warren190be1f2013-02-26 12:26:55 -070015#include <i2c.h>
Thierry Reding5a2c96a2014-12-09 22:25:17 -070016#include <netdev.h>
Tom Warren190be1f2013-02-26 12:26:55 -070017
18#define PMU_I2C_ADDRESS 0x2D
19#define MAX_I2C_RETRY 3
Tom Warrenf01b6312012-12-11 13:34:18 +000020
21/*
22 * Routine: pinmux_init
23 * Description: Do individual peripheral pinmux configs
24 */
25void pinmux_init(void)
26{
Stephen Warrendfb42fc2014-03-21 12:28:56 -060027 pinmux_config_pingrp_table(tegra3_pinmux_common,
Tom Warrenf01b6312012-12-11 13:34:18 +000028 ARRAY_SIZE(tegra3_pinmux_common));
29
Stephen Warrendfb42fc2014-03-21 12:28:56 -060030 pinmux_config_pingrp_table(unused_pins_lowpower,
Tom Warrenf01b6312012-12-11 13:34:18 +000031 ARRAY_SIZE(unused_pins_lowpower));
Tom Warren8ca79b22013-03-06 16:16:22 -070032
33 /* Initialize any non-default pad configs (APB_MISC_GP regs) */
Stephen Warrendfb42fc2014-03-21 12:28:56 -060034 pinmux_config_drvgrp_table(cardhu_padctrl, ARRAY_SIZE(cardhu_padctrl));
Tom Warrenf01b6312012-12-11 13:34:18 +000035}
Tom Warren190be1f2013-02-26 12:26:55 -070036
37#if defined(CONFIG_TEGRA_MMC)
38/*
39 * Do I2C/PMU writes to bring up SD card bus power
40 *
41 */
42void board_sdmmc_voltage_init(void)
43{
Simon Glassb0e6ef42014-12-10 08:55:57 -070044 struct udevice *dev;
Tom Warren190be1f2013-02-26 12:26:55 -070045 uchar reg, data_buffer[1];
Simon Glassb0e6ef42014-12-10 08:55:57 -070046 int ret;
Tom Warren190be1f2013-02-26 12:26:55 -070047 int i;
48
Simon Glassb0e6ef42014-12-10 08:55:57 -070049 ret = i2c_get_chip_for_busnum(0, PMU_I2C_ADDRESS, &dev);
50 if (ret) {
51 debug("%s: Cannot find PMIC I2C chip\n", __func__);
52 return;
53 }
Tom Warren190be1f2013-02-26 12:26:55 -070054
55 /* TPS659110: LDO5_REG = 3.3v, ACTIVE to SDMMC1 */
56 data_buffer[0] = 0x65;
57 reg = 0x32;
58
59 for (i = 0; i < MAX_I2C_RETRY; ++i) {
Simon Glassf9a4c2d2015-01-12 18:02:07 -070060 if (dm_i2c_write(dev, reg, data_buffer, 1))
Tom Warren190be1f2013-02-26 12:26:55 -070061 udelay(100);
62 }
63
64 /* TPS659110: GPIO7_REG = PDEN, output a 1 to EN_3V3_SYS */
65 data_buffer[0] = 0x09;
66 reg = 0x67;
67
68 for (i = 0; i < MAX_I2C_RETRY; ++i) {
Simon Glassf9a4c2d2015-01-12 18:02:07 -070069 if (dm_i2c_write(dev, reg, data_buffer, 1))
Tom Warren190be1f2013-02-26 12:26:55 -070070 udelay(100);
71 }
72}
73
74/*
75 * Routine: pin_mux_mmc
76 * Description: setup the MMC muxes, power rails, etc.
77 */
78void pin_mux_mmc(void)
79{
80 /*
81 * NOTE: We don't do mmc-specific pin muxes here.
82 * They were done globally in pinmux_init().
83 */
84
85 /* Bring up the SDIO1 power rail */
86 board_sdmmc_voltage_init();
87}
88#endif /* MMC */
Thierry Reding5a2c96a2014-12-09 22:25:17 -070089
90#ifdef CONFIG_PCI_TEGRA
91int tegra_pcie_board_init(void)
92{
93 struct udevice *dev;
94 u8 addr, data[1];
95 int err;
96
97 err = i2c_get_chip_for_busnum(0, PMU_I2C_ADDRESS, &dev);
98 if (err) {
99 debug("failed to find PMU bus\n");
100 return err;
101 }
102
103 /* TPS659110: LDO1_REG = 1.05V, ACTIVE */
104 data[0] = 0x15;
105 addr = 0x30;
106
Simon Glassf9a4c2d2015-01-12 18:02:07 -0700107 err = dm_i2c_write(dev, addr, data, 1);
Thierry Reding5a2c96a2014-12-09 22:25:17 -0700108 if (err) {
109 debug("failed to set VDD supply\n");
110 return err;
111 }
112
113 /* GPIO: PEX = 3.3V */
114 err = gpio_request(GPIO_PL7, "PEX");
115 if (err < 0)
116 return err;
117
118 gpio_direction_output(GPIO_PL7, 1);
119
120 /* TPS659110: LDO2_REG = 1.05V, ACTIVE */
121 data[0] = 0x15;
122 addr = 0x31;
123
Simon Glassf9a4c2d2015-01-12 18:02:07 -0700124 err = dm_i2c_write(dev, addr, data, 1);
Thierry Reding5a2c96a2014-12-09 22:25:17 -0700125 if (err) {
126 debug("failed to set AVDD supply\n");
127 return err;
128 }
129
130 return 0;
131}
132
133int board_eth_init(bd_t *bis)
134{
135 return pci_eth_init(bis);
136}
137#endif /* PCI */