Matt Porter | ea7b96b | 2013-03-15 10:07:10 +0000 | [diff] [blame] | 1 | /* |
| 2 | * evm.c |
| 3 | * |
| 4 | * Board functions for TI814x EVM |
| 5 | * |
| 6 | * Copyright (C) 2011, Texas Instruments, Incorporated - http://www.ti.com/ |
| 7 | * |
Wolfgang Denk | 1a45966 | 2013-07-08 09:37:19 +0200 | [diff] [blame] | 8 | * SPDX-License-Identifier: GPL-2.0+ |
Matt Porter | ea7b96b | 2013-03-15 10:07:10 +0000 | [diff] [blame] | 9 | */ |
| 10 | |
| 11 | #include <common.h> |
Matt Porter | cd87464 | 2013-03-20 05:38:14 +0000 | [diff] [blame] | 12 | #include <cpsw.h> |
Matt Porter | ea7b96b | 2013-03-15 10:07:10 +0000 | [diff] [blame] | 13 | #include <errno.h> |
| 14 | #include <spl.h> |
| 15 | #include <asm/arch/cpu.h> |
| 16 | #include <asm/arch/hardware.h> |
| 17 | #include <asm/arch/omap.h> |
| 18 | #include <asm/arch/ddr_defs.h> |
| 19 | #include <asm/arch/clock.h> |
| 20 | #include <asm/arch/gpio.h> |
| 21 | #include <asm/arch/mmc_host_def.h> |
| 22 | #include <asm/arch/sys_proto.h> |
| 23 | #include <asm/io.h> |
| 24 | #include <asm/emif.h> |
| 25 | #include <asm/gpio.h> |
| 26 | #include "evm.h" |
| 27 | |
| 28 | DECLARE_GLOBAL_DATA_PTR; |
| 29 | |
Matt Porter | cd87464 | 2013-03-20 05:38:14 +0000 | [diff] [blame] | 30 | static struct ctrl_dev *cdev = (struct ctrl_dev *)CTRL_DEVICE_BASE; |
| 31 | |
Matt Porter | ea7b96b | 2013-03-15 10:07:10 +0000 | [diff] [blame] | 32 | /* UART Defines */ |
| 33 | #ifdef CONFIG_SPL_BUILD |
Matt Porter | ea7b96b | 2013-03-15 10:07:10 +0000 | [diff] [blame] | 34 | static const struct cmd_control evm_ddr2_cctrl_data = { |
| 35 | .cmd0csratio = 0x80, |
| 36 | .cmd0dldiff = 0x04, |
| 37 | .cmd0iclkout = 0x00, |
| 38 | |
| 39 | .cmd1csratio = 0x80, |
| 40 | .cmd1dldiff = 0x04, |
| 41 | .cmd1iclkout = 0x00, |
| 42 | |
| 43 | .cmd2csratio = 0x80, |
| 44 | .cmd2dldiff = 0x04, |
| 45 | .cmd2iclkout = 0x00, |
| 46 | }; |
| 47 | |
| 48 | static const struct emif_regs evm_ddr2_emif0_regs = { |
| 49 | .sdram_config = 0x40801ab2, |
| 50 | .ref_ctrl = 0x10000c30, |
| 51 | .sdram_tim1 = 0x0aaaf552, |
| 52 | .sdram_tim2 = 0x043631d2, |
| 53 | .sdram_tim3 = 0x00000327, |
| 54 | .emif_ddr_phy_ctlr_1 = 0x00000007 |
| 55 | }; |
| 56 | |
| 57 | static const struct emif_regs evm_ddr2_emif1_regs = { |
| 58 | .sdram_config = 0x40801ab2, |
| 59 | .ref_ctrl = 0x10000c30, |
| 60 | .sdram_tim1 = 0x0aaaf552, |
| 61 | .sdram_tim2 = 0x043631d2, |
| 62 | .sdram_tim3 = 0x00000327, |
| 63 | .emif_ddr_phy_ctlr_1 = 0x00000007 |
| 64 | }; |
| 65 | |
| 66 | const struct dmm_lisa_map_regs evm_lisa_map_regs = { |
| 67 | .dmm_lisa_map_0 = 0x00000000, |
| 68 | .dmm_lisa_map_1 = 0x00000000, |
| 69 | .dmm_lisa_map_2 = 0x806c0300, |
| 70 | .dmm_lisa_map_3 = 0x806c0300, |
| 71 | }; |
| 72 | |
| 73 | static const struct ddr_data evm_ddr2_data = { |
| 74 | .datardsratio0 = ((0x35<<10) | (0x35<<0)), |
| 75 | .datawdsratio0 = ((0x20<<10) | (0x20<<0)), |
| 76 | .datawiratio0 = ((0<<10) | (0<<0)), |
| 77 | .datagiratio0 = ((0<<10) | (0<<0)), |
| 78 | .datafwsratio0 = ((0x90<<10) | (0x90<<0)), |
| 79 | .datawrsratio0 = ((0x50<<10) | (0x50<<0)), |
| 80 | .datauserank0delay = 1, |
| 81 | .datadldiff0 = 0x4, |
| 82 | }; |
Matt Porter | ea7b96b | 2013-03-15 10:07:10 +0000 | [diff] [blame] | 83 | |
Heiko Schocher | 0660481 | 2013-07-30 10:48:54 +0530 | [diff] [blame] | 84 | void set_uart_mux_conf(void) |
Matt Porter | ea7b96b | 2013-03-15 10:07:10 +0000 | [diff] [blame] | 85 | { |
Matt Porter | ea7b96b | 2013-03-15 10:07:10 +0000 | [diff] [blame] | 86 | /* Set UART pins */ |
| 87 | enable_uart0_pin_mux(); |
Heiko Schocher | 0660481 | 2013-07-30 10:48:54 +0530 | [diff] [blame] | 88 | } |
Matt Porter | ea7b96b | 2013-03-15 10:07:10 +0000 | [diff] [blame] | 89 | |
Heiko Schocher | 0660481 | 2013-07-30 10:48:54 +0530 | [diff] [blame] | 90 | void set_mux_conf_regs(void) |
| 91 | { |
Matt Porter | ea7b96b | 2013-03-15 10:07:10 +0000 | [diff] [blame] | 92 | /* Set MMC pins */ |
| 93 | enable_mmc1_pin_mux(); |
| 94 | |
Matt Porter | cd87464 | 2013-03-20 05:38:14 +0000 | [diff] [blame] | 95 | /* Set Ethernet pins */ |
| 96 | enable_enet_pin_mux(); |
Heiko Schocher | 0660481 | 2013-07-30 10:48:54 +0530 | [diff] [blame] | 97 | } |
Matt Porter | cd87464 | 2013-03-20 05:38:14 +0000 | [diff] [blame] | 98 | |
Heiko Schocher | 0660481 | 2013-07-30 10:48:54 +0530 | [diff] [blame] | 99 | void sdram_init(void) |
| 100 | { |
Matt Porter | ea7b96b | 2013-03-15 10:07:10 +0000 | [diff] [blame] | 101 | config_dmm(&evm_lisa_map_regs); |
| 102 | |
| 103 | config_ddr(0, 0, &evm_ddr2_data, &evm_ddr2_cctrl_data, |
| 104 | &evm_ddr2_emif0_regs, 0); |
| 105 | config_ddr(0, 0, &evm_ddr2_data, &evm_ddr2_cctrl_data, |
| 106 | &evm_ddr2_emif1_regs, 1); |
Matt Porter | ea7b96b | 2013-03-15 10:07:10 +0000 | [diff] [blame] | 107 | } |
Heiko Schocher | 0660481 | 2013-07-30 10:48:54 +0530 | [diff] [blame] | 108 | #endif |
Matt Porter | ea7b96b | 2013-03-15 10:07:10 +0000 | [diff] [blame] | 109 | |
| 110 | /* |
| 111 | * Basic board specific setup. Pinmux has been handled already. |
| 112 | */ |
| 113 | int board_init(void) |
| 114 | { |
Tom Rini | 73feefd | 2013-08-09 11:22:13 -0400 | [diff] [blame^] | 115 | gd->bd->bi_boot_params = CONFIG_SYS_SDRAM_BASE + 0x100; |
Matt Porter | ea7b96b | 2013-03-15 10:07:10 +0000 | [diff] [blame] | 116 | return 0; |
| 117 | } |
| 118 | |
| 119 | #if !defined(CONFIG_SPL_BUILD) && defined(CONFIG_GENERIC_MMC) |
| 120 | int board_mmc_init(bd_t *bis) |
| 121 | { |
| 122 | omap_mmc_init(1, 0, 0, -1, -1); |
| 123 | |
| 124 | return 0; |
| 125 | } |
| 126 | #endif |
Matt Porter | cd87464 | 2013-03-20 05:38:14 +0000 | [diff] [blame] | 127 | |
| 128 | #ifdef CONFIG_DRIVER_TI_CPSW |
| 129 | static void cpsw_control(int enabled) |
| 130 | { |
| 131 | /* VTP can be added here */ |
| 132 | |
| 133 | return; |
| 134 | } |
| 135 | |
| 136 | static struct cpsw_slave_data cpsw_slaves[] = { |
| 137 | { |
| 138 | .slave_reg_ofs = 0x50, |
| 139 | .sliver_reg_ofs = 0x700, |
| 140 | .phy_id = 1, |
| 141 | }, |
| 142 | { |
| 143 | .slave_reg_ofs = 0x90, |
| 144 | .sliver_reg_ofs = 0x740, |
| 145 | .phy_id = 0, |
| 146 | }, |
| 147 | }; |
| 148 | |
| 149 | static struct cpsw_platform_data cpsw_data = { |
| 150 | .mdio_base = CPSW_MDIO_BASE, |
| 151 | .cpsw_base = CPSW_BASE, |
| 152 | .mdio_div = 0xff, |
| 153 | .channels = 8, |
| 154 | .cpdma_reg_ofs = 0x100, |
| 155 | .slaves = 1, |
| 156 | .slave_data = cpsw_slaves, |
| 157 | .ale_reg_ofs = 0x600, |
| 158 | .ale_entries = 1024, |
| 159 | .host_port_reg_ofs = 0x28, |
| 160 | .hw_stats_reg_ofs = 0x400, |
Mugunthan V N | 2bf36ac | 2013-07-08 16:04:37 +0530 | [diff] [blame] | 161 | .bd_ram_ofs = 0x2000, |
Matt Porter | cd87464 | 2013-03-20 05:38:14 +0000 | [diff] [blame] | 162 | .mac_control = (1 << 5), |
| 163 | .control = cpsw_control, |
| 164 | .host_port_num = 0, |
| 165 | .version = CPSW_CTRL_VERSION_1, |
| 166 | }; |
| 167 | #endif |
| 168 | |
| 169 | int board_eth_init(bd_t *bis) |
| 170 | { |
| 171 | uint8_t mac_addr[6]; |
| 172 | uint32_t mac_hi, mac_lo; |
| 173 | |
| 174 | if (!eth_getenv_enetaddr("ethaddr", mac_addr)) { |
| 175 | printf("<ethaddr> not set. Reading from E-fuse\n"); |
| 176 | /* try reading mac address from efuse */ |
| 177 | mac_lo = readl(&cdev->macid0l); |
| 178 | mac_hi = readl(&cdev->macid0h); |
| 179 | mac_addr[0] = mac_hi & 0xFF; |
| 180 | mac_addr[1] = (mac_hi & 0xFF00) >> 8; |
| 181 | mac_addr[2] = (mac_hi & 0xFF0000) >> 16; |
| 182 | mac_addr[3] = (mac_hi & 0xFF000000) >> 24; |
| 183 | mac_addr[4] = mac_lo & 0xFF; |
| 184 | mac_addr[5] = (mac_lo & 0xFF00) >> 8; |
| 185 | |
| 186 | if (is_valid_ether_addr(mac_addr)) |
| 187 | eth_setenv_enetaddr("ethaddr", mac_addr); |
| 188 | else |
| 189 | printf("Unable to read MAC address. Set <ethaddr>\n"); |
| 190 | } |
| 191 | |
| 192 | return cpsw_register(&cpsw_data); |
| 193 | } |