blob: f51f17ec693f2ae01387df144c64361d9710b7a6 [file] [log] [blame]
wdenkc6097192002-11-03 00:24:07 +00001#
Wolfgang Denkeca3aeb2013-06-21 10:22:36 +02002# (C) Copyright 2000 - 2013
wdenkc6097192002-11-03 00:24:07 +00003# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
4#
Wolfgang Denkeca3aeb2013-06-21 10:22:36 +02005# SPDX-License-Identifier: GPL-2.0+
wdenkc6097192002-11-03 00:24:07 +00006#
7
8Summary:
9========
10
wdenk24ee89b2002-11-03 17:56:27 +000011This directory contains the source code for U-Boot, a boot loader for
wdenke86e5a02004-10-17 21:12:06 +000012Embedded boards based on PowerPC, ARM, MIPS and several other
13processors, which can be installed in a boot ROM and used to
14initialize and test the hardware or to download and run application
15code.
wdenkc6097192002-11-03 00:24:07 +000016
17The development of U-Boot is closely related to Linux: some parts of
wdenk24ee89b2002-11-03 17:56:27 +000018the source code originate in the Linux source tree, we have some
19header files in common, and special provision has been made to
wdenkc6097192002-11-03 00:24:07 +000020support booting of Linux images.
21
22Some attention has been paid to make this software easily
23configurable and extendable. For instance, all monitor commands are
24implemented with the same call interface, so that it's very easy to
25add new commands. Also, instead of permanently adding rarely used
26code (for instance hardware test utilities) to the monitor, you can
27load and run it dynamically.
28
29
30Status:
31=======
32
33In general, all boards for which a configuration option exists in the
wdenk24ee89b2002-11-03 17:56:27 +000034Makefile have been tested to some extent and can be considered
wdenkc6097192002-11-03 00:24:07 +000035"working". In fact, many of them are used in production systems.
36
wdenk24ee89b2002-11-03 17:56:27 +000037In case of problems see the CHANGELOG and CREDITS files to find out
Albert ARIBAUD27af9302013-09-11 15:52:51 +020038who contributed the specific port. The boards.cfg file lists board
Wolfgang Denk218ca722008-03-26 10:40:12 +010039maintainers.
wdenkc6097192002-11-03 00:24:07 +000040
Robert P. J. Dayadb9d852012-11-14 02:03:20 +000041Note: There is no CHANGELOG file in the actual U-Boot source tree;
42it can be created dynamically from the Git log using:
43
44 make CHANGELOG
45
wdenkc6097192002-11-03 00:24:07 +000046
47Where to get help:
48==================
49
wdenk24ee89b2002-11-03 17:56:27 +000050In case you have questions about, problems with or contributions for
51U-Boot you should send a message to the U-Boot mailing list at
Peter Tyser0c325652008-09-10 09:18:34 -050052<u-boot@lists.denx.de>. There is also an archive of previous traffic
53on the mailing list - please search the archive before asking FAQ's.
54Please see http://lists.denx.de/pipermail/u-boot and
55http://dir.gmane.org/gmane.comp.boot-loaders.u-boot
wdenkc6097192002-11-03 00:24:07 +000056
57
Wolfgang Denk218ca722008-03-26 10:40:12 +010058Where to get source code:
59=========================
60
61The U-Boot source code is maintained in the git repository at
62git://www.denx.de/git/u-boot.git ; you can browse it online at
63http://www.denx.de/cgi-bin/gitweb.cgi?p=u-boot.git;a=summary
64
65The "snapshot" links on this page allow you to download tarballs of
Marcel Ziswiler11ccc332008-07-09 08:17:15 +020066any version you might be interested in. Official releases are also
Wolfgang Denk218ca722008-03-26 10:40:12 +010067available for FTP download from the ftp://ftp.denx.de/pub/u-boot/
68directory.
69
Anatolij Gustschind4ee7112008-03-26 18:13:33 +010070Pre-built (and tested) images are available from
Wolfgang Denk218ca722008-03-26 10:40:12 +010071ftp://ftp.denx.de/pub/u-boot/images/
72
73
wdenkc6097192002-11-03 00:24:07 +000074Where we come from:
75===================
76
77- start from 8xxrom sources
wdenk24ee89b2002-11-03 17:56:27 +000078- create PPCBoot project (http://sourceforge.net/projects/ppcboot)
wdenkc6097192002-11-03 00:24:07 +000079- clean up code
80- make it easier to add custom boards
81- make it possible to add other [PowerPC] CPUs
82- extend functions, especially:
83 * Provide extended interface to Linux boot loader
84 * S-Record download
85 * network boot
Marcel Ziswiler11ccc332008-07-09 08:17:15 +020086 * PCMCIA / CompactFlash / ATA disk / SCSI ... boot
wdenk24ee89b2002-11-03 17:56:27 +000087- create ARMBoot project (http://sourceforge.net/projects/armboot)
wdenkc6097192002-11-03 00:24:07 +000088- add other CPU families (starting with ARM)
wdenk24ee89b2002-11-03 17:56:27 +000089- create U-Boot project (http://sourceforge.net/projects/u-boot)
Magnus Lilja0d28f342008-08-06 19:32:33 +020090- current project page: see http://www.denx.de/wiki/U-Boot
wdenk24ee89b2002-11-03 17:56:27 +000091
92
93Names and Spelling:
94===================
95
96The "official" name of this project is "Das U-Boot". The spelling
97"U-Boot" shall be used in all written text (documentation, comments
98in source files etc.). Example:
99
100 This is the README file for the U-Boot project.
101
102File names etc. shall be based on the string "u-boot". Examples:
103
104 include/asm-ppc/u-boot.h
105
106 #include <asm/u-boot.h>
107
108Variable names, preprocessor constants etc. shall be either based on
109the string "u_boot" or on "U_BOOT". Example:
110
111 U_BOOT_VERSION u_boot_logo
112 IH_OS_U_BOOT u_boot_hush_start
wdenkc6097192002-11-03 00:24:07 +0000113
114
wdenk93f19cc2002-12-17 17:55:09 +0000115Versioning:
116===========
117
Thomas Weber360d8832010-09-28 08:06:25 +0200118Starting with the release in October 2008, the names of the releases
119were changed from numerical release numbers without deeper meaning
120into a time stamp based numbering. Regular releases are identified by
121names consisting of the calendar year and month of the release date.
122Additional fields (if present) indicate release candidates or bug fix
123releases in "stable" maintenance trees.
wdenk93f19cc2002-12-17 17:55:09 +0000124
Thomas Weber360d8832010-09-28 08:06:25 +0200125Examples:
Wolfgang Denkc0f40852011-10-26 10:21:21 +0000126 U-Boot v2009.11 - Release November 2009
Thomas Weber360d8832010-09-28 08:06:25 +0200127 U-Boot v2009.11.1 - Release 1 in version November 2009 stable tree
128 U-Boot v2010.09-rc1 - Release candiate 1 for September 2010 release
wdenk93f19cc2002-12-17 17:55:09 +0000129
130
wdenkc6097192002-11-03 00:24:07 +0000131Directory Hierarchy:
132====================
133
Peter Tyser8d321b82010-04-12 22:28:21 -0500134/arch Architecture specific files
135 /arm Files generic to ARM architecture
136 /cpu CPU specific files
137 /arm720t Files specific to ARM 720 CPUs
138 /arm920t Files specific to ARM 920 CPUs
Andreas Bießmann6eb09212011-07-18 09:41:08 +0000139 /at91 Files specific to Atmel AT91RM9200 CPU
Wolfgang Denka9046b92010-06-13 17:48:15 +0200140 /imx Files specific to Freescale MC9328 i.MX CPUs
141 /s3c24x0 Files specific to Samsung S3C24X0 CPUs
Peter Tyser8d321b82010-04-12 22:28:21 -0500142 /arm926ejs Files specific to ARM 926 CPUs
143 /arm1136 Files specific to ARM 1136 CPUs
Peter Tyser8d321b82010-04-12 22:28:21 -0500144 /pxa Files specific to Intel XScale PXA CPUs
Peter Tyser8d321b82010-04-12 22:28:21 -0500145 /sa1100 Files specific to Intel StrongARM SA1100 CPUs
146 /lib Architecture specific library files
147 /avr32 Files generic to AVR32 architecture
148 /cpu CPU specific files
149 /lib Architecture specific library files
150 /blackfin Files generic to Analog Devices Blackfin architecture
151 /cpu CPU specific files
152 /lib Architecture specific library files
Peter Tyser8d321b82010-04-12 22:28:21 -0500153 /m68k Files generic to m68k architecture
154 /cpu CPU specific files
155 /mcf52x2 Files specific to Freescale ColdFire MCF52x2 CPUs
156 /mcf5227x Files specific to Freescale ColdFire MCF5227x CPUs
157 /mcf532x Files specific to Freescale ColdFire MCF5329 CPUs
158 /mcf5445x Files specific to Freescale ColdFire MCF5445x CPUs
159 /mcf547x_8x Files specific to Freescale ColdFire MCF547x_8x CPUs
160 /lib Architecture specific library files
161 /microblaze Files generic to microblaze architecture
162 /cpu CPU specific files
163 /lib Architecture specific library files
164 /mips Files generic to MIPS architecture
165 /cpu CPU specific files
Daniel Schwierzeck92bbd642011-07-27 13:22:39 +0200166 /mips32 Files specific to MIPS32 CPUs
Xiangfu Liu80421fc2011-10-12 12:24:06 +0800167 /xburst Files specific to Ingenic XBurst CPUs
Peter Tyser8d321b82010-04-12 22:28:21 -0500168 /lib Architecture specific library files
Macpaul Linafc1ce82011-10-19 20:41:11 +0000169 /nds32 Files generic to NDS32 architecture
170 /cpu CPU specific files
171 /n1213 Files specific to Andes Technology N1213 CPUs
172 /lib Architecture specific library files
Peter Tyser8d321b82010-04-12 22:28:21 -0500173 /nios2 Files generic to Altera NIOS2 architecture
174 /cpu CPU specific files
175 /lib Architecture specific library files
Robert P. J. Day33c77312013-09-15 18:34:15 -0400176 /openrisc Files generic to OpenRISC architecture
177 /cpu CPU specific files
178 /lib Architecture specific library files
Stefan Roesea47a12b2010-04-15 16:07:28 +0200179 /powerpc Files generic to PowerPC architecture
Peter Tyser8d321b82010-04-12 22:28:21 -0500180 /cpu CPU specific files
181 /74xx_7xx Files specific to Freescale MPC74xx and 7xx CPUs
182 /mpc5xx Files specific to Freescale MPC5xx CPUs
183 /mpc5xxx Files specific to Freescale MPC5xxx CPUs
184 /mpc8xx Files specific to Freescale MPC8xx CPUs
Peter Tyser8d321b82010-04-12 22:28:21 -0500185 /mpc824x Files specific to Freescale MPC824x CPUs
186 /mpc8260 Files specific to Freescale MPC8260 CPUs
187 /mpc85xx Files specific to Freescale MPC85xx CPUs
188 /ppc4xx Files specific to AMCC PowerPC 4xx CPUs
189 /lib Architecture specific library files
190 /sh Files generic to SH architecture
191 /cpu CPU specific files
192 /sh2 Files specific to sh2 CPUs
193 /sh3 Files specific to sh3 CPUs
194 /sh4 Files specific to sh4 CPUs
195 /lib Architecture specific library files
196 /sparc Files generic to SPARC architecture
197 /cpu CPU specific files
198 /leon2 Files specific to Gaisler LEON2 SPARC CPU
199 /leon3 Files specific to Gaisler LEON3 SPARC CPU
200 /lib Architecture specific library files
Robert P. J. Day33c77312013-09-15 18:34:15 -0400201 /x86 Files generic to x86 architecture
202 /cpu CPU specific files
203 /lib Architecture specific library files
Peter Tyser8d321b82010-04-12 22:28:21 -0500204/api Machine/arch independent API for external apps
205/board Board dependent files
206/common Misc architecture independent functions
207/disk Code for disk drive partition handling
208/doc Documentation (don't expect too much)
209/drivers Commonly used device drivers
Robert P. J. Day33c77312013-09-15 18:34:15 -0400210/dts Contains Makefile for building internal U-Boot fdt.
Peter Tyser8d321b82010-04-12 22:28:21 -0500211/examples Example code for standalone applications, etc.
212/fs Filesystem code (cramfs, ext2, jffs2, etc.)
213/include Header Files
214/lib Files generic to all architectures
215 /libfdt Library files to support flattened device trees
216 /lzma Library files to support LZMA decompression
217 /lzo Library files to support LZO decompression
218/net Networking code
219/post Power On Self Test
Robert P. J. Day33c77312013-09-15 18:34:15 -0400220/spl Secondary Program Loader framework
Peter Tyser8d321b82010-04-12 22:28:21 -0500221/tools Tools to build S-Record or U-Boot images, etc.
wdenkc6097192002-11-03 00:24:07 +0000222
wdenkc6097192002-11-03 00:24:07 +0000223Software Configuration:
224=======================
225
226Configuration is usually done using C preprocessor defines; the
227rationale behind that is to avoid dead code whenever possible.
228
229There are two classes of configuration variables:
230
231* Configuration _OPTIONS_:
232 These are selectable by the user and have names beginning with
233 "CONFIG_".
234
235* Configuration _SETTINGS_:
236 These depend on the hardware etc. and should not be meddled with if
237 you don't know what you're doing; they have names beginning with
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200238 "CONFIG_SYS_".
wdenkc6097192002-11-03 00:24:07 +0000239
240Later we will add a configuration tool - probably similar to or even
241identical to what's used for the Linux kernel. Right now, we have to
242do the configuration by hand, which means creating some symbolic
243links and editing some configuration files. We use the TQM8xxL boards
244as an example here.
245
246
247Selection of Processor Architecture and Board Type:
248---------------------------------------------------
249
250For all supported boards there are ready-to-use default
251configurations available; just type "make <board_name>_config".
252
253Example: For a TQM823L module type:
254
255 cd u-boot
256 make TQM823L_config
257
Marcel Ziswiler11ccc332008-07-09 08:17:15 +0200258For the Cogent platform, you need to specify the CPU type as well;
wdenkc6097192002-11-03 00:24:07 +0000259e.g. "make cogent_mpc8xx_config". And also configure the cogent
260directory according to the instructions in cogent/README.
261
262
263Configuration Options:
264----------------------
265
266Configuration depends on the combination of board and CPU type; all
267such information is kept in a configuration file
268"include/configs/<board_name>.h".
269
270Example: For a TQM823L module, all configuration settings are in
271"include/configs/TQM823L.h".
272
273
wdenk7f6c2cb2002-11-10 22:06:23 +0000274Many of the options are named exactly as the corresponding Linux
275kernel configuration options. The intention is to make it easier to
276build a config tool - later.
277
278
wdenkc6097192002-11-03 00:24:07 +0000279The following options need to be configured:
280
Kim Phillips26281142007-08-10 13:28:25 -0500281- CPU Type: Define exactly one, e.g. CONFIG_MPC85XX.
wdenkc6097192002-11-03 00:24:07 +0000282
Kim Phillips26281142007-08-10 13:28:25 -0500283- Board Type: Define exactly one, e.g. CONFIG_MPC8540ADS.
Wolfgang Denk6ccec442006-10-24 14:42:37 +0200284
285- CPU Daughterboard Type: (if CONFIG_ATSTK1000 is defined)
Haavard Skinnemoen09ea0de2007-11-01 12:44:20 +0100286 Define exactly one, e.g. CONFIG_ATSTK1002
wdenkc6097192002-11-03 00:24:07 +0000287
288- CPU Module Type: (if CONFIG_COGENT is defined)
289 Define exactly one of
290 CONFIG_CMA286_60_OLD
291--- FIXME --- not tested yet:
292 CONFIG_CMA286_60, CONFIG_CMA286_21, CONFIG_CMA286_60P,
293 CONFIG_CMA287_23, CONFIG_CMA287_50
294
295- Motherboard Type: (if CONFIG_COGENT is defined)
296 Define exactly one of
297 CONFIG_CMA101, CONFIG_CMA102
298
299- Motherboard I/O Modules: (if CONFIG_COGENT is defined)
300 Define one or more of
301 CONFIG_CMA302
302
303- Motherboard Options: (if CONFIG_CMA101 or CONFIG_CMA102 are defined)
304 Define one or more of
305 CONFIG_LCD_HEARTBEAT - update a character position on
Marcel Ziswiler11ccc332008-07-09 08:17:15 +0200306 the LCD display every second with
wdenkc6097192002-11-03 00:24:07 +0000307 a "rotator" |\-/|\-/
308
wdenk2535d602003-07-17 23:16:40 +0000309- Board flavour: (if CONFIG_MPC8260ADS is defined)
310 CONFIG_ADSTYPE
311 Possible values are:
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200312 CONFIG_SYS_8260ADS - original MPC8260ADS
313 CONFIG_SYS_8266ADS - MPC8266ADS
314 CONFIG_SYS_PQ2FADS - PQ2FADS-ZU or PQ2FADS-VR
315 CONFIG_SYS_8272ADS - MPC8272ADS
wdenk2535d602003-07-17 23:16:40 +0000316
Lei Wencf946c62011-02-09 18:06:58 +0530317- Marvell Family Member
318 CONFIG_SYS_MVFS - define it if you want to enable
319 multiple fs option at one time
320 for marvell soc family
321
wdenkc6097192002-11-03 00:24:07 +0000322- MPC824X Family Member (if CONFIG_MPC824X is defined)
wdenk5da627a2003-10-09 20:09:04 +0000323 Define exactly one of
324 CONFIG_MPC8240, CONFIG_MPC8245
wdenkc6097192002-11-03 00:24:07 +0000325
Marcel Ziswiler11ccc332008-07-09 08:17:15 +0200326- 8xx CPU Options: (if using an MPC8xx CPU)
wdenk66ca92a2004-09-28 17:59:53 +0000327 CONFIG_8xx_GCLK_FREQ - deprecated: CPU clock if
328 get_gclk_freq() cannot work
wdenk5da627a2003-10-09 20:09:04 +0000329 e.g. if there is no 32KHz
330 reference PIT/RTC clock
wdenk66ca92a2004-09-28 17:59:53 +0000331 CONFIG_8xx_OSCLK - PLL input clock (either EXTCLK
332 or XTAL/EXTAL)
wdenkc6097192002-11-03 00:24:07 +0000333
wdenk66ca92a2004-09-28 17:59:53 +0000334- 859/866/885 CPU options: (if using a MPC859 or MPC866 or MPC885 CPU):
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200335 CONFIG_SYS_8xx_CPUCLK_MIN
336 CONFIG_SYS_8xx_CPUCLK_MAX
wdenk66ca92a2004-09-28 17:59:53 +0000337 CONFIG_8xx_CPUCLK_DEFAULT
wdenk75d1ea72004-01-31 20:06:54 +0000338 See doc/README.MPC866
339
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200340 CONFIG_SYS_MEASURE_CPUCLK
wdenk75d1ea72004-01-31 20:06:54 +0000341
wdenkba56f622004-02-06 23:19:44 +0000342 Define this to measure the actual CPU clock instead
343 of relying on the correctness of the configured
344 values. Mostly useful for board bringup to make sure
345 the PLL is locked at the intended frequency. Note
346 that this requires a (stable) reference clock (32 kHz
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200347 RTC clock or CONFIG_SYS_8XX_XIN)
wdenk75d1ea72004-01-31 20:06:54 +0000348
Heiko Schocher506f3912009-03-12 07:37:15 +0100349 CONFIG_SYS_DELAYED_ICACHE
350
351 Define this option if you want to enable the
352 ICache only when Code runs from RAM.
353
Kumar Gala66412c62011-02-18 05:40:54 -0600354- 85xx CPU Options:
York Sunffd06e02012-10-08 07:44:30 +0000355 CONFIG_SYS_PPC64
356
357 Specifies that the core is a 64-bit PowerPC implementation (implements
358 the "64" category of the Power ISA). This is necessary for ePAPR
359 compliance, among other possible reasons.
360
Kumar Gala66412c62011-02-18 05:40:54 -0600361 CONFIG_SYS_FSL_TBCLK_DIV
362
363 Defines the core time base clock divider ratio compared to the
364 system clock. On most PQ3 devices this is 8, on newer QorIQ
365 devices it can be 16 or 32. The ratio varies from SoC to Soc.
366
Kumar Gala8f290842011-05-20 00:39:21 -0500367 CONFIG_SYS_FSL_PCIE_COMPAT
368
369 Defines the string to utilize when trying to match PCIe device
370 tree nodes for the given platform.
371
Prabhakar Kushwahaafa6b552012-04-29 23:56:13 +0000372 CONFIG_SYS_PPC_E500_DEBUG_TLB
373
374 Enables a temporary TLB entry to be used during boot to work
375 around limitations in e500v1 and e500v2 external debugger
376 support. This reduces the portions of the boot code where
377 breakpoints and single stepping do not work. The value of this
378 symbol should be set to the TLB1 entry to be used for this
379 purpose.
380
Scott Wood33eee332012-08-14 10:14:53 +0000381 CONFIG_SYS_FSL_ERRATUM_A004510
382
383 Enables a workaround for erratum A004510. If set,
384 then CONFIG_SYS_FSL_ERRATUM_A004510_SVR_REV and
385 CONFIG_SYS_FSL_CORENET_SNOOPVEC_COREONLY must be set.
386
387 CONFIG_SYS_FSL_ERRATUM_A004510_SVR_REV
388 CONFIG_SYS_FSL_ERRATUM_A004510_SVR_REV2 (optional)
389
390 Defines one or two SoC revisions (low 8 bits of SVR)
391 for which the A004510 workaround should be applied.
392
393 The rest of SVR is either not relevant to the decision
394 of whether the erratum is present (e.g. p2040 versus
395 p2041) or is implied by the build target, which controls
396 whether CONFIG_SYS_FSL_ERRATUM_A004510 is set.
397
398 See Freescale App Note 4493 for more information about
399 this erratum.
400
Prabhakar Kushwaha74fa22e2013-04-16 13:27:44 +0530401 CONFIG_A003399_NOR_WORKAROUND
402 Enables a workaround for IFC erratum A003399. It is only
403 requred during NOR boot.
404
Scott Wood33eee332012-08-14 10:14:53 +0000405 CONFIG_SYS_FSL_CORENET_SNOOPVEC_COREONLY
406
407 This is the value to write into CCSR offset 0x18600
408 according to the A004510 workaround.
409
Priyanka Jain64501c62013-07-02 09:21:04 +0530410 CONFIG_SYS_FSL_DSP_DDR_ADDR
411 This value denotes start offset of DDR memory which is
412 connected exclusively to the DSP cores.
413
Priyanka Jain765b0bd2013-04-04 09:31:54 +0530414 CONFIG_SYS_FSL_DSP_M2_RAM_ADDR
415 This value denotes start offset of M2 memory
416 which is directly connected to the DSP core.
417
Priyanka Jain64501c62013-07-02 09:21:04 +0530418 CONFIG_SYS_FSL_DSP_M3_RAM_ADDR
419 This value denotes start offset of M3 memory which is directly
420 connected to the DSP core.
421
Priyanka Jain765b0bd2013-04-04 09:31:54 +0530422 CONFIG_SYS_FSL_DSP_CCSRBAR_DEFAULT
423 This value denotes start offset of DSP CCSR space.
424
Priyanka Jainb1359912013-12-17 14:25:52 +0530425 CONFIG_SYS_FSL_SINGLE_SOURCE_CLK
426 Single Source Clock is clocking mode present in some of FSL SoC's.
427 In this mode, a single differential clock is used to supply
428 clocks to the sysclock, ddrclock and usbclock.
429
Daniel Schwierzeck6cb461b2012-04-02 02:57:56 +0000430- Generic CPU options:
431 CONFIG_SYS_BIG_ENDIAN, CONFIG_SYS_LITTLE_ENDIAN
432
433 Defines the endianess of the CPU. Implementation of those
434 values is arch specific.
435
York Sun5614e712013-09-30 09:22:09 -0700436 CONFIG_SYS_FSL_DDR
437 Freescale DDR driver in use. This type of DDR controller is
438 found in mpc83xx, mpc85xx, mpc86xx as well as some ARM core
439 SoCs.
440
441 CONFIG_SYS_FSL_DDR_ADDR
442 Freescale DDR memory-mapped register base.
443
444 CONFIG_SYS_FSL_DDR_EMU
445 Specify emulator support for DDR. Some DDR features such as
446 deskew training are not available.
447
448 CONFIG_SYS_FSL_DDRC_GEN1
449 Freescale DDR1 controller.
450
451 CONFIG_SYS_FSL_DDRC_GEN2
452 Freescale DDR2 controller.
453
454 CONFIG_SYS_FSL_DDRC_GEN3
455 Freescale DDR3 controller.
456
York Sun9ac4ffb2013-09-30 14:20:51 -0700457 CONFIG_SYS_FSL_DDRC_ARM_GEN3
458 Freescale DDR3 controller for ARM-based SoCs.
459
York Sun5614e712013-09-30 09:22:09 -0700460 CONFIG_SYS_FSL_DDR1
461 Board config to use DDR1. It can be enabled for SoCs with
462 Freescale DDR1 or DDR2 controllers, depending on the board
463 implemetation.
464
465 CONFIG_SYS_FSL_DDR2
466 Board config to use DDR2. It can be eanbeld for SoCs with
467 Freescale DDR2 or DDR3 controllers, depending on the board
468 implementation.
469
470 CONFIG_SYS_FSL_DDR3
471 Board config to use DDR3. It can be enabled for SoCs with
472 Freescale DDR3 controllers.
473
Prabhakar Kushwaha1b4175d2014-01-18 12:28:30 +0530474 CONFIG_SYS_FSL_IFC_BE
475 Defines the IFC controller register space as Big Endian
476
477 CONFIG_SYS_FSL_IFC_LE
478 Defines the IFC controller register space as Little Endian
479
Prabhakar Kushwaha690e4252014-01-13 11:28:04 +0530480 CONFIG_SYS_FSL_PBL_PBI
481 It enables addition of RCW (Power on reset configuration) in built image.
482 Please refer doc/README.pblimage for more details
483
484 CONFIG_SYS_FSL_PBL_RCW
485 It adds PBI(pre-boot instructions) commands in u-boot build image.
486 PBI commands can be used to configure SoC before it starts the execution.
487 Please refer doc/README.pblimage for more details
488
York Sun4e5b1bd2014-02-10 13:59:42 -0800489 CONFIG_SYS_FSL_DDR_BE
490 Defines the DDR controller register space as Big Endian
491
492 CONFIG_SYS_FSL_DDR_LE
493 Defines the DDR controller register space as Little Endian
494
York Sun6b9e3092014-02-10 13:59:43 -0800495 CONFIG_SYS_FSL_DDR_SDRAM_BASE_PHY
496 Physical address from the view of DDR controllers. It is the
497 same as CONFIG_SYS_DDR_SDRAM_BASE for all Power SoCs. But
498 it could be different for ARM SoCs.
499
York Sun6b1e1252014-02-10 13:59:44 -0800500 CONFIG_SYS_FSL_DDR_INTLV_256B
501 DDR controller interleaving on 256-byte. This is a special
502 interleaving mode, handled by Dickens for Freescale layerscape
503 SoCs with ARM core.
504
Markus Klotzbuecher0b953ff2006-03-24 15:28:02 +0100505- Intel Monahans options:
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200506 CONFIG_SYS_MONAHANS_RUN_MODE_OSC_RATIO
Markus Klotzbuecher0b953ff2006-03-24 15:28:02 +0100507
508 Defines the Monahans run mode to oscillator
509 ratio. Valid values are 8, 16, 24, 31. The core
510 frequency is this value multiplied by 13 MHz.
511
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200512 CONFIG_SYS_MONAHANS_TURBO_RUN_MODE_RATIO
Wolfgang Denkcf48eb92006-04-16 10:51:58 +0200513
Markus Klotzbuecher0b953ff2006-03-24 15:28:02 +0100514 Defines the Monahans turbo mode to oscillator
515 ratio. Valid values are 1 (default if undefined) and
Wolfgang Denkcf48eb92006-04-16 10:51:58 +0200516 2. The core frequency as calculated above is multiplied
Markus Klotzbuecher0b953ff2006-03-24 15:28:02 +0100517 by this value.
Wolfgang Denkcf48eb92006-04-16 10:51:58 +0200518
Daniel Schwierzeck92bbd642011-07-27 13:22:39 +0200519- MIPS CPU options:
520 CONFIG_SYS_INIT_SP_OFFSET
521
522 Offset relative to CONFIG_SYS_SDRAM_BASE for initial stack
523 pointer. This is needed for the temporary stack before
524 relocation.
525
526 CONFIG_SYS_MIPS_CACHE_MODE
527
528 Cache operation mode for the MIPS CPU.
529 See also arch/mips/include/asm/mipsregs.h.
530 Possible values are:
531 CONF_CM_CACHABLE_NO_WA
532 CONF_CM_CACHABLE_WA
533 CONF_CM_UNCACHED
534 CONF_CM_CACHABLE_NONCOHERENT
535 CONF_CM_CACHABLE_CE
536 CONF_CM_CACHABLE_COW
537 CONF_CM_CACHABLE_CUW
538 CONF_CM_CACHABLE_ACCELERATED
539
540 CONFIG_SYS_XWAY_EBU_BOOTCFG
541
542 Special option for Lantiq XWAY SoCs for booting from NOR flash.
543 See also arch/mips/cpu/mips32/start.S.
544
545 CONFIG_XWAY_SWAP_BYTES
546
547 Enable compilation of tools/xway-swap-bytes needed for Lantiq
548 XWAY SoCs for booting from NOR flash. The U-Boot image needs to
549 be swapped if a flash programmer is used.
550
Christian Rieschb67d8812012-02-02 00:44:39 +0000551- ARM options:
552 CONFIG_SYS_EXCEPTION_VECTORS_HIGH
553
554 Select high exception vectors of the ARM core, e.g., do not
555 clear the V bit of the c1 register of CP15.
556
Aneesh V5356f542012-03-08 07:20:19 +0000557 CONFIG_SYS_THUMB_BUILD
558
559 Use this flag to build U-Boot using the Thumb instruction
560 set for ARM architectures. Thumb instruction set provides
561 better code density. For ARM architectures that support
562 Thumb2 this flag will result in Thumb2 code generated by
563 GCC.
564
Stephen Warrenc5d47522013-03-04 13:29:40 +0000565 CONFIG_ARM_ERRATA_716044
Stephen Warren06785872013-02-26 12:28:27 +0000566 CONFIG_ARM_ERRATA_742230
567 CONFIG_ARM_ERRATA_743622
568 CONFIG_ARM_ERRATA_751472
569
570 If set, the workarounds for these ARM errata are applied early
571 during U-Boot startup. Note that these options force the
572 workarounds to be applied; no CPU-type/version detection
573 exists, unlike the similar options in the Linux kernel. Do not
574 set these options unless they apply!
575
Stephen Warren795659d2013-03-27 17:06:41 +0000576- CPU timer options:
577 CONFIG_SYS_HZ
578
579 The frequency of the timer returned by get_timer().
580 get_timer() must operate in milliseconds and this CONFIG
581 option must be set to 1000.
582
wdenk5da627a2003-10-09 20:09:04 +0000583- Linux Kernel Interface:
wdenkc6097192002-11-03 00:24:07 +0000584 CONFIG_CLOCKS_IN_MHZ
585
586 U-Boot stores all clock information in Hz
587 internally. For binary compatibility with older Linux
588 kernels (which expect the clocks passed in the
589 bd_info data to be in MHz) the environment variable
590 "clocks_in_mhz" can be defined so that U-Boot
591 converts clock data to MHZ before passing it to the
592 Linux kernel.
wdenkc6097192002-11-03 00:24:07 +0000593 When CONFIG_CLOCKS_IN_MHZ is defined, a definition of
Wolfgang Denk218ca722008-03-26 10:40:12 +0100594 "clocks_in_mhz=1" is automatically included in the
wdenkc6097192002-11-03 00:24:07 +0000595 default environment.
596
wdenk5da627a2003-10-09 20:09:04 +0000597 CONFIG_MEMSIZE_IN_BYTES [relevant for MIPS only]
598
Marcel Ziswiler11ccc332008-07-09 08:17:15 +0200599 When transferring memsize parameter to linux, some versions
wdenk5da627a2003-10-09 20:09:04 +0000600 expect it to be in bytes, others in MB.
601 Define CONFIG_MEMSIZE_IN_BYTES to make it in bytes.
602
Gerald Van Barenfec6d9e2008-06-03 20:34:45 -0400603 CONFIG_OF_LIBFDT
Wolfgang Denkf57f70a2005-10-13 01:45:54 +0200604
605 New kernel versions are expecting firmware settings to be
Gerald Van Baren213bf8c2007-03-31 12:23:51 -0400606 passed using flattened device trees (based on open firmware
607 concepts).
608
609 CONFIG_OF_LIBFDT
610 * New libfdt-based support
611 * Adds the "fdt" command
Kim Phillips3bb342f2007-08-10 14:34:14 -0500612 * The bootm command automatically updates the fdt
Gerald Van Baren213bf8c2007-03-31 12:23:51 -0400613
Marcel Ziswilerb55ae402009-09-09 21:18:41 +0200614 OF_CPU - The proper name of the cpus node (only required for
615 MPC512X and MPC5xxx based boards).
616 OF_SOC - The proper name of the soc node (only required for
617 MPC512X and MPC5xxx based boards).
Wolfgang Denkf57f70a2005-10-13 01:45:54 +0200618 OF_TBCLK - The timebase frequency.
Kumar Galac2871f02006-01-11 13:59:02 -0600619 OF_STDOUT_PATH - The path to the console device
Wolfgang Denkf57f70a2005-10-13 01:45:54 +0200620
Marcel Ziswiler11ccc332008-07-09 08:17:15 +0200621 boards with QUICC Engines require OF_QE to set UCC MAC
622 addresses
Kim Phillips3bb342f2007-08-10 14:34:14 -0500623
Kumar Gala4e253132006-01-11 13:54:17 -0600624 CONFIG_OF_BOARD_SETUP
625
626 Board code has addition modification that it wants to make
627 to the flat device tree before handing it off to the kernel
wdenk6705d812004-08-02 23:22:59 +0000628
Matthew McClintock02677682006-06-28 10:41:37 -0500629 CONFIG_OF_BOOT_CPU
630
Marcel Ziswiler11ccc332008-07-09 08:17:15 +0200631 This define fills in the correct boot CPU in the boot
Matthew McClintock02677682006-06-28 10:41:37 -0500632 param header, the default value is zero if undefined.
633
Heiko Schocher3887c3f2009-09-23 07:56:08 +0200634 CONFIG_OF_IDE_FIXUP
635
636 U-Boot can detect if an IDE device is present or not.
637 If not, and this new config option is activated, U-Boot
638 removes the ATA node from the DTS before booting Linux,
639 so the Linux IDE driver does not probe the device and
640 crash. This is needed for buggy hardware (uc101) where
641 no pull down resistor is connected to the signal IDE5V_DD7.
642
Igor Grinberg7eb29392011-07-14 05:45:07 +0000643 CONFIG_MACH_TYPE [relevant for ARM only][mandatory]
644
645 This setting is mandatory for all boards that have only one
646 machine type and must be used to specify the machine type
647 number as it appears in the ARM machine registry
648 (see http://www.arm.linux.org.uk/developer/machines/).
649 Only boards that have multiple machine types supported
650 in a single configuration file and the machine type is
651 runtime discoverable, do not have to use this setting.
652
Niklaus Giger0b2f4ec2008-11-03 22:13:47 +0100653- vxWorks boot parameters:
654
655 bootvx constructs a valid bootline using the following
656 environments variables: bootfile, ipaddr, serverip, hostname.
657 It loads the vxWorks image pointed bootfile.
658
659 CONFIG_SYS_VXWORKS_BOOT_DEVICE - The vxworks device name
660 CONFIG_SYS_VXWORKS_MAC_PTR - Ethernet 6 byte MA -address
661 CONFIG_SYS_VXWORKS_SERVERNAME - Name of the server
662 CONFIG_SYS_VXWORKS_BOOT_ADDR - Address of boot parameters
663
664 CONFIG_SYS_VXWORKS_ADD_PARAMS
665
666 Add it at the end of the bootline. E.g "u=username pw=secret"
667
668 Note: If a "bootargs" environment is defined, it will overwride
669 the defaults discussed just above.
670
Aneesh V2c451f72011-06-16 23:30:47 +0000671- Cache Configuration:
672 CONFIG_SYS_ICACHE_OFF - Do not enable instruction cache in U-Boot
673 CONFIG_SYS_DCACHE_OFF - Do not enable data cache in U-Boot
674 CONFIG_SYS_L2CACHE_OFF- Do not enable L2 cache in U-Boot
675
Aneesh V93bc2192011-06-16 23:30:51 +0000676- Cache Configuration for ARM:
677 CONFIG_SYS_L2_PL310 - Enable support for ARM PL310 L2 cache
678 controller
679 CONFIG_SYS_PL310_BASE - Physical base address of PL310
680 controller register space
681
wdenk6705d812004-08-02 23:22:59 +0000682- Serial Ports:
Andreas Engel48d01922008-09-08 14:30:53 +0200683 CONFIG_PL010_SERIAL
wdenk6705d812004-08-02 23:22:59 +0000684
685 Define this if you want support for Amba PrimeCell PL010 UARTs.
686
Andreas Engel48d01922008-09-08 14:30:53 +0200687 CONFIG_PL011_SERIAL
wdenk6705d812004-08-02 23:22:59 +0000688
689 Define this if you want support for Amba PrimeCell PL011 UARTs.
690
691 CONFIG_PL011_CLOCK
692
693 If you have Amba PrimeCell PL011 UARTs, set this variable to
694 the clock speed of the UARTs.
695
696 CONFIG_PL01x_PORTS
697
698 If you have Amba PrimeCell PL010 or PL011 UARTs on your board,
699 define this to a list of base addresses for each (supported)
700 port. See e.g. include/configs/versatile.h
701
John Rigby910f1ae2011-04-19 10:42:39 +0000702 CONFIG_PL011_SERIAL_RLCR
703
704 Some vendor versions of PL011 serial ports (e.g. ST-Ericsson U8500)
705 have separate receive and transmit line control registers. Set
706 this variable to initialize the extra register.
707
708 CONFIG_PL011_SERIAL_FLUSH_ON_INIT
709
710 On some platforms (e.g. U8500) U-Boot is loaded by a second stage
711 boot loader that has already initialized the UART. Define this
712 variable to flush the UART at init time.
713
wdenk6705d812004-08-02 23:22:59 +0000714
wdenkc6097192002-11-03 00:24:07 +0000715- Console Interface:
wdenk43d96162003-03-06 00:02:04 +0000716 Depending on board, define exactly one serial port
717 (like CONFIG_8xx_CONS_SMC1, CONFIG_8xx_CONS_SMC2,
718 CONFIG_8xx_CONS_SCC1, ...), or switch off the serial
719 console by defining CONFIG_8xx_CONS_NONE
wdenkc6097192002-11-03 00:24:07 +0000720
721 Note: if CONFIG_8xx_CONS_NONE is defined, the serial
722 port routines must be defined elsewhere
723 (i.e. serial_init(), serial_getc(), ...)
724
725 CONFIG_CFB_CONSOLE
726 Enables console device for a color framebuffer. Needs following
Wolfgang Denkc53043b2011-12-07 12:19:20 +0000727 defines (cf. smiLynxEM, i8042)
wdenkc6097192002-11-03 00:24:07 +0000728 VIDEO_FB_LITTLE_ENDIAN graphic memory organisation
729 (default big endian)
730 VIDEO_HW_RECTFILL graphic chip supports
731 rectangle fill
732 (cf. smiLynxEM)
733 VIDEO_HW_BITBLT graphic chip supports
734 bit-blit (cf. smiLynxEM)
735 VIDEO_VISIBLE_COLS visible pixel columns
736 (cols=pitch)
wdenkba56f622004-02-06 23:19:44 +0000737 VIDEO_VISIBLE_ROWS visible pixel rows
738 VIDEO_PIXEL_SIZE bytes per pixel
wdenkc6097192002-11-03 00:24:07 +0000739 VIDEO_DATA_FORMAT graphic data format
740 (0-5, cf. cfb_console.c)
wdenkba56f622004-02-06 23:19:44 +0000741 VIDEO_FB_ADRS framebuffer address
wdenkc6097192002-11-03 00:24:07 +0000742 VIDEO_KBD_INIT_FCT keyboard int fct
743 (i.e. i8042_kbd_init())
744 VIDEO_TSTC_FCT test char fct
745 (i.e. i8042_tstc)
746 VIDEO_GETC_FCT get char fct
747 (i.e. i8042_getc)
748 CONFIG_CONSOLE_CURSOR cursor drawing on/off
749 (requires blink timer
750 cf. i8042.c)
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200751 CONFIG_SYS_CONSOLE_BLINK_COUNT blink interval (cf. i8042.c)
wdenkc6097192002-11-03 00:24:07 +0000752 CONFIG_CONSOLE_TIME display time/date info in
753 upper right corner
Jon Loeliger602ad3b2007-06-11 19:03:39 -0500754 (requires CONFIG_CMD_DATE)
wdenkc6097192002-11-03 00:24:07 +0000755 CONFIG_VIDEO_LOGO display Linux logo in
756 upper left corner
wdenka6c7ad22002-12-03 21:28:10 +0000757 CONFIG_VIDEO_BMP_LOGO use bmp_logo.h instead of
758 linux_logo.h for logo.
759 Requires CONFIG_VIDEO_LOGO
wdenkc6097192002-11-03 00:24:07 +0000760 CONFIG_CONSOLE_EXTRA_INFO
Marcel Ziswiler11ccc332008-07-09 08:17:15 +0200761 additional board info beside
wdenkc6097192002-11-03 00:24:07 +0000762 the logo
763
Pali Rohár33a35bb2012-10-19 13:30:09 +0000764 When CONFIG_CFB_CONSOLE_ANSI is defined, console will support
765 a limited number of ANSI escape sequences (cursor control,
766 erase functions and limited graphics rendition control).
767
wdenk43d96162003-03-06 00:02:04 +0000768 When CONFIG_CFB_CONSOLE is defined, video console is
769 default i/o. Serial console can be forced with
770 environment 'console=serial'.
wdenkc6097192002-11-03 00:24:07 +0000771
wdenkd4ca31c2004-01-02 14:00:00 +0000772 When CONFIG_SILENT_CONSOLE is defined, all console
773 messages (by U-Boot and Linux!) can be silenced with
774 the "silent" environment variable. See
775 doc/README.silent for more information.
wdenka3ad8e22003-10-19 23:22:11 +0000776
Heiko Schocher45ae2542013-10-22 11:06:06 +0200777 CONFIG_SYS_CONSOLE_BG_COL: define the backgroundcolor, default
778 is 0x00.
779 CONFIG_SYS_CONSOLE_FG_COL: define the foregroundcolor, default
780 is 0xa0.
781
wdenkc6097192002-11-03 00:24:07 +0000782- Console Baudrate:
783 CONFIG_BAUDRATE - in bps
784 Select one of the baudrates listed in
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200785 CONFIG_SYS_BAUDRATE_TABLE, see below.
786 CONFIG_SYS_BRGCLK_PRESCALE, baudrate prescale
wdenkc6097192002-11-03 00:24:07 +0000787
Heiko Schocherc92fac92009-01-30 12:55:38 +0100788- Console Rx buffer length
789 With CONFIG_SYS_SMC_RXBUFLEN it is possible to define
790 the maximum receive buffer length for the SMC.
Heiko Schocher2b3f12c2009-02-10 09:31:47 +0100791 This option is actual only for 82xx and 8xx possible.
Heiko Schocherc92fac92009-01-30 12:55:38 +0100792 If using CONFIG_SYS_SMC_RXBUFLEN also CONFIG_SYS_MAXIDLE
793 must be defined, to setup the maximum idle timeout for
794 the SMC.
795
Graeme Russ9558b482011-09-01 00:48:27 +0000796- Pre-Console Buffer:
Wolfgang Denk4cf26092011-10-07 09:58:21 +0200797 Prior to the console being initialised (i.e. serial UART
798 initialised etc) all console output is silently discarded.
799 Defining CONFIG_PRE_CONSOLE_BUFFER will cause U-Boot to
800 buffer any console messages prior to the console being
801 initialised to a buffer of size CONFIG_PRE_CON_BUF_SZ
802 bytes located at CONFIG_PRE_CON_BUF_ADDR. The buffer is
803 a circular buffer, so if more than CONFIG_PRE_CON_BUF_SZ
Wolfgang Denk6feff892011-10-09 21:06:34 +0200804 bytes are output before the console is initialised, the
Wolfgang Denk4cf26092011-10-07 09:58:21 +0200805 earlier bytes are discarded.
Graeme Russ9558b482011-09-01 00:48:27 +0000806
Wolfgang Denk4cf26092011-10-07 09:58:21 +0200807 'Sane' compilers will generate smaller code if
808 CONFIG_PRE_CON_BUF_SZ is a power of 2
Graeme Russ9558b482011-09-01 00:48:27 +0000809
Sonny Rao046a37b2011-11-02 09:52:08 +0000810- Safe printf() functions
811 Define CONFIG_SYS_VSNPRINTF to compile in safe versions of
812 the printf() functions. These are defined in
813 include/vsprintf.h and include snprintf(), vsnprintf() and
814 so on. Code size increase is approximately 300-500 bytes.
815 If this option is not given then these functions will
816 silently discard their buffer size argument - this means
817 you are not getting any overflow checking in this case.
818
wdenkc6097192002-11-03 00:24:07 +0000819- Boot Delay: CONFIG_BOOTDELAY - in seconds
820 Delay before automatically booting the default image;
821 set to -1 to disable autoboot.
Joe Hershberger93d72122012-08-17 10:53:12 +0000822 set to -2 to autoboot with no delay and not check for abort
823 (even when CONFIG_ZERO_BOOTDELAY_CHECK is defined).
wdenkc6097192002-11-03 00:24:07 +0000824
825 See doc/README.autoboot for these options that
826 work with CONFIG_BOOTDELAY. None are required.
827 CONFIG_BOOT_RETRY_TIME
828 CONFIG_BOOT_RETRY_MIN
829 CONFIG_AUTOBOOT_KEYED
830 CONFIG_AUTOBOOT_PROMPT
831 CONFIG_AUTOBOOT_DELAY_STR
832 CONFIG_AUTOBOOT_STOP_STR
833 CONFIG_AUTOBOOT_DELAY_STR2
834 CONFIG_AUTOBOOT_STOP_STR2
835 CONFIG_ZERO_BOOTDELAY_CHECK
836 CONFIG_RESET_TO_RETRY
837
838- Autoboot Command:
839 CONFIG_BOOTCOMMAND
840 Only needed when CONFIG_BOOTDELAY is enabled;
841 define a command string that is automatically executed
842 when no character is read on the console interface
843 within "Boot Delay" after reset.
844
845 CONFIG_BOOTARGS
wdenk43d96162003-03-06 00:02:04 +0000846 This can be used to pass arguments to the bootm
847 command. The value of CONFIG_BOOTARGS goes into the
848 environment value "bootargs".
wdenkc6097192002-11-03 00:24:07 +0000849
850 CONFIG_RAMBOOT and CONFIG_NFSBOOT
wdenk43d96162003-03-06 00:02:04 +0000851 The value of these goes into the environment as
852 "ramboot" and "nfsboot" respectively, and can be used
853 as a convenience, when switching between booting from
Marcel Ziswiler11ccc332008-07-09 08:17:15 +0200854 RAM and NFS.
wdenkc6097192002-11-03 00:24:07 +0000855
Heiko Schochereda0ba32013-11-04 14:04:59 +0100856- Bootcount:
857 CONFIG_BOOTCOUNT_LIMIT
858 Implements a mechanism for detecting a repeating reboot
859 cycle, see:
860 http://www.denx.de/wiki/view/DULG/UBootBootCountLimit
861
862 CONFIG_BOOTCOUNT_ENV
863 If no softreset save registers are found on the hardware
864 "bootcount" is stored in the environment. To prevent a
865 saveenv on all reboots, the environment variable
866 "upgrade_available" is used. If "upgrade_available" is
867 0, "bootcount" is always 0, if "upgrade_available" is
868 1 "bootcount" is incremented in the environment.
869 So the Userspace Applikation must set the "upgrade_available"
870 and "bootcount" variable to 0, if a boot was successfully.
871
wdenkc6097192002-11-03 00:24:07 +0000872- Pre-Boot Commands:
873 CONFIG_PREBOOT
874
875 When this option is #defined, the existence of the
876 environment variable "preboot" will be checked
877 immediately before starting the CONFIG_BOOTDELAY
878 countdown and/or running the auto-boot command resp.
879 entering interactive mode.
880
881 This feature is especially useful when "preboot" is
882 automatically generated or modified. For an example
883 see the LWMON board specific code: here "preboot" is
884 modified when the user holds down a certain
885 combination of keys on the (special) keyboard when
886 booting the systems
887
888- Serial Download Echo Mode:
889 CONFIG_LOADS_ECHO
890 If defined to 1, all characters received during a
891 serial download (using the "loads" command) are
892 echoed back. This might be needed by some terminal
893 emulations (like "cu"), but may as well just take
894 time on others. This setting #define's the initial
895 value of the "loads_echo" environment variable.
896
Jon Loeliger602ad3b2007-06-11 19:03:39 -0500897- Kgdb Serial Baudrate: (if CONFIG_CMD_KGDB is defined)
wdenkc6097192002-11-03 00:24:07 +0000898 CONFIG_KGDB_BAUDRATE
899 Select one of the baudrates listed in
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200900 CONFIG_SYS_BAUDRATE_TABLE, see below.
wdenkc6097192002-11-03 00:24:07 +0000901
902- Monitor Functions:
Jon Loeliger602ad3b2007-06-11 19:03:39 -0500903 Monitor commands can be included or excluded
904 from the build by using the #include files
Stephen Warrenc6c621b2012-08-05 16:07:19 +0000905 <config_cmd_all.h> and #undef'ing unwanted
906 commands, or using <config_cmd_default.h>
Jon Loeliger602ad3b2007-06-11 19:03:39 -0500907 and augmenting with additional #define's
908 for wanted commands.
wdenkc6097192002-11-03 00:24:07 +0000909
Jon Loeliger602ad3b2007-06-11 19:03:39 -0500910 The default command configuration includes all commands
911 except those marked below with a "*".
wdenkc6097192002-11-03 00:24:07 +0000912
Jon Loeliger602ad3b2007-06-11 19:03:39 -0500913 CONFIG_CMD_ASKENV * ask for env variable
Jon Loeliger602ad3b2007-06-11 19:03:39 -0500914 CONFIG_CMD_BDI bdinfo
915 CONFIG_CMD_BEDBUG * Include BedBug Debugger
916 CONFIG_CMD_BMP * BMP support
917 CONFIG_CMD_BSP * Board specific commands
918 CONFIG_CMD_BOOTD bootd
919 CONFIG_CMD_CACHE * icache, dcache
Michal Simek08d0d6f2013-11-21 13:39:02 -0800920 CONFIG_CMD_CLK * clock command support
Jon Loeliger602ad3b2007-06-11 19:03:39 -0500921 CONFIG_CMD_CONSOLE coninfo
Mike Frysinger710b9932010-12-21 14:19:51 -0500922 CONFIG_CMD_CRC32 * crc32
Jon Loeliger602ad3b2007-06-11 19:03:39 -0500923 CONFIG_CMD_DATE * support for RTC, date/time...
924 CONFIG_CMD_DHCP * DHCP support
925 CONFIG_CMD_DIAG * Diagnostics
Peter Tysera7c93102008-12-17 16:36:22 -0600926 CONFIG_CMD_DS4510 * ds4510 I2C gpio commands
927 CONFIG_CMD_DS4510_INFO * ds4510 I2C info command
928 CONFIG_CMD_DS4510_MEM * ds4510 I2C eeprom/sram commansd
929 CONFIG_CMD_DS4510_RST * ds4510 I2C rst command
Jon Loeliger602ad3b2007-06-11 19:03:39 -0500930 CONFIG_CMD_DTT * Digital Therm and Thermostat
931 CONFIG_CMD_ECHO echo arguments
Peter Tyser246c6922009-10-25 15:12:56 -0500932 CONFIG_CMD_EDITENV edit env variable
Jon Loeliger602ad3b2007-06-11 19:03:39 -0500933 CONFIG_CMD_EEPROM * EEPROM read/write support
934 CONFIG_CMD_ELF * bootelf, bootvx
Joe Hershberger5e2b3e02012-12-11 22:16:25 -0600935 CONFIG_CMD_ENV_CALLBACK * display details about env callbacks
Joe Hershbergerfffad712012-12-11 22:16:33 -0600936 CONFIG_CMD_ENV_FLAGS * display details about env flags
Andrew Ruder88733e22013-10-22 19:07:34 -0500937 CONFIG_CMD_ENV_EXISTS * check existence of env variable
Mike Frysinger0c79cda2010-12-26 23:09:45 -0500938 CONFIG_CMD_EXPORTENV * export the environment
Stephen Warren03e2ecf2012-10-22 06:43:50 +0000939 CONFIG_CMD_EXT2 * ext2 command support
940 CONFIG_CMD_EXT4 * ext4 command support
Stephen Warren16f4d932014-01-24 20:46:37 -0700941 CONFIG_CMD_FS_GENERIC * filesystem commands (e.g. load, ls)
942 that work for multiple fs types
Mike Frysingerbdab39d2009-01-28 19:08:14 -0500943 CONFIG_CMD_SAVEENV saveenv
Jon Loeliger602ad3b2007-06-11 19:03:39 -0500944 CONFIG_CMD_FDC * Floppy Disk Support
Stephen Warren03e2ecf2012-10-22 06:43:50 +0000945 CONFIG_CMD_FAT * FAT command support
Jon Loeliger602ad3b2007-06-11 19:03:39 -0500946 CONFIG_CMD_FLASH flinfo, erase, protect
947 CONFIG_CMD_FPGA FPGA device initialization support
Vincent Stehlé4d98b5c2013-06-20 18:14:22 +0200948 CONFIG_CMD_FUSE * Device fuse support
Anton Staaf53fdc7e2012-12-05 14:46:29 +0000949 CONFIG_CMD_GETTIME * Get time since boot
Mike Frysingera641b972010-12-26 23:32:22 -0500950 CONFIG_CMD_GO * the 'go' command (exec code)
Kim Phillipsa000b792011-04-05 07:15:14 +0000951 CONFIG_CMD_GREPENV * search environment
Simon Glassbf36c5d2012-12-05 14:46:38 +0000952 CONFIG_CMD_HASH * calculate hash / digest
Jon Loeliger602ad3b2007-06-11 19:03:39 -0500953 CONFIG_CMD_HWFLOW * RTS/CTS hw flow control
954 CONFIG_CMD_I2C * I2C serial bus support
955 CONFIG_CMD_IDE * IDE harddisk support
956 CONFIG_CMD_IMI iminfo
Vipin Kumar8fdf1e02012-12-16 22:32:48 +0000957 CONFIG_CMD_IMLS List all images found in NOR flash
Vincent Stehlé4d98b5c2013-06-20 18:14:22 +0200958 CONFIG_CMD_IMLS_NAND * List all images found in NAND flash
Jon Loeliger602ad3b2007-06-11 19:03:39 -0500959 CONFIG_CMD_IMMAP * IMMR dump support
Mike Frysinger0c79cda2010-12-26 23:09:45 -0500960 CONFIG_CMD_IMPORTENV * import an environment
Joe Hershbergerc167cc02012-10-03 11:15:51 +0000961 CONFIG_CMD_INI * import data from an ini file into the env
Jon Loeliger602ad3b2007-06-11 19:03:39 -0500962 CONFIG_CMD_IRQ * irqinfo
963 CONFIG_CMD_ITEST Integer/string test of 2 values
964 CONFIG_CMD_JFFS2 * JFFS2 Support
965 CONFIG_CMD_KGDB * kgdb
Vincent Stehlé4d98b5c2013-06-20 18:14:22 +0200966 CONFIG_CMD_LDRINFO * ldrinfo (display Blackfin loader)
Joe Hershbergerd22c3382012-05-23 08:00:12 +0000967 CONFIG_CMD_LINK_LOCAL * link-local IP address auto-configuration
968 (169.254.*.*)
Jon Loeliger602ad3b2007-06-11 19:03:39 -0500969 CONFIG_CMD_LOADB loadb
970 CONFIG_CMD_LOADS loads
Vincent Stehlé4d98b5c2013-06-20 18:14:22 +0200971 CONFIG_CMD_MD5SUM * print md5 message digest
Robin Getz02c9aa12009-07-27 00:07:59 -0400972 (requires CONFIG_CMD_MEMORY and CONFIG_MD5)
Simon Glass15a33e42012-11-30 13:01:20 +0000973 CONFIG_CMD_MEMINFO * Display detailed memory information
Jon Loeliger602ad3b2007-06-11 19:03:39 -0500974 CONFIG_CMD_MEMORY md, mm, nm, mw, cp, cmp, crc, base,
Wolfgang Denka2681702013-03-08 10:51:32 +0000975 loop, loopw
Vincent Stehlé4d98b5c2013-06-20 18:14:22 +0200976 CONFIG_CMD_MEMTEST * mtest
Jon Loeliger602ad3b2007-06-11 19:03:39 -0500977 CONFIG_CMD_MISC Misc functions like sleep etc
978 CONFIG_CMD_MMC * MMC memory mapped support
979 CONFIG_CMD_MII * MII utility commands
Stefan Roese68d7d652009-03-19 13:30:36 +0100980 CONFIG_CMD_MTDPARTS * MTD partition support
Jon Loeliger602ad3b2007-06-11 19:03:39 -0500981 CONFIG_CMD_NAND * NAND support
982 CONFIG_CMD_NET bootp, tftpboot, rarpboot
Vincent Stehlé4d98b5c2013-06-20 18:14:22 +0200983 CONFIG_CMD_NFS NFS support
Peter Tysere92739d2008-12-17 16:36:21 -0600984 CONFIG_CMD_PCA953X * PCA953x I2C gpio commands
Wolfgang Denkc0f40852011-10-26 10:21:21 +0000985 CONFIG_CMD_PCA953X_INFO * PCA953x I2C gpio info command
Jon Loeliger602ad3b2007-06-11 19:03:39 -0500986 CONFIG_CMD_PCI * pciinfo
987 CONFIG_CMD_PCMCIA * PCMCIA support
988 CONFIG_CMD_PING * send ICMP ECHO_REQUEST to network
989 host
990 CONFIG_CMD_PORTIO * Port I/O
Kenneth Watersff048ea2012-12-05 14:46:30 +0000991 CONFIG_CMD_READ * Read raw data from partition
Jon Loeliger602ad3b2007-06-11 19:03:39 -0500992 CONFIG_CMD_REGINFO * Register dump
993 CONFIG_CMD_RUN run command in env variable
Simon Glassd3049312012-12-26 09:53:36 +0000994 CONFIG_CMD_SANDBOX * sb command to access sandbox features
Jon Loeliger602ad3b2007-06-11 19:03:39 -0500995 CONFIG_CMD_SAVES * save S record dump
996 CONFIG_CMD_SCSI * SCSI Support
997 CONFIG_CMD_SDRAM * print SDRAM configuration information
998 (requires CONFIG_CMD_I2C)
999 CONFIG_CMD_SETGETDCR Support for DCR Register access
1000 (4xx only)
Eric Nelsonf61ec452012-01-31 10:52:08 -07001001 CONFIG_CMD_SF * Read/write/erase SPI NOR flash
Vincent Stehlé4d98b5c2013-06-20 18:14:22 +02001002 CONFIG_CMD_SHA1SUM * print sha1 memory digest
Robin Getz02c9aa12009-07-27 00:07:59 -04001003 (requires CONFIG_CMD_MEMORY)
Bob Liu7d861d92013-02-05 19:05:41 +08001004 CONFIG_CMD_SOFTSWITCH * Soft switch setting command for BF60x
Wolfgang Denk74de7ae2009-04-01 23:34:12 +02001005 CONFIG_CMD_SOURCE "source" command Support
Jon Loeliger602ad3b2007-06-11 19:03:39 -05001006 CONFIG_CMD_SPI * SPI serial bus support
Luca Ceresoli7a83af02011-05-17 00:03:40 +00001007 CONFIG_CMD_TFTPSRV * TFTP transfer in server mode
Simon Glass1fb7cd42011-10-24 18:00:07 +00001008 CONFIG_CMD_TFTPPUT * TFTP put command (upload)
Joe Hershbergerda83bcd2012-10-03 12:14:57 +00001009 CONFIG_CMD_TIME * run command and report execution time (ARM specific)
1010 CONFIG_CMD_TIMER * access to the system tick timer
Jon Loeliger602ad3b2007-06-11 19:03:39 -05001011 CONFIG_CMD_USB * USB support
Jon Loeliger602ad3b2007-06-11 19:03:39 -05001012 CONFIG_CMD_CDP * Cisco Discover Protocol support
Marek Vasutc8339f52012-03-31 07:47:16 +00001013 CONFIG_CMD_MFSL * Microblaze FSL support
Vincent Stehlé4d98b5c2013-06-20 18:14:22 +02001014 CONFIG_CMD_XIMG Load part of Multi Image
wdenkc6097192002-11-03 00:24:07 +00001015
wdenkc6097192002-11-03 00:24:07 +00001016
1017 EXAMPLE: If you want all functions except of network
1018 support you can write:
1019
Jon Loeliger602ad3b2007-06-11 19:03:39 -05001020 #include "config_cmd_all.h"
1021 #undef CONFIG_CMD_NET
wdenkc6097192002-11-03 00:24:07 +00001022
Gerald Van Baren213bf8c2007-03-31 12:23:51 -04001023 Other Commands:
1024 fdt (flattened device tree) command: CONFIG_OF_LIBFDT
wdenkc6097192002-11-03 00:24:07 +00001025
1026 Note: Don't enable the "icache" and "dcache" commands
Jon Loeliger602ad3b2007-06-11 19:03:39 -05001027 (configuration option CONFIG_CMD_CACHE) unless you know
wdenk43d96162003-03-06 00:02:04 +00001028 what you (and your U-Boot users) are doing. Data
1029 cache cannot be enabled on systems like the 8xx or
1030 8260 (where accesses to the IMMR region must be
1031 uncached), and it cannot be disabled on all other
1032 systems where we (mis-) use the data cache to hold an
1033 initial stack and some data.
wdenkc6097192002-11-03 00:24:07 +00001034
1035
1036 XXX - this list needs to get updated!
1037
Wolfgang Denka5ecbe62013-03-23 23:50:31 +00001038- Regular expression support:
1039 CONFIG_REGEX
Wolfgang Denk93e14592013-10-04 17:43:24 +02001040 If this variable is defined, U-Boot is linked against
1041 the SLRE (Super Light Regular Expression) library,
1042 which adds regex support to some commands, as for
1043 example "env grep" and "setexpr".
Wolfgang Denka5ecbe62013-03-23 23:50:31 +00001044
Simon Glass45ba8072011-10-15 05:48:20 +00001045- Device tree:
1046 CONFIG_OF_CONTROL
1047 If this variable is defined, U-Boot will use a device tree
1048 to configure its devices, instead of relying on statically
1049 compiled #defines in the board file. This option is
1050 experimental and only available on a few boards. The device
1051 tree is available in the global data as gd->fdt_blob.
1052
Simon Glass2c0f79e2011-10-24 19:15:31 +00001053 U-Boot needs to get its device tree from somewhere. This can
1054 be done using one of the two options below:
Simon Glassbbb0b122011-10-15 05:48:21 +00001055
1056 CONFIG_OF_EMBED
1057 If this variable is defined, U-Boot will embed a device tree
1058 binary in its image. This device tree file should be in the
1059 board directory and called <soc>-<board>.dts. The binary file
1060 is then picked up in board_init_f() and made available through
1061 the global data structure as gd->blob.
Simon Glass45ba8072011-10-15 05:48:20 +00001062
Simon Glass2c0f79e2011-10-24 19:15:31 +00001063 CONFIG_OF_SEPARATE
1064 If this variable is defined, U-Boot will build a device tree
1065 binary. It will be called u-boot.dtb. Architecture-specific
1066 code will locate it at run-time. Generally this works by:
1067
1068 cat u-boot.bin u-boot.dtb >image.bin
1069
1070 and in fact, U-Boot does this for you, creating a file called
1071 u-boot-dtb.bin which is useful in the common case. You can
1072 still use the individual files if you need something more
1073 exotic.
1074
wdenkc6097192002-11-03 00:24:07 +00001075- Watchdog:
1076 CONFIG_WATCHDOG
1077 If this variable is defined, it enables watchdog
Detlev Zundel6abe6fb2011-04-27 05:25:59 +00001078 support for the SoC. There must be support in the SoC
1079 specific code for a watchdog. For the 8xx and 8260
1080 CPUs, the SIU Watchdog feature is enabled in the SYPCR
1081 register. When supported for a specific SoC is
1082 available, then no further board specific code should
1083 be needed to use it.
1084
1085 CONFIG_HW_WATCHDOG
1086 When using a watchdog circuitry external to the used
1087 SoC, then define this variable and provide board
1088 specific code for the "hw_watchdog_reset" function.
wdenkc6097192002-11-03 00:24:07 +00001089
stroesec1551ea2003-04-04 15:53:41 +00001090- U-Boot Version:
1091 CONFIG_VERSION_VARIABLE
1092 If this variable is defined, an environment variable
1093 named "ver" is created by U-Boot showing the U-Boot
1094 version as printed by the "version" command.
Benoît Thébaudeaua1ea8e52012-08-13 15:01:14 +02001095 Any change to this variable will be reverted at the
1096 next reset.
stroesec1551ea2003-04-04 15:53:41 +00001097
wdenkc6097192002-11-03 00:24:07 +00001098- Real-Time Clock:
1099
Jon Loeliger602ad3b2007-06-11 19:03:39 -05001100 When CONFIG_CMD_DATE is selected, the type of the RTC
wdenkc6097192002-11-03 00:24:07 +00001101 has to be selected, too. Define exactly one of the
1102 following options:
1103
1104 CONFIG_RTC_MPC8xx - use internal RTC of MPC8xx
1105 CONFIG_RTC_PCF8563 - use Philips PCF8563 RTC
Fabio Estevam4e8b7542011-10-24 06:44:15 +00001106 CONFIG_RTC_MC13XXX - use MC13783 or MC13892 RTC
wdenkc6097192002-11-03 00:24:07 +00001107 CONFIG_RTC_MC146818 - use MC146818 RTC
wdenk1cb8e982003-03-06 21:55:29 +00001108 CONFIG_RTC_DS1307 - use Maxim, Inc. DS1307 RTC
wdenkc6097192002-11-03 00:24:07 +00001109 CONFIG_RTC_DS1337 - use Maxim, Inc. DS1337 RTC
wdenk7f70e852003-05-20 14:25:27 +00001110 CONFIG_RTC_DS1338 - use Maxim, Inc. DS1338 RTC
wdenk3bac3512003-03-12 10:41:04 +00001111 CONFIG_RTC_DS164x - use Dallas DS164x RTC
Tor Krill9536dfc2008-03-15 15:40:26 +01001112 CONFIG_RTC_ISL1208 - use Intersil ISL1208 RTC
wdenk4c0d4c32004-06-09 17:34:58 +00001113 CONFIG_RTC_MAX6900 - use Maxim, Inc. MAX6900 RTC
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +02001114 CONFIG_SYS_RTC_DS1337_NOOSC - Turn off the OSC output for DS1337
Heiko Schocher71d19f32011-03-28 09:24:22 +02001115 CONFIG_SYS_RV3029_TCR - enable trickle charger on
1116 RV3029 RTC.
wdenkc6097192002-11-03 00:24:07 +00001117
wdenkb37c7e52003-06-30 16:24:52 +00001118 Note that if the RTC uses I2C, then the I2C interface
1119 must also be configured. See I2C Support, below.
1120
Peter Tysere92739d2008-12-17 16:36:21 -06001121- GPIO Support:
1122 CONFIG_PCA953X - use NXP's PCA953X series I2C GPIO
Peter Tysere92739d2008-12-17 16:36:21 -06001123
Chris Packham5dec49c2010-12-19 10:12:13 +00001124 The CONFIG_SYS_I2C_PCA953X_WIDTH option specifies a list of
1125 chip-ngpio pairs that tell the PCA953X driver the number of
1126 pins supported by a particular chip.
1127
Peter Tysere92739d2008-12-17 16:36:21 -06001128 Note that if the GPIO device uses I2C, then the I2C interface
1129 must also be configured. See I2C Support, below.
1130
wdenkc6097192002-11-03 00:24:07 +00001131- Timestamp Support:
1132
wdenk43d96162003-03-06 00:02:04 +00001133 When CONFIG_TIMESTAMP is selected, the timestamp
1134 (date and time) of an image is printed by image
1135 commands like bootm or iminfo. This option is
Jon Loeliger602ad3b2007-06-11 19:03:39 -05001136 automatically enabled when you select CONFIG_CMD_DATE .
wdenkc6097192002-11-03 00:24:07 +00001137
Karl O. Pinc923c46f2012-08-16 06:20:15 +00001138- Partition Labels (disklabels) Supported:
1139 Zero or more of the following:
1140 CONFIG_MAC_PARTITION Apple's MacOS partition table.
1141 CONFIG_DOS_PARTITION MS Dos partition table, traditional on the
1142 Intel architecture, USB sticks, etc.
1143 CONFIG_ISO_PARTITION ISO partition table, used on CDROM etc.
1144 CONFIG_EFI_PARTITION GPT partition table, common when EFI is the
1145 bootloader. Note 2TB partition limit; see
1146 disk/part_efi.c
1147 CONFIG_MTD_PARTITIONS Memory Technology Device partition table.
wdenkc6097192002-11-03 00:24:07 +00001148
Wolfgang Denk218ca722008-03-26 10:40:12 +01001149 If IDE or SCSI support is enabled (CONFIG_CMD_IDE or
1150 CONFIG_CMD_SCSI) you must configure support for at
Karl O. Pinc923c46f2012-08-16 06:20:15 +00001151 least one non-MTD partition type as well.
wdenkc6097192002-11-03 00:24:07 +00001152
1153- IDE Reset method:
wdenk4d13cba2004-03-14 14:09:05 +00001154 CONFIG_IDE_RESET_ROUTINE - this is defined in several
1155 board configurations files but used nowhere!
wdenkc6097192002-11-03 00:24:07 +00001156
wdenk4d13cba2004-03-14 14:09:05 +00001157 CONFIG_IDE_RESET - is this is defined, IDE Reset will
1158 be performed by calling the function
1159 ide_set_reset(int reset)
1160 which has to be defined in a board specific file
wdenkc6097192002-11-03 00:24:07 +00001161
1162- ATAPI Support:
1163 CONFIG_ATAPI
1164
1165 Set this to enable ATAPI support.
1166
wdenkc40b2952004-03-13 23:29:43 +00001167- LBA48 Support
1168 CONFIG_LBA48
1169
1170 Set this to enable support for disks larger than 137GB
Heiko Schocher4b142fe2009-12-03 11:21:21 +01001171 Also look at CONFIG_SYS_64BIT_LBA.
wdenkc40b2952004-03-13 23:29:43 +00001172 Whithout these , LBA48 support uses 32bit variables and will 'only'
1173 support disks up to 2.1TB.
1174
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +02001175 CONFIG_SYS_64BIT_LBA:
wdenkc40b2952004-03-13 23:29:43 +00001176 When enabled, makes the IDE subsystem use 64bit sector addresses.
1177 Default is 32bit.
1178
wdenkc6097192002-11-03 00:24:07 +00001179- SCSI Support:
1180 At the moment only there is only support for the
1181 SYM53C8XX SCSI controller; define
1182 CONFIG_SCSI_SYM53C8XX to enable it.
1183
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +02001184 CONFIG_SYS_SCSI_MAX_LUN [8], CONFIG_SYS_SCSI_MAX_SCSI_ID [7] and
1185 CONFIG_SYS_SCSI_MAX_DEVICE [CONFIG_SYS_SCSI_MAX_SCSI_ID *
1186 CONFIG_SYS_SCSI_MAX_LUN] can be adjusted to define the
wdenkc6097192002-11-03 00:24:07 +00001187 maximum numbers of LUNs, SCSI ID's and target
1188 devices.
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +02001189 CONFIG_SYS_SCSI_SYM53C8XX_CCF to fix clock timing (80Mhz)
wdenkc6097192002-11-03 00:24:07 +00001190
Wolfgang Denk93e14592013-10-04 17:43:24 +02001191 The environment variable 'scsidevs' is set to the number of
1192 SCSI devices found during the last scan.
Stefan Reinauer447c0312012-10-29 05:23:48 +00001193
wdenkc6097192002-11-03 00:24:07 +00001194- NETWORK Support (PCI):
wdenk682011f2003-06-03 23:54:09 +00001195 CONFIG_E1000
Kyle Moffettce5207e2011-10-18 11:05:29 +00001196 Support for Intel 8254x/8257x gigabit chips.
1197
1198 CONFIG_E1000_SPI
1199 Utility code for direct access to the SPI bus on Intel 8257x.
1200 This does not do anything useful unless you set at least one
1201 of CONFIG_CMD_E1000 or CONFIG_E1000_SPI_GENERIC.
1202
1203 CONFIG_E1000_SPI_GENERIC
1204 Allow generic access to the SPI bus on the Intel 8257x, for
1205 example with the "sspi" command.
1206
1207 CONFIG_CMD_E1000
1208 Management command for E1000 devices. When used on devices
1209 with SPI support you can reprogram the EEPROM from U-Boot.
stroese53cf9432003-06-05 15:39:44 +00001210
Andre Schwarzac3315c2008-03-06 16:45:44 +01001211 CONFIG_E1000_FALLBACK_MAC
Marcel Ziswiler11ccc332008-07-09 08:17:15 +02001212 default MAC for empty EEPROM after production.
Andre Schwarzac3315c2008-03-06 16:45:44 +01001213
wdenkc6097192002-11-03 00:24:07 +00001214 CONFIG_EEPRO100
1215 Support for Intel 82557/82559/82559ER chips.
Marcel Ziswiler11ccc332008-07-09 08:17:15 +02001216 Optional CONFIG_EEPRO100_SROM_WRITE enables EEPROM
wdenkc6097192002-11-03 00:24:07 +00001217 write routine for first time initialisation.
1218
1219 CONFIG_TULIP
1220 Support for Digital 2114x chips.
1221 Optional CONFIG_TULIP_SELECT_MEDIA for board specific
1222 modem chip initialisation (KS8761/QS6611).
1223
1224 CONFIG_NATSEMI
1225 Support for National dp83815 chips.
1226
1227 CONFIG_NS8382X
1228 Support for National dp8382[01] gigabit chips.
1229
wdenk45219c42003-05-12 21:50:16 +00001230- NETWORK Support (other):
1231
Jens Scharsigc041e9d2010-01-23 12:03:45 +01001232 CONFIG_DRIVER_AT91EMAC
1233 Support for AT91RM9200 EMAC.
1234
1235 CONFIG_RMII
1236 Define this to use reduced MII inteface
1237
1238 CONFIG_DRIVER_AT91EMAC_QUIET
1239 If this defined, the driver is quiet.
1240 The driver doen't show link status messages.
1241
Rob Herringefdd7312011-12-15 11:15:49 +00001242 CONFIG_CALXEDA_XGMAC
1243 Support for the Calxeda XGMAC device
1244
Ashok3bb46d22012-10-15 06:20:47 +00001245 CONFIG_LAN91C96
wdenk45219c42003-05-12 21:50:16 +00001246 Support for SMSC's LAN91C96 chips.
1247
1248 CONFIG_LAN91C96_BASE
1249 Define this to hold the physical address
1250 of the LAN91C96's I/O space
1251
1252 CONFIG_LAN91C96_USE_32_BIT
1253 Define this to enable 32 bit addressing
1254
Ashok3bb46d22012-10-15 06:20:47 +00001255 CONFIG_SMC91111
wdenkf39748a2004-06-09 13:37:52 +00001256 Support for SMSC's LAN91C111 chip
1257
1258 CONFIG_SMC91111_BASE
1259 Define this to hold the physical address
1260 of the device (I/O space)
1261
1262 CONFIG_SMC_USE_32_BIT
1263 Define this if data bus is 32 bits
1264
1265 CONFIG_SMC_USE_IOFUNCS
1266 Define this to use i/o functions instead of macros
1267 (some hardware wont work with macros)
1268
Heiko Schocherdc02bad2011-11-15 10:00:04 -05001269 CONFIG_DRIVER_TI_EMAC
1270 Support for davinci emac
1271
1272 CONFIG_SYS_DAVINCI_EMAC_PHY_COUNT
1273 Define this if you have more then 3 PHYs.
1274
Macpaul Linb3dbf4a52010-12-21 16:59:46 +08001275 CONFIG_FTGMAC100
1276 Support for Faraday's FTGMAC100 Gigabit SoC Ethernet
1277
1278 CONFIG_FTGMAC100_EGIGA
1279 Define this to use GE link update with gigabit PHY.
1280 Define this if FTGMAC100 is connected to gigabit PHY.
1281 If your system has 10/100 PHY only, it might not occur
1282 wrong behavior. Because PHY usually return timeout or
1283 useless data when polling gigabit status and gigabit
1284 control registers. This behavior won't affect the
1285 correctnessof 10/100 link speed update.
1286
Mike Rapoportc2fff332009-11-11 10:03:03 +02001287 CONFIG_SMC911X
Jens Gehrlein557b3772008-05-05 14:06:11 +02001288 Support for SMSC's LAN911x and LAN921x chips
1289
Mike Rapoportc2fff332009-11-11 10:03:03 +02001290 CONFIG_SMC911X_BASE
Jens Gehrlein557b3772008-05-05 14:06:11 +02001291 Define this to hold the physical address
1292 of the device (I/O space)
1293
Mike Rapoportc2fff332009-11-11 10:03:03 +02001294 CONFIG_SMC911X_32_BIT
Jens Gehrlein557b3772008-05-05 14:06:11 +02001295 Define this if data bus is 32 bits
1296
Mike Rapoportc2fff332009-11-11 10:03:03 +02001297 CONFIG_SMC911X_16_BIT
Jens Gehrlein557b3772008-05-05 14:06:11 +02001298 Define this if data bus is 16 bits. If your processor
1299 automatically converts one 32 bit word to two 16 bit
Mike Rapoportc2fff332009-11-11 10:03:03 +02001300 words you may also try CONFIG_SMC911X_32_BIT.
Jens Gehrlein557b3772008-05-05 14:06:11 +02001301
Yoshihiro Shimoda3d0075f2011-01-27 10:06:03 +09001302 CONFIG_SH_ETHER
1303 Support for Renesas on-chip Ethernet controller
1304
1305 CONFIG_SH_ETHER_USE_PORT
1306 Define the number of ports to be used
1307
1308 CONFIG_SH_ETHER_PHY_ADDR
1309 Define the ETH PHY's address
1310
Yoshihiro Shimoda68260aa2011-01-27 10:06:08 +09001311 CONFIG_SH_ETHER_CACHE_WRITEBACK
1312 If this option is set, the driver enables cache flush.
1313
Vadim Bendebury5e124722011-10-17 08:36:14 +00001314- TPM Support:
Che-liang Chiou90899cc2013-04-12 11:04:34 +00001315 CONFIG_TPM
1316 Support TPM devices.
1317
Tom Wai-Hong Tam1b393db2013-04-12 11:04:37 +00001318 CONFIG_TPM_TIS_I2C
1319 Support for i2c bus TPM devices. Only one device
1320 per system is supported at this time.
1321
1322 CONFIG_TPM_TIS_I2C_BUS_NUMBER
1323 Define the the i2c bus number for the TPM device
1324
1325 CONFIG_TPM_TIS_I2C_SLAVE_ADDRESS
1326 Define the TPM's address on the i2c bus
1327
1328 CONFIG_TPM_TIS_I2C_BURST_LIMITATION
1329 Define the burst count bytes upper limit
1330
Dirk Eibachc01939c2013-06-26 15:55:15 +02001331 CONFIG_TPM_ATMEL_TWI
1332 Support for Atmel TWI TPM device. Requires I2C support.
1333
Che-liang Chiou90899cc2013-04-12 11:04:34 +00001334 CONFIG_TPM_TIS_LPC
Vadim Bendebury5e124722011-10-17 08:36:14 +00001335 Support for generic parallel port TPM devices. Only one device
1336 per system is supported at this time.
1337
1338 CONFIG_TPM_TIS_BASE_ADDRESS
1339 Base address where the generic TPM device is mapped
1340 to. Contemporary x86 systems usually map it at
1341 0xfed40000.
1342
Reinhard Pfaube6c1522013-06-26 15:55:13 +02001343 CONFIG_CMD_TPM
1344 Add tpm monitor functions.
1345 Requires CONFIG_TPM. If CONFIG_TPM_AUTH_SESSIONS is set, also
1346 provides monitor access to authorized functions.
1347
1348 CONFIG_TPM
1349 Define this to enable the TPM support library which provides
1350 functional interfaces to some TPM commands.
1351 Requires support for a TPM device.
1352
1353 CONFIG_TPM_AUTH_SESSIONS
1354 Define this to enable authorized functions in the TPM library.
1355 Requires CONFIG_TPM and CONFIG_SHA1.
1356
wdenkc6097192002-11-03 00:24:07 +00001357- USB Support:
1358 At the moment only the UHCI host controller is
wdenk4d13cba2004-03-14 14:09:05 +00001359 supported (PIP405, MIP405, MPC5200); define
wdenkc6097192002-11-03 00:24:07 +00001360 CONFIG_USB_UHCI to enable it.
1361 define CONFIG_USB_KEYBOARD to enable the USB Keyboard
wdenk30d56fa2004-10-09 22:44:59 +00001362 and define CONFIG_USB_STORAGE to enable the USB
wdenkc6097192002-11-03 00:24:07 +00001363 storage devices.
1364 Note:
1365 Supported are USB Keyboards and USB Floppy drives
1366 (TEAC FD-05PUB).
wdenk4d13cba2004-03-14 14:09:05 +00001367 MPC5200 USB requires additional defines:
1368 CONFIG_USB_CLOCK
1369 for 528 MHz Clock: 0x0001bbbb
Eric Millbrandt307ecb62009-08-13 08:32:37 -05001370 CONFIG_PSC3_USB
1371 for USB on PSC3
wdenk4d13cba2004-03-14 14:09:05 +00001372 CONFIG_USB_CONFIG
1373 for differential drivers: 0x00001000
1374 for single ended drivers: 0x00005000
Eric Millbrandt307ecb62009-08-13 08:32:37 -05001375 for differential drivers on PSC3: 0x00000100
1376 for single ended drivers on PSC3: 0x00004100
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +02001377 CONFIG_SYS_USB_EVENT_POLL
Zhang Weifdcfaa12007-06-06 10:08:13 +02001378 May be defined to allow interrupt polling
1379 instead of using asynchronous interrupts
wdenk4d13cba2004-03-14 14:09:05 +00001380
Simon Glass9ab4ce22012-02-27 10:52:47 +00001381 CONFIG_USB_EHCI_TXFIFO_THRESH enables setting of the
1382 txfilltuning field in the EHCI controller on reset.
1383
Kuo-Jung Suaa155052013-05-15 15:29:22 +08001384 CONFIG_USB_HUB_MIN_POWER_ON_DELAY defines the minimum
1385 interval for usb hub power-on delay.(minimum 100msec)
1386
Wolfgang Denk16c8d5e2006-06-14 17:45:53 +02001387- USB Device:
1388 Define the below if you wish to use the USB console.
1389 Once firmware is rebuilt from a serial console issue the
1390 command "setenv stdin usbtty; setenv stdout usbtty" and
Marcel Ziswiler11ccc332008-07-09 08:17:15 +02001391 attach your USB cable. The Unix command "dmesg" should print
Wolfgang Denk16c8d5e2006-06-14 17:45:53 +02001392 it has found a new device. The environment variable usbtty
1393 can be set to gserial or cdc_acm to enable your device to
Wolfgang Denk386eda02006-06-14 18:14:56 +02001394 appear to a USB host as a Linux gserial device or a
Wolfgang Denk16c8d5e2006-06-14 17:45:53 +02001395 Common Device Class Abstract Control Model serial device.
1396 If you select usbtty = gserial you should be able to enumerate
1397 a Linux host by
1398 # modprobe usbserial vendor=0xVendorID product=0xProductID
1399 else if using cdc_acm, simply setting the environment
1400 variable usbtty to be cdc_acm should suffice. The following
1401 might be defined in YourBoardName.h
Wolfgang Denk386eda02006-06-14 18:14:56 +02001402
Wolfgang Denk16c8d5e2006-06-14 17:45:53 +02001403 CONFIG_USB_DEVICE
1404 Define this to build a UDC device
wdenkc6097192002-11-03 00:24:07 +00001405
Wolfgang Denk16c8d5e2006-06-14 17:45:53 +02001406 CONFIG_USB_TTY
1407 Define this to have a tty type of device available to
1408 talk to the UDC device
Wolfgang Denk386eda02006-06-14 18:14:56 +02001409
Vipin KUMARf9da0f82012-03-26 15:38:06 +05301410 CONFIG_USBD_HS
1411 Define this to enable the high speed support for usb
1412 device and usbtty. If this feature is enabled, a routine
1413 int is_usbd_high_speed(void)
1414 also needs to be defined by the driver to dynamically poll
1415 whether the enumeration has succeded at high speed or full
1416 speed.
1417
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +02001418 CONFIG_SYS_CONSOLE_IS_IN_ENV
Wolfgang Denk16c8d5e2006-06-14 17:45:53 +02001419 Define this if you want stdin, stdout &/or stderr to
1420 be set to usbtty.
1421
1422 mpc8xx:
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +02001423 CONFIG_SYS_USB_EXTC_CLK 0xBLAH
Wolfgang Denk16c8d5e2006-06-14 17:45:53 +02001424 Derive USB clock from external clock "blah"
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +02001425 - CONFIG_SYS_USB_EXTC_CLK 0x02
Wolfgang Denk386eda02006-06-14 18:14:56 +02001426
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +02001427 CONFIG_SYS_USB_BRG_CLK 0xBLAH
Wolfgang Denk16c8d5e2006-06-14 17:45:53 +02001428 Derive USB clock from brgclk
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +02001429 - CONFIG_SYS_USB_BRG_CLK 0x04
Wolfgang Denk16c8d5e2006-06-14 17:45:53 +02001430
Wolfgang Denk386eda02006-06-14 18:14:56 +02001431 If you have a USB-IF assigned VendorID then you may wish to
Wolfgang Denk16c8d5e2006-06-14 17:45:53 +02001432 define your own vendor specific values either in BoardName.h
Wolfgang Denk386eda02006-06-14 18:14:56 +02001433 or directly in usbd_vendor_info.h. If you don't define
Wolfgang Denk16c8d5e2006-06-14 17:45:53 +02001434 CONFIG_USBD_MANUFACTURER, CONFIG_USBD_PRODUCT_NAME,
1435 CONFIG_USBD_VENDORID and CONFIG_USBD_PRODUCTID, then U-Boot
1436 should pretend to be a Linux device to it's target host.
1437
1438 CONFIG_USBD_MANUFACTURER
1439 Define this string as the name of your company for
1440 - CONFIG_USBD_MANUFACTURER "my company"
Wolfgang Denk386eda02006-06-14 18:14:56 +02001441
Wolfgang Denk16c8d5e2006-06-14 17:45:53 +02001442 CONFIG_USBD_PRODUCT_NAME
1443 Define this string as the name of your product
1444 - CONFIG_USBD_PRODUCT_NAME "acme usb device"
1445
1446 CONFIG_USBD_VENDORID
1447 Define this as your assigned Vendor ID from the USB
1448 Implementors Forum. This *must* be a genuine Vendor ID
1449 to avoid polluting the USB namespace.
1450 - CONFIG_USBD_VENDORID 0xFFFF
Wolfgang Denk386eda02006-06-14 18:14:56 +02001451
Wolfgang Denk16c8d5e2006-06-14 17:45:53 +02001452 CONFIG_USBD_PRODUCTID
1453 Define this as the unique Product ID
1454 for your device
1455 - CONFIG_USBD_PRODUCTID 0xFFFF
wdenkc6097192002-11-03 00:24:07 +00001456
Przemyslaw Marczak351e9b22013-10-23 14:30:46 +02001457 Some USB device drivers may need to check USB cable attachment.
1458 In this case you can enable following config in BoardName.h:
1459 CONFIG_USB_CABLE_CHECK
1460 This enables function definition:
1461 - usb_cable_connected() in include/usb.h
1462 Implementation of this function is board-specific.
1463
Igor Grinbergd70a5602011-12-12 12:08:35 +02001464- ULPI Layer Support:
1465 The ULPI (UTMI Low Pin (count) Interface) PHYs are supported via
1466 the generic ULPI layer. The generic layer accesses the ULPI PHY
1467 via the platform viewport, so you need both the genric layer and
1468 the viewport enabled. Currently only Chipidea/ARC based
1469 viewport is supported.
1470 To enable the ULPI layer support, define CONFIG_USB_ULPI and
1471 CONFIG_USB_ULPI_VIEWPORT in your board configuration file.
Lucas Stach6d365ea2012-10-01 00:44:35 +02001472 If your ULPI phy needs a different reference clock than the
1473 standard 24 MHz then you have to define CONFIG_ULPI_REF_CLK to
1474 the appropriate value in Hz.
wdenkc6097192002-11-03 00:24:07 +00001475
1476- MMC Support:
1477 The MMC controller on the Intel PXA is supported. To
1478 enable this define CONFIG_MMC. The MMC can be
1479 accessed from the boot prompt by mapping the device
1480 to physical memory similar to flash. Command line is
Jon Loeliger602ad3b2007-06-11 19:03:39 -05001481 enabled with CONFIG_CMD_MMC. The MMC driver also works with
1482 the FAT fs. This is enabled with CONFIG_CMD_FAT.
wdenkc6097192002-11-03 00:24:07 +00001483
Yoshihiro Shimodaafb35662011-07-04 22:21:22 +00001484 CONFIG_SH_MMCIF
1485 Support for Renesas on-chip MMCIF controller
1486
1487 CONFIG_SH_MMCIF_ADDR
1488 Define the base address of MMCIF registers
1489
1490 CONFIG_SH_MMCIF_CLK
1491 Define the clock frequency for MMCIF
1492
Tom Rinib3ba6e92013-03-14 05:32:47 +00001493- USB Device Firmware Update (DFU) class support:
1494 CONFIG_DFU_FUNCTION
1495 This enables the USB portion of the DFU USB class
1496
1497 CONFIG_CMD_DFU
1498 This enables the command "dfu" which is used to have
1499 U-Boot create a DFU class device via USB. This command
1500 requires that the "dfu_alt_info" environment variable be
1501 set and define the alt settings to expose to the host.
1502
1503 CONFIG_DFU_MMC
1504 This enables support for exposing (e)MMC devices via DFU.
1505
Pantelis Antoniouc6631762013-03-14 05:32:52 +00001506 CONFIG_DFU_NAND
1507 This enables support for exposing NAND devices via DFU.
1508
Afzal Mohammeda9479f02013-09-18 01:15:24 +05301509 CONFIG_DFU_RAM
1510 This enables support for exposing RAM via DFU.
1511 Note: DFU spec refer to non-volatile memory usage, but
1512 allow usages beyond the scope of spec - here RAM usage,
1513 one that would help mostly the developer.
1514
Heiko Schochere7e75c72013-06-12 06:05:51 +02001515 CONFIG_SYS_DFU_DATA_BUF_SIZE
1516 Dfu transfer uses a buffer before writing data to the
1517 raw storage device. Make the size (in bytes) of this buffer
1518 configurable. The size of this buffer is also configurable
1519 through the "dfu_bufsiz" environment variable.
1520
Pantelis Antoniouea2453d2013-03-14 05:32:48 +00001521 CONFIG_SYS_DFU_MAX_FILE_SIZE
1522 When updating files rather than the raw storage device,
1523 we use a static buffer to copy the file into and then write
1524 the buffer once we've been given the whole file. Define
1525 this to the maximum filesize (in bytes) for the buffer.
1526 Default is 4 MiB if undefined.
1527
wdenk6705d812004-08-02 23:22:59 +00001528- Journaling Flash filesystem support:
1529 CONFIG_JFFS2_NAND, CONFIG_JFFS2_NAND_OFF, CONFIG_JFFS2_NAND_SIZE,
1530 CONFIG_JFFS2_NAND_DEV
1531 Define these for a default partition on a NAND device
1532
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +02001533 CONFIG_SYS_JFFS2_FIRST_SECTOR,
1534 CONFIG_SYS_JFFS2_FIRST_BANK, CONFIG_SYS_JFFS2_NUM_BANKS
wdenk6705d812004-08-02 23:22:59 +00001535 Define these for a default partition on a NOR device
1536
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +02001537 CONFIG_SYS_JFFS_CUSTOM_PART
wdenk6705d812004-08-02 23:22:59 +00001538 Define this to create an own partition. You have to provide a
1539 function struct part_info* jffs2_part_info(int part_num)
1540
1541 If you define only one JFFS2 partition you may also want to
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +02001542 #define CONFIG_SYS_JFFS_SINGLE_PART 1
wdenk6705d812004-08-02 23:22:59 +00001543 to disable the command chpart. This is the default when you
1544 have not defined a custom partition
1545
Donggeun Kimc30a15e2011-10-24 21:15:28 +00001546- FAT(File Allocation Table) filesystem write function support:
1547 CONFIG_FAT_WRITE
Donggeun Kim656f4c62012-03-22 04:38:56 +00001548
1549 Define this to enable support for saving memory data as a
1550 file in FAT formatted partition.
1551
1552 This will also enable the command "fatwrite" enabling the
1553 user to write files to FAT.
Donggeun Kimc30a15e2011-10-24 21:15:28 +00001554
Gabe Black84cd9322012-10-12 14:26:11 +00001555CBFS (Coreboot Filesystem) support
1556 CONFIG_CMD_CBFS
1557
1558 Define this to enable support for reading from a Coreboot
1559 filesystem. Available commands are cbfsinit, cbfsinfo, cbfsls
1560 and cbfsload.
1561
wdenkc6097192002-11-03 00:24:07 +00001562- Keyboard Support:
1563 CONFIG_ISA_KEYBOARD
1564
1565 Define this to enable standard (PC-Style) keyboard
1566 support
1567
1568 CONFIG_I8042_KBD
1569 Standard PC keyboard driver with US (is default) and
1570 GERMAN key layout (switch via environment 'keymap=de') support.
1571 Export function i8042_kbd_init, i8042_tstc and i8042_getc
1572 for cfb_console. Supports cursor blinking.
1573
Hung-ying Tyan713cb682013-05-15 18:27:32 +08001574 CONFIG_CROS_EC_KEYB
1575 Enables a Chrome OS keyboard using the CROS_EC interface.
1576 This uses CROS_EC to communicate with a second microcontroller
1577 which provides key scans on request.
1578
wdenkc6097192002-11-03 00:24:07 +00001579- Video support:
1580 CONFIG_VIDEO
1581
1582 Define this to enable video support (for output to
1583 video).
1584
1585 CONFIG_VIDEO_CT69000
1586
1587 Enable Chips & Technologies 69000 Video chip
1588
1589 CONFIG_VIDEO_SMI_LYNXEM
wdenkb79a11c2004-03-25 15:14:43 +00001590 Enable Silicon Motion SMI 712/710/810 Video chip. The
wdenkeeb1b772004-03-23 22:53:55 +00001591 video output is selected via environment 'videoout'
1592 (1 = LCD and 2 = CRT). If videoout is undefined, CRT is
1593 assumed.
wdenkc6097192002-11-03 00:24:07 +00001594
wdenkb79a11c2004-03-25 15:14:43 +00001595 For the CT69000 and SMI_LYNXEM drivers, videomode is
Marcel Ziswiler11ccc332008-07-09 08:17:15 +02001596 selected via environment 'videomode'. Two different ways
wdenkeeb1b772004-03-23 22:53:55 +00001597 are possible:
1598 - "videomode=num" 'num' is a standard LiLo mode numbers.
wdenk6e592382004-04-18 17:39:38 +00001599 Following standard modes are supported (* is default):
wdenkeeb1b772004-03-23 22:53:55 +00001600
1601 Colors 640x480 800x600 1024x768 1152x864 1280x1024
1602 -------------+---------------------------------------------
1603 8 bits | 0x301* 0x303 0x305 0x161 0x307
1604 15 bits | 0x310 0x313 0x316 0x162 0x319
1605 16 bits | 0x311 0x314 0x317 0x163 0x31A
1606 24 bits | 0x312 0x315 0x318 ? 0x31B
1607 -------------+---------------------------------------------
wdenkc6097192002-11-03 00:24:07 +00001608 (i.e. setenv videomode 317; saveenv; reset;)
1609
wdenkb79a11c2004-03-25 15:14:43 +00001610 - "videomode=bootargs" all the video parameters are parsed
Marcel Ziswiler7817cb22007-12-30 03:30:46 +01001611 from the bootargs. (See drivers/video/videomodes.c)
wdenkeeb1b772004-03-23 22:53:55 +00001612
1613
stroesec1551ea2003-04-04 15:53:41 +00001614 CONFIG_VIDEO_SED13806
wdenk43d96162003-03-06 00:02:04 +00001615 Enable Epson SED13806 driver. This driver supports 8bpp
wdenka6c7ad22002-12-03 21:28:10 +00001616 and 16bpp modes defined by CONFIG_VIDEO_SED13806_8BPP
1617 or CONFIG_VIDEO_SED13806_16BPP
1618
Timur Tabi7d3053f2011-02-15 17:09:19 -06001619 CONFIG_FSL_DIU_FB
Wolfgang Denk04e5ae72011-09-11 21:24:09 +02001620 Enable the Freescale DIU video driver. Reference boards for
Timur Tabi7d3053f2011-02-15 17:09:19 -06001621 SOCs that have a DIU should define this macro to enable DIU
1622 support, and should also define these other macros:
1623
1624 CONFIG_SYS_DIU_ADDR
1625 CONFIG_VIDEO
1626 CONFIG_CMD_BMP
1627 CONFIG_CFB_CONSOLE
1628 CONFIG_VIDEO_SW_CURSOR
1629 CONFIG_VGA_AS_SINGLE_DEVICE
1630 CONFIG_VIDEO_LOGO
1631 CONFIG_VIDEO_BMP_LOGO
1632
Timur Tabiba8e76b2011-04-11 14:18:22 -05001633 The DIU driver will look for the 'video-mode' environment
1634 variable, and if defined, enable the DIU as a console during
1635 boot. See the documentation file README.video for a
1636 description of this variable.
Timur Tabi7d3053f2011-02-15 17:09:19 -06001637
Simon Glass058d59b2012-12-03 13:59:47 +00001638 CONFIG_VIDEO_VGA
1639
1640 Enable the VGA video / BIOS for x86. The alternative if you
1641 are using coreboot is to use the coreboot frame buffer
1642 driver.
1643
1644
wdenk682011f2003-06-03 23:54:09 +00001645- Keyboard Support:
wdenk8bde7f72003-06-27 21:31:46 +00001646 CONFIG_KEYBOARD
wdenk682011f2003-06-03 23:54:09 +00001647
wdenk8bde7f72003-06-27 21:31:46 +00001648 Define this to enable a custom keyboard support.
1649 This simply calls drv_keyboard_init() which must be
1650 defined in your board-specific files.
1651 The only board using this so far is RBC823.
wdenka6c7ad22002-12-03 21:28:10 +00001652
wdenkc6097192002-11-03 00:24:07 +00001653- LCD Support: CONFIG_LCD
1654
1655 Define this to enable LCD support (for output to LCD
1656 display); also select one of the supported displays
1657 by defining one of these:
1658
Stelian Pop39cf4802008-05-09 21:57:18 +02001659 CONFIG_ATMEL_LCD:
1660
1661 HITACHI TX09D70VM1CCA, 3.5", 240x320.
1662
wdenkfd3103b2003-11-25 16:55:19 +00001663 CONFIG_NEC_NL6448AC33:
wdenkc6097192002-11-03 00:24:07 +00001664
wdenkfd3103b2003-11-25 16:55:19 +00001665 NEC NL6448AC33-18. Active, color, single scan.
wdenkc6097192002-11-03 00:24:07 +00001666
wdenkfd3103b2003-11-25 16:55:19 +00001667 CONFIG_NEC_NL6448BC20
wdenkc6097192002-11-03 00:24:07 +00001668
wdenkfd3103b2003-11-25 16:55:19 +00001669 NEC NL6448BC20-08. 6.5", 640x480.
1670 Active, color, single scan.
1671
1672 CONFIG_NEC_NL6448BC33_54
1673
1674 NEC NL6448BC33-54. 10.4", 640x480.
wdenkc6097192002-11-03 00:24:07 +00001675 Active, color, single scan.
1676
1677 CONFIG_SHARP_16x9
1678
1679 Sharp 320x240. Active, color, single scan.
1680 It isn't 16x9, and I am not sure what it is.
1681
1682 CONFIG_SHARP_LQ64D341
1683
1684 Sharp LQ64D341 display, 640x480.
1685 Active, color, single scan.
1686
1687 CONFIG_HLD1045
1688
1689 HLD1045 display, 640x480.
1690 Active, color, single scan.
1691
1692 CONFIG_OPTREX_BW
1693
1694 Optrex CBL50840-2 NF-FW 99 22 M5
1695 or
1696 Hitachi LMG6912RPFC-00T
1697 or
1698 Hitachi SP14Q002
1699
1700 320x240. Black & white.
1701
1702 Normally display is black on white background; define
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +02001703 CONFIG_SYS_WHITE_ON_BLACK to get it inverted.
wdenkc6097192002-11-03 00:24:07 +00001704
Simon Glass676d3192012-10-17 13:24:54 +00001705 CONFIG_LCD_ALIGNMENT
1706
1707 Normally the LCD is page-aligned (tyically 4KB). If this is
1708 defined then the LCD will be aligned to this value instead.
1709 For ARM it is sometimes useful to use MMU_SECTION_SIZE
1710 here, since it is cheaper to change data cache settings on
1711 a per-section basis.
1712
Simon Glass0d89efe2012-10-17 13:24:59 +00001713 CONFIG_CONSOLE_SCROLL_LINES
1714
1715 When the console need to be scrolled, this is the number of
1716 lines to scroll by. It defaults to 1. Increasing this makes
1717 the console jump but can help speed up operation when scrolling
1718 is slow.
Simon Glass676d3192012-10-17 13:24:54 +00001719
Tom Wai-Hong Tam45d7f522012-09-28 15:11:16 +00001720 CONFIG_LCD_BMP_RLE8
1721
1722 Support drawing of RLE8-compressed bitmaps on the LCD.
1723
Tom Wai-Hong Tam735987c2012-12-05 14:46:40 +00001724 CONFIG_I2C_EDID
1725
1726 Enables an 'i2c edid' command which can read EDID
1727 information over I2C from an attached LCD display.
1728
wdenk7152b1d2003-09-05 23:19:14 +00001729- Splash Screen Support: CONFIG_SPLASH_SCREEN
wdenkd791b1d2003-04-20 14:04:18 +00001730
wdenk8bde7f72003-06-27 21:31:46 +00001731 If this option is set, the environment is checked for
1732 a variable "splashimage". If found, the usual display
1733 of logo, copyright and system information on the LCD
wdenke94d2cd2004-06-30 22:59:18 +00001734 is suppressed and the BMP image at the address
wdenk8bde7f72003-06-27 21:31:46 +00001735 specified in "splashimage" is loaded instead. The
1736 console is redirected to the "nulldev", too. This
1737 allows for a "silent" boot where a splash screen is
1738 loaded very quickly after power-on.
wdenkd791b1d2003-04-20 14:04:18 +00001739
Nikita Kiryanovc0880482013-02-24 21:28:43 +00001740 CONFIG_SPLASHIMAGE_GUARD
1741
1742 If this option is set, then U-Boot will prevent the environment
1743 variable "splashimage" from being set to a problematic address
1744 (see README.displaying-bmps and README.arm-unaligned-accesses).
1745 This option is useful for targets where, due to alignment
1746 restrictions, an improperly aligned BMP image will cause a data
1747 abort. If you think you will not have problems with unaligned
1748 accesses (for example because your toolchain prevents them)
1749 there is no need to set this option.
1750
Matthias Weisser1ca298c2009-07-09 16:07:30 +02001751 CONFIG_SPLASH_SCREEN_ALIGN
1752
1753 If this option is set the splash image can be freely positioned
1754 on the screen. Environment variable "splashpos" specifies the
1755 position as "x,y". If a positive number is given it is used as
1756 number of pixel from left/top. If a negative number is given it
1757 is used as number of pixel from right/bottom. You can also
1758 specify 'm' for centering the image.
1759
1760 Example:
1761 setenv splashpos m,m
1762 => image at center of screen
1763
1764 setenv splashpos 30,20
1765 => image at x = 30 and y = 20
1766
1767 setenv splashpos -10,m
1768 => vertically centered image
1769 at x = dspWidth - bmpWidth - 9
1770
Stefan Roese98f4a3d2005-09-22 09:04:17 +02001771- Gzip compressed BMP image support: CONFIG_VIDEO_BMP_GZIP
1772
1773 If this option is set, additionally to standard BMP
1774 images, gzipped BMP images can be displayed via the
1775 splashscreen support or the bmp command.
1776
Anatolij Gustschind5011762010-03-15 14:50:25 +01001777- Run length encoded BMP image (RLE8) support: CONFIG_VIDEO_BMP_RLE8
1778
1779 If this option is set, 8-bit RLE compressed BMP images
1780 can be displayed via the splashscreen support or the
1781 bmp command.
1782
Lei Wenf2b96df2012-09-28 04:26:47 +00001783- Do compresssing for memory range:
1784 CONFIG_CMD_ZIP
1785
1786 If this option is set, it would use zlib deflate method
1787 to compress the specified memory at its best effort.
1788
wdenkc29fdfc2003-08-29 20:57:53 +00001789- Compression support:
Kees Cook8ef70472013-08-16 07:59:12 -07001790 CONFIG_GZIP
1791
1792 Enabled by default to support gzip compressed images.
1793
wdenkc29fdfc2003-08-29 20:57:53 +00001794 CONFIG_BZIP2
1795
1796 If this option is set, support for bzip2 compressed
1797 images is included. If not, only uncompressed and gzip
1798 compressed images are supported.
1799
wdenk42d1f032003-10-15 23:53:47 +00001800 NOTE: the bzip2 algorithm requires a lot of RAM, so
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +02001801 the malloc area (as defined by CONFIG_SYS_MALLOC_LEN) should
wdenk42d1f032003-10-15 23:53:47 +00001802 be at least 4MB.
wdenkd791b1d2003-04-20 14:04:18 +00001803
Luigi 'Comio' Mantellinifc9c1722008-09-08 02:46:13 +02001804 CONFIG_LZMA
1805
1806 If this option is set, support for lzma compressed
1807 images is included.
1808
1809 Note: The LZMA algorithm adds between 2 and 4KB of code and it
1810 requires an amount of dynamic memory that is given by the
1811 formula:
1812
1813 (1846 + 768 << (lc + lp)) * sizeof(uint16)
1814
1815 Where lc and lp stand for, respectively, Literal context bits
1816 and Literal pos bits.
1817
1818 This value is upper-bounded by 14MB in the worst case. Anyway,
1819 for a ~4MB large kernel image, we have lc=3 and lp=0 for a
1820 total amount of (1846 + 768 << (3 + 0)) * 2 = ~41KB... that is
1821 a very small buffer.
1822
1823 Use the lzmainfo tool to determinate the lc and lp values and
1824 then calculate the amount of needed dynamic memory (ensuring
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +02001825 the appropriate CONFIG_SYS_MALLOC_LEN value).
Luigi 'Comio' Mantellinifc9c1722008-09-08 02:46:13 +02001826
Kees Cook8ef70472013-08-16 07:59:12 -07001827 CONFIG_LZO
1828
1829 If this option is set, support for LZO compressed images
1830 is included.
1831
wdenk17ea1172004-06-06 21:51:03 +00001832- MII/PHY support:
1833 CONFIG_PHY_ADDR
1834
1835 The address of PHY on MII bus.
1836
1837 CONFIG_PHY_CLOCK_FREQ (ppc4xx)
1838
1839 The clock frequency of the MII bus
1840
1841 CONFIG_PHY_GIGE
1842
1843 If this option is set, support for speed/duplex
Marcel Ziswiler11ccc332008-07-09 08:17:15 +02001844 detection of gigabit PHY is included.
wdenk17ea1172004-06-06 21:51:03 +00001845
1846 CONFIG_PHY_RESET_DELAY
1847
1848 Some PHY like Intel LXT971A need extra delay after
1849 reset before any MII register access is possible.
1850 For such PHY, set this option to the usec delay
1851 required. (minimum 300usec for LXT971A)
1852
1853 CONFIG_PHY_CMD_DELAY (ppc4xx)
1854
1855 Some PHY like Intel LXT971A need extra delay after
1856 command issued before MII status register can be read
1857
wdenkc6097192002-11-03 00:24:07 +00001858- Ethernet address:
1859 CONFIG_ETHADDR
richardretanubunc68a05f2008-09-29 18:28:23 -04001860 CONFIG_ETH1ADDR
wdenkc6097192002-11-03 00:24:07 +00001861 CONFIG_ETH2ADDR
1862 CONFIG_ETH3ADDR
richardretanubunc68a05f2008-09-29 18:28:23 -04001863 CONFIG_ETH4ADDR
1864 CONFIG_ETH5ADDR
wdenkc6097192002-11-03 00:24:07 +00001865
Marcel Ziswiler11ccc332008-07-09 08:17:15 +02001866 Define a default value for Ethernet address to use
1867 for the respective Ethernet interface, in case this
wdenkc6097192002-11-03 00:24:07 +00001868 is not determined automatically.
1869
1870- IP address:
1871 CONFIG_IPADDR
1872
1873 Define a default value for the IP address to use for
Marcel Ziswiler11ccc332008-07-09 08:17:15 +02001874 the default Ethernet interface, in case this is not
wdenkc6097192002-11-03 00:24:07 +00001875 determined through e.g. bootp.
Wolfgang Denk1ebcd652011-10-26 10:21:22 +00001876 (Environment variable "ipaddr")
wdenkc6097192002-11-03 00:24:07 +00001877
1878- Server IP address:
1879 CONFIG_SERVERIP
1880
Marcel Ziswiler11ccc332008-07-09 08:17:15 +02001881 Defines a default value for the IP address of a TFTP
wdenkc6097192002-11-03 00:24:07 +00001882 server to contact when using the "tftboot" command.
Wolfgang Denk1ebcd652011-10-26 10:21:22 +00001883 (Environment variable "serverip")
wdenkc6097192002-11-03 00:24:07 +00001884
Robin Getz97cfe862009-07-21 12:15:28 -04001885 CONFIG_KEEP_SERVERADDR
1886
1887 Keeps the server's MAC address, in the env 'serveraddr'
1888 for passing to bootargs (like Linux's netconsole option)
1889
Wolfgang Denk1ebcd652011-10-26 10:21:22 +00001890- Gateway IP address:
1891 CONFIG_GATEWAYIP
1892
1893 Defines a default value for the IP address of the
1894 default router where packets to other networks are
1895 sent to.
1896 (Environment variable "gatewayip")
1897
1898- Subnet mask:
1899 CONFIG_NETMASK
1900
1901 Defines a default value for the subnet mask (or
1902 routing prefix) which is used to determine if an IP
1903 address belongs to the local subnet or needs to be
1904 forwarded through a router.
1905 (Environment variable "netmask")
1906
David Updegraff53a5c422007-06-11 10:41:07 -05001907- Multicast TFTP Mode:
1908 CONFIG_MCAST_TFTP
1909
1910 Defines whether you want to support multicast TFTP as per
1911 rfc-2090; for example to work with atftp. Lets lots of targets
Marcel Ziswiler11ccc332008-07-09 08:17:15 +02001912 tftp down the same boot image concurrently. Note: the Ethernet
David Updegraff53a5c422007-06-11 10:41:07 -05001913 driver in use must provide a function: mcast() to join/leave a
1914 multicast group.
1915
wdenkc6097192002-11-03 00:24:07 +00001916- BOOTP Recovery Mode:
1917 CONFIG_BOOTP_RANDOM_DELAY
1918
1919 If you have many targets in a network that try to
1920 boot using BOOTP, you may want to avoid that all
1921 systems send out BOOTP requests at precisely the same
1922 moment (which would happen for instance at recovery
1923 from a power failure, when all systems will try to
1924 boot, thus flooding the BOOTP server. Defining
1925 CONFIG_BOOTP_RANDOM_DELAY causes a random delay to be
1926 inserted before sending out BOOTP requests. The
Wolfgang Denk6c33c782007-08-06 23:21:05 +02001927 following delays are inserted then:
wdenkc6097192002-11-03 00:24:07 +00001928
1929 1st BOOTP request: delay 0 ... 1 sec
1930 2nd BOOTP request: delay 0 ... 2 sec
1931 3rd BOOTP request: delay 0 ... 4 sec
1932 4th and following
1933 BOOTP requests: delay 0 ... 8 sec
1934
stroesefe389a82003-08-28 14:17:32 +00001935- DHCP Advanced Options:
Jon Loeliger1fe80d72007-07-09 22:08:34 -05001936 You can fine tune the DHCP functionality by defining
1937 CONFIG_BOOTP_* symbols:
stroesefe389a82003-08-28 14:17:32 +00001938
Jon Loeliger1fe80d72007-07-09 22:08:34 -05001939 CONFIG_BOOTP_SUBNETMASK
1940 CONFIG_BOOTP_GATEWAY
1941 CONFIG_BOOTP_HOSTNAME
1942 CONFIG_BOOTP_NISDOMAIN
1943 CONFIG_BOOTP_BOOTPATH
1944 CONFIG_BOOTP_BOOTFILESIZE
1945 CONFIG_BOOTP_DNS
1946 CONFIG_BOOTP_DNS2
1947 CONFIG_BOOTP_SEND_HOSTNAME
1948 CONFIG_BOOTP_NTPSERVER
1949 CONFIG_BOOTP_TIMEOFFSET
1950 CONFIG_BOOTP_VENDOREX
Joe Hershberger2c00e092012-05-23 07:59:19 +00001951 CONFIG_BOOTP_MAY_FAIL
stroesefe389a82003-08-28 14:17:32 +00001952
Wilson Callan5d110f02007-07-28 10:56:13 -04001953 CONFIG_BOOTP_SERVERIP - TFTP server will be the serverip
1954 environment variable, not the BOOTP server.
stroesefe389a82003-08-28 14:17:32 +00001955
Joe Hershberger2c00e092012-05-23 07:59:19 +00001956 CONFIG_BOOTP_MAY_FAIL - If the DHCP server is not found
1957 after the configured retry count, the call will fail
1958 instead of starting over. This can be used to fail over
1959 to Link-local IP address configuration if the DHCP server
1960 is not available.
1961
stroesefe389a82003-08-28 14:17:32 +00001962 CONFIG_BOOTP_DNS2 - If a DHCP client requests the DNS
1963 serverip from a DHCP server, it is possible that more
1964 than one DNS serverip is offered to the client.
1965 If CONFIG_BOOTP_DNS2 is enabled, the secondary DNS
1966 serverip will be stored in the additional environment
1967 variable "dnsip2". The first DNS serverip is always
1968 stored in the variable "dnsip", when CONFIG_BOOTP_DNS
Jon Loeliger1fe80d72007-07-09 22:08:34 -05001969 is defined.
stroesefe389a82003-08-28 14:17:32 +00001970
1971 CONFIG_BOOTP_SEND_HOSTNAME - Some DHCP servers are capable
1972 to do a dynamic update of a DNS server. To do this, they
1973 need the hostname of the DHCP requester.
Wilson Callan5d110f02007-07-28 10:56:13 -04001974 If CONFIG_BOOTP_SEND_HOSTNAME is defined, the content
Jon Loeliger1fe80d72007-07-09 22:08:34 -05001975 of the "hostname" environment variable is passed as
1976 option 12 to the DHCP server.
stroesefe389a82003-08-28 14:17:32 +00001977
Aras Vaichasd9a2f412008-03-26 09:43:57 +11001978 CONFIG_BOOTP_DHCP_REQUEST_DELAY
1979
1980 A 32bit value in microseconds for a delay between
1981 receiving a "DHCP Offer" and sending the "DHCP Request".
1982 This fixes a problem with certain DHCP servers that don't
1983 respond 100% of the time to a "DHCP request". E.g. On an
1984 AT91RM9200 processor running at 180MHz, this delay needed
1985 to be *at least* 15,000 usec before a Windows Server 2003
1986 DHCP server would reply 100% of the time. I recommend at
1987 least 50,000 usec to be safe. The alternative is to hope
1988 that one of the retries will be successful but note that
1989 the DHCP timeout and retry process takes a longer than
1990 this delay.
1991
Joe Hershbergerd22c3382012-05-23 08:00:12 +00001992 - Link-local IP address negotiation:
1993 Negotiate with other link-local clients on the local network
1994 for an address that doesn't require explicit configuration.
1995 This is especially useful if a DHCP server cannot be guaranteed
1996 to exist in all environments that the device must operate.
1997
1998 See doc/README.link-local for more information.
1999
wdenka3d991b2004-04-15 21:48:45 +00002000 - CDP Options:
wdenk6e592382004-04-18 17:39:38 +00002001 CONFIG_CDP_DEVICE_ID
wdenka3d991b2004-04-15 21:48:45 +00002002
2003 The device id used in CDP trigger frames.
2004
2005 CONFIG_CDP_DEVICE_ID_PREFIX
2006
2007 A two character string which is prefixed to the MAC address
2008 of the device.
2009
2010 CONFIG_CDP_PORT_ID
2011
2012 A printf format string which contains the ascii name of
2013 the port. Normally is set to "eth%d" which sets
Marcel Ziswiler11ccc332008-07-09 08:17:15 +02002014 eth0 for the first Ethernet, eth1 for the second etc.
wdenka3d991b2004-04-15 21:48:45 +00002015
2016 CONFIG_CDP_CAPABILITIES
2017
2018 A 32bit integer which indicates the device capabilities;
2019 0x00000010 for a normal host which does not forwards.
2020
2021 CONFIG_CDP_VERSION
2022
2023 An ascii string containing the version of the software.
2024
2025 CONFIG_CDP_PLATFORM
2026
2027 An ascii string containing the name of the platform.
2028
2029 CONFIG_CDP_TRIGGER
2030
2031 A 32bit integer sent on the trigger.
2032
2033 CONFIG_CDP_POWER_CONSUMPTION
2034
2035 A 16bit integer containing the power consumption of the
2036 device in .1 of milliwatts.
2037
2038 CONFIG_CDP_APPLIANCE_VLAN_TYPE
2039
2040 A byte containing the id of the VLAN.
2041
wdenkc6097192002-11-03 00:24:07 +00002042- Status LED: CONFIG_STATUS_LED
2043
2044 Several configurations allow to display the current
2045 status using a LED. For instance, the LED will blink
2046 fast while running U-Boot code, stop blinking as
2047 soon as a reply to a BOOTP request was received, and
2048 start blinking slow once the Linux kernel is running
2049 (supported by a status LED driver in the Linux
2050 kernel). Defining CONFIG_STATUS_LED enables this
2051 feature in U-Boot.
2052
Igor Grinberg1df7bbb2013-11-08 01:03:50 +02002053 Additional options:
2054
2055 CONFIG_GPIO_LED
2056 The status LED can be connected to a GPIO pin.
2057 In such cases, the gpio_led driver can be used as a
2058 status LED backend implementation. Define CONFIG_GPIO_LED
2059 to include the gpio_led driver in the U-Boot binary.
2060
Igor Grinberg9dfdcdf2013-11-08 01:03:52 +02002061 CONFIG_GPIO_LED_INVERTED_TABLE
2062 Some GPIO connected LEDs may have inverted polarity in which
2063 case the GPIO high value corresponds to LED off state and
2064 GPIO low value corresponds to LED on state.
2065 In such cases CONFIG_GPIO_LED_INVERTED_TABLE may be defined
2066 with a list of GPIO LEDs that have inverted polarity.
2067
wdenkc6097192002-11-03 00:24:07 +00002068- CAN Support: CONFIG_CAN_DRIVER
2069
2070 Defining CONFIG_CAN_DRIVER enables CAN driver support
2071 on those systems that support this (optional)
2072 feature, like the TQM8xxL modules.
2073
Heiko Schocher3f4978c2012-01-16 21:12:24 +00002074- I2C Support: CONFIG_SYS_I2C
wdenkc6097192002-11-03 00:24:07 +00002075
Heiko Schocher3f4978c2012-01-16 21:12:24 +00002076 This enable the NEW i2c subsystem, and will allow you to use
2077 i2c commands at the u-boot command line (as long as you set
2078 CONFIG_CMD_I2C in CONFIG_COMMANDS) and communicate with i2c
2079 based realtime clock chips or other i2c devices. See
2080 common/cmd_i2c.c for a description of the command line
2081 interface.
2082
2083 ported i2c driver to the new framework:
Heiko Schocherea818db2013-01-29 08:53:15 +01002084 - drivers/i2c/soft_i2c.c:
2085 - activate first bus with CONFIG_SYS_I2C_SOFT define
2086 CONFIG_SYS_I2C_SOFT_SPEED and CONFIG_SYS_I2C_SOFT_SLAVE
2087 for defining speed and slave address
2088 - activate second bus with I2C_SOFT_DECLARATIONS2 define
2089 CONFIG_SYS_I2C_SOFT_SPEED_2 and CONFIG_SYS_I2C_SOFT_SLAVE_2
2090 for defining speed and slave address
2091 - activate third bus with I2C_SOFT_DECLARATIONS3 define
2092 CONFIG_SYS_I2C_SOFT_SPEED_3 and CONFIG_SYS_I2C_SOFT_SLAVE_3
2093 for defining speed and slave address
2094 - activate fourth bus with I2C_SOFT_DECLARATIONS4 define
2095 CONFIG_SYS_I2C_SOFT_SPEED_4 and CONFIG_SYS_I2C_SOFT_SLAVE_4
2096 for defining speed and slave address
Heiko Schocher3f4978c2012-01-16 21:12:24 +00002097
Heiko Schocher00f792e2012-10-24 13:48:22 +02002098 - drivers/i2c/fsl_i2c.c:
2099 - activate i2c driver with CONFIG_SYS_I2C_FSL
2100 define CONFIG_SYS_FSL_I2C_OFFSET for setting the register
2101 offset CONFIG_SYS_FSL_I2C_SPEED for the i2c speed and
2102 CONFIG_SYS_FSL_I2C_SLAVE for the slave addr of the first
2103 bus.
Wolfgang Denk93e14592013-10-04 17:43:24 +02002104 - If your board supports a second fsl i2c bus, define
Heiko Schocher00f792e2012-10-24 13:48:22 +02002105 CONFIG_SYS_FSL_I2C2_OFFSET for the register offset
2106 CONFIG_SYS_FSL_I2C2_SPEED for the speed and
2107 CONFIG_SYS_FSL_I2C2_SLAVE for the slave address of the
2108 second bus.
2109
Simon Glass1f2ba722012-10-30 07:28:53 +00002110 - drivers/i2c/tegra_i2c.c:
Nobuhiro Iwamatsu10cee512013-10-11 16:23:53 +09002111 - activate this driver with CONFIG_SYS_I2C_TEGRA
2112 - This driver adds 4 i2c buses with a fix speed from
2113 100000 and the slave addr 0!
Simon Glass1f2ba722012-10-30 07:28:53 +00002114
Dirk Eibach880540d2013-04-25 02:40:01 +00002115 - drivers/i2c/ppc4xx_i2c.c
2116 - activate this driver with CONFIG_SYS_I2C_PPC4XX
2117 - CONFIG_SYS_I2C_PPC4XX_CH0 activate hardware channel 0
2118 - CONFIG_SYS_I2C_PPC4XX_CH1 activate hardware channel 1
2119
tremfac96402013-09-21 18:13:35 +02002120 - drivers/i2c/i2c_mxc.c
2121 - activate this driver with CONFIG_SYS_I2C_MXC
2122 - define speed for bus 1 with CONFIG_SYS_MXC_I2C1_SPEED
2123 - define slave for bus 1 with CONFIG_SYS_MXC_I2C1_SLAVE
2124 - define speed for bus 2 with CONFIG_SYS_MXC_I2C2_SPEED
2125 - define slave for bus 2 with CONFIG_SYS_MXC_I2C2_SLAVE
2126 - define speed for bus 3 with CONFIG_SYS_MXC_I2C3_SPEED
2127 - define slave for bus 3 with CONFIG_SYS_MXC_I2C3_SLAVE
2128 If thoses defines are not set, default value is 100000
2129 for speed, and 0 for slave.
2130
Nobuhiro Iwamatsu1086bfa2013-09-27 16:58:30 +09002131 - drivers/i2c/rcar_i2c.c:
2132 - activate this driver with CONFIG_SYS_I2C_RCAR
2133 - This driver adds 4 i2c buses
2134
2135 - CONFIG_SYS_RCAR_I2C0_BASE for setting the register channel 0
2136 - CONFIG_SYS_RCAR_I2C0_SPEED for for the speed channel 0
2137 - CONFIG_SYS_RCAR_I2C1_BASE for setting the register channel 1
2138 - CONFIG_SYS_RCAR_I2C1_SPEED for for the speed channel 1
2139 - CONFIG_SYS_RCAR_I2C2_BASE for setting the register channel 2
2140 - CONFIG_SYS_RCAR_I2C2_SPEED for for the speed channel 2
2141 - CONFIG_SYS_RCAR_I2C3_BASE for setting the register channel 3
2142 - CONFIG_SYS_RCAR_I2C3_SPEED for for the speed channel 3
2143 - CONFIF_SYS_RCAR_I2C_NUM_CONTROLLERS for number of i2c buses
2144
Nobuhiro Iwamatsu2035d772013-10-29 13:33:51 +09002145 - drivers/i2c/sh_i2c.c:
2146 - activate this driver with CONFIG_SYS_I2C_SH
2147 - This driver adds from 2 to 5 i2c buses
2148
2149 - CONFIG_SYS_I2C_SH_BASE0 for setting the register channel 0
2150 - CONFIG_SYS_I2C_SH_SPEED0 for for the speed channel 0
2151 - CONFIG_SYS_I2C_SH_BASE1 for setting the register channel 1
2152 - CONFIG_SYS_I2C_SH_SPEED1 for for the speed channel 1
2153 - CONFIG_SYS_I2C_SH_BASE2 for setting the register channel 2
2154 - CONFIG_SYS_I2C_SH_SPEED2 for for the speed channel 2
2155 - CONFIG_SYS_I2C_SH_BASE3 for setting the register channel 3
2156 - CONFIG_SYS_I2C_SH_SPEED3 for for the speed channel 3
2157 - CONFIG_SYS_I2C_SH_BASE4 for setting the register channel 4
2158 - CONFIG_SYS_I2C_SH_SPEED4 for for the speed channel 4
2159 - CONFIG_SYS_I2C_SH_BASE5 for setting the register channel 5
2160 - CONFIG_SYS_I2C_SH_SPEED5 for for the speed channel 5
2161 - CONFIF_SYS_I2C_SH_NUM_CONTROLLERS for nummber of i2c buses
2162
Heiko Schocher6789e842013-10-22 11:03:18 +02002163 - drivers/i2c/omap24xx_i2c.c
2164 - activate this driver with CONFIG_SYS_I2C_OMAP24XX
2165 - CONFIG_SYS_OMAP24_I2C_SPEED speed channel 0
2166 - CONFIG_SYS_OMAP24_I2C_SLAVE slave addr channel 0
2167 - CONFIG_SYS_OMAP24_I2C_SPEED1 speed channel 1
2168 - CONFIG_SYS_OMAP24_I2C_SLAVE1 slave addr channel 1
2169 - CONFIG_SYS_OMAP24_I2C_SPEED2 speed channel 2
2170 - CONFIG_SYS_OMAP24_I2C_SLAVE2 slave addr channel 2
2171 - CONFIG_SYS_OMAP24_I2C_SPEED3 speed channel 3
2172 - CONFIG_SYS_OMAP24_I2C_SLAVE3 slave addr channel 3
2173 - CONFIG_SYS_OMAP24_I2C_SPEED4 speed channel 4
2174 - CONFIG_SYS_OMAP24_I2C_SLAVE4 slave addr channel 4
2175
Heiko Schocher0bdffe72013-11-08 07:30:53 +01002176 - drivers/i2c/zynq_i2c.c
2177 - activate this driver with CONFIG_SYS_I2C_ZYNQ
2178 - set CONFIG_SYS_I2C_ZYNQ_SPEED for speed setting
2179 - set CONFIG_SYS_I2C_ZYNQ_SLAVE for slave addr
2180
Naveen Krishna Che717fc62013-12-06 12:12:38 +05302181 - drivers/i2c/s3c24x0_i2c.c:
2182 - activate this driver with CONFIG_SYS_I2C_S3C24X0
2183 - This driver adds i2c buses (11 for Exynos5250, Exynos5420
2184 9 i2c buses for Exynos4 and 1 for S3C24X0 SoCs from Samsung)
2185 with a fix speed from 100000 and the slave addr 0!
2186
Heiko Schocher3f4978c2012-01-16 21:12:24 +00002187 additional defines:
2188
2189 CONFIG_SYS_NUM_I2C_BUSES
2190 Hold the number of i2c busses you want to use. If you
2191 don't use/have i2c muxes on your i2c bus, this
2192 is equal to CONFIG_SYS_NUM_I2C_ADAPTERS, and you can
2193 omit this define.
2194
2195 CONFIG_SYS_I2C_DIRECT_BUS
2196 define this, if you don't use i2c muxes on your hardware.
2197 if CONFIG_SYS_I2C_MAX_HOPS is not defined or == 0 you can
2198 omit this define.
2199
2200 CONFIG_SYS_I2C_MAX_HOPS
2201 define how many muxes are maximal consecutively connected
2202 on one i2c bus. If you not use i2c muxes, omit this
2203 define.
2204
2205 CONFIG_SYS_I2C_BUSES
2206 hold a list of busses you want to use, only used if
2207 CONFIG_SYS_I2C_DIRECT_BUS is not defined, for example
2208 a board with CONFIG_SYS_I2C_MAX_HOPS = 1 and
2209 CONFIG_SYS_NUM_I2C_BUSES = 9:
2210
2211 CONFIG_SYS_I2C_BUSES {{0, {I2C_NULL_HOP}}, \
2212 {0, {{I2C_MUX_PCA9547, 0x70, 1}}}, \
2213 {0, {{I2C_MUX_PCA9547, 0x70, 2}}}, \
2214 {0, {{I2C_MUX_PCA9547, 0x70, 3}}}, \
2215 {0, {{I2C_MUX_PCA9547, 0x70, 4}}}, \
2216 {0, {{I2C_MUX_PCA9547, 0x70, 5}}}, \
2217 {1, {I2C_NULL_HOP}}, \
2218 {1, {{I2C_MUX_PCA9544, 0x72, 1}}}, \
2219 {1, {{I2C_MUX_PCA9544, 0x72, 2}}}, \
2220 }
2221
2222 which defines
2223 bus 0 on adapter 0 without a mux
Heiko Schocherea818db2013-01-29 08:53:15 +01002224 bus 1 on adapter 0 with a PCA9547 on address 0x70 port 1
2225 bus 2 on adapter 0 with a PCA9547 on address 0x70 port 2
2226 bus 3 on adapter 0 with a PCA9547 on address 0x70 port 3
2227 bus 4 on adapter 0 with a PCA9547 on address 0x70 port 4
2228 bus 5 on adapter 0 with a PCA9547 on address 0x70 port 5
Heiko Schocher3f4978c2012-01-16 21:12:24 +00002229 bus 6 on adapter 1 without a mux
Heiko Schocherea818db2013-01-29 08:53:15 +01002230 bus 7 on adapter 1 with a PCA9544 on address 0x72 port 1
2231 bus 8 on adapter 1 with a PCA9544 on address 0x72 port 2
Heiko Schocher3f4978c2012-01-16 21:12:24 +00002232
2233 If you do not have i2c muxes on your board, omit this define.
2234
Heiko Schocherea818db2013-01-29 08:53:15 +01002235- Legacy I2C Support: CONFIG_HARD_I2C
Heiko Schocher3f4978c2012-01-16 21:12:24 +00002236
2237 NOTE: It is intended to move drivers to CONFIG_SYS_I2C which
2238 provides the following compelling advantages:
2239
2240 - more than one i2c adapter is usable
2241 - approved multibus support
2242 - better i2c mux support
2243
2244 ** Please consider updating your I2C driver now. **
2245
Heiko Schocherea818db2013-01-29 08:53:15 +01002246 These enable legacy I2C serial bus commands. Defining
2247 CONFIG_HARD_I2C will include the appropriate I2C driver
2248 for the selected CPU.
wdenkc6097192002-11-03 00:24:07 +00002249
wdenk945af8d2003-07-16 21:53:01 +00002250 This will allow you to use i2c commands at the u-boot
Jon Loeliger602ad3b2007-06-11 19:03:39 -05002251 command line (as long as you set CONFIG_CMD_I2C in
wdenkb37c7e52003-06-30 16:24:52 +00002252 CONFIG_COMMANDS) and communicate with i2c based realtime
2253 clock chips. See common/cmd_i2c.c for a description of the
wdenk43d96162003-03-06 00:02:04 +00002254 command line interface.
wdenkc6097192002-11-03 00:24:07 +00002255
Ben Warrenbb99ad62006-09-07 16:50:54 -04002256 CONFIG_HARD_I2C selects a hardware I2C controller.
wdenkc6097192002-11-03 00:24:07 +00002257
wdenk945af8d2003-07-16 21:53:01 +00002258 There are several other quantities that must also be
Heiko Schocherea818db2013-01-29 08:53:15 +01002259 defined when you define CONFIG_HARD_I2C.
wdenkc6097192002-11-03 00:24:07 +00002260
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +02002261 In both cases you will need to define CONFIG_SYS_I2C_SPEED
wdenk945af8d2003-07-16 21:53:01 +00002262 to be the frequency (in Hz) at which you wish your i2c bus
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +02002263 to run and CONFIG_SYS_I2C_SLAVE to be the address of this node (ie
Marcel Ziswiler11ccc332008-07-09 08:17:15 +02002264 the CPU's i2c node address).
wdenk945af8d2003-07-16 21:53:01 +00002265
Peter Tyser8d321b82010-04-12 22:28:21 -05002266 Now, the u-boot i2c code for the mpc8xx
Stefan Roesea47a12b2010-04-15 16:07:28 +02002267 (arch/powerpc/cpu/mpc8xx/i2c.c) sets the CPU up as a master node
Peter Tyser8d321b82010-04-12 22:28:21 -05002268 and so its address should therefore be cleared to 0 (See,
2269 eg, MPC823e User's Manual p.16-473). So, set
2270 CONFIG_SYS_I2C_SLAVE to 0.
wdenkc6097192002-11-03 00:24:07 +00002271
Eric Millbrandt5da71ef2009-09-03 08:09:44 -05002272 CONFIG_SYS_I2C_INIT_MPC5XXX
2273
2274 When a board is reset during an i2c bus transfer
2275 chips might think that the current transfer is still
2276 in progress. Reset the slave devices by sending start
2277 commands until the slave device responds.
2278
wdenk945af8d2003-07-16 21:53:01 +00002279 That's all that's required for CONFIG_HARD_I2C.
wdenkb37c7e52003-06-30 16:24:52 +00002280
Heiko Schocherea818db2013-01-29 08:53:15 +01002281 If you use the software i2c interface (CONFIG_SYS_I2C_SOFT)
wdenkb37c7e52003-06-30 16:24:52 +00002282 then the following macros need to be defined (examples are
2283 from include/configs/lwmon.h):
wdenkc6097192002-11-03 00:24:07 +00002284
2285 I2C_INIT
2286
wdenkb37c7e52003-06-30 16:24:52 +00002287 (Optional). Any commands necessary to enable the I2C
wdenk43d96162003-03-06 00:02:04 +00002288 controller or configure ports.
wdenkc6097192002-11-03 00:24:07 +00002289
wdenkba56f622004-02-06 23:19:44 +00002290 eg: #define I2C_INIT (immr->im_cpm.cp_pbdir |= PB_SCL)
wdenkb37c7e52003-06-30 16:24:52 +00002291
wdenkc6097192002-11-03 00:24:07 +00002292 I2C_PORT
2293
wdenk43d96162003-03-06 00:02:04 +00002294 (Only for MPC8260 CPU). The I/O port to use (the code
2295 assumes both bits are on the same port). Valid values
2296 are 0..3 for ports A..D.
wdenkc6097192002-11-03 00:24:07 +00002297
2298 I2C_ACTIVE
2299
2300 The code necessary to make the I2C data line active
2301 (driven). If the data line is open collector, this
2302 define can be null.
2303
wdenkb37c7e52003-06-30 16:24:52 +00002304 eg: #define I2C_ACTIVE (immr->im_cpm.cp_pbdir |= PB_SDA)
2305
wdenkc6097192002-11-03 00:24:07 +00002306 I2C_TRISTATE
2307
2308 The code necessary to make the I2C data line tri-stated
2309 (inactive). If the data line is open collector, this
2310 define can be null.
2311
wdenkb37c7e52003-06-30 16:24:52 +00002312 eg: #define I2C_TRISTATE (immr->im_cpm.cp_pbdir &= ~PB_SDA)
2313
wdenkc6097192002-11-03 00:24:07 +00002314 I2C_READ
2315
York Sun472d5462013-04-01 11:29:11 -07002316 Code that returns true if the I2C data line is high,
2317 false if it is low.
wdenkc6097192002-11-03 00:24:07 +00002318
wdenkb37c7e52003-06-30 16:24:52 +00002319 eg: #define I2C_READ ((immr->im_cpm.cp_pbdat & PB_SDA) != 0)
2320
wdenkc6097192002-11-03 00:24:07 +00002321 I2C_SDA(bit)
2322
York Sun472d5462013-04-01 11:29:11 -07002323 If <bit> is true, sets the I2C data line high. If it
2324 is false, it clears it (low).
wdenkc6097192002-11-03 00:24:07 +00002325
wdenkb37c7e52003-06-30 16:24:52 +00002326 eg: #define I2C_SDA(bit) \
wdenk2535d602003-07-17 23:16:40 +00002327 if(bit) immr->im_cpm.cp_pbdat |= PB_SDA; \
wdenkba56f622004-02-06 23:19:44 +00002328 else immr->im_cpm.cp_pbdat &= ~PB_SDA
wdenkb37c7e52003-06-30 16:24:52 +00002329
wdenkc6097192002-11-03 00:24:07 +00002330 I2C_SCL(bit)
2331
York Sun472d5462013-04-01 11:29:11 -07002332 If <bit> is true, sets the I2C clock line high. If it
2333 is false, it clears it (low).
wdenkc6097192002-11-03 00:24:07 +00002334
wdenkb37c7e52003-06-30 16:24:52 +00002335 eg: #define I2C_SCL(bit) \
wdenk2535d602003-07-17 23:16:40 +00002336 if(bit) immr->im_cpm.cp_pbdat |= PB_SCL; \
wdenkba56f622004-02-06 23:19:44 +00002337 else immr->im_cpm.cp_pbdat &= ~PB_SCL
wdenkb37c7e52003-06-30 16:24:52 +00002338
wdenkc6097192002-11-03 00:24:07 +00002339 I2C_DELAY
2340
2341 This delay is invoked four times per clock cycle so this
2342 controls the rate of data transfer. The data rate thus
wdenkb37c7e52003-06-30 16:24:52 +00002343 is 1 / (I2C_DELAY * 4). Often defined to be something
wdenk945af8d2003-07-16 21:53:01 +00002344 like:
2345
wdenkb37c7e52003-06-30 16:24:52 +00002346 #define I2C_DELAY udelay(2)
wdenkc6097192002-11-03 00:24:07 +00002347
Mike Frysinger793b5722010-07-21 13:38:02 -04002348 CONFIG_SOFT_I2C_GPIO_SCL / CONFIG_SOFT_I2C_GPIO_SDA
2349
2350 If your arch supports the generic GPIO framework (asm/gpio.h),
2351 then you may alternatively define the two GPIOs that are to be
2352 used as SCL / SDA. Any of the previous I2C_xxx macros will
2353 have GPIO-based defaults assigned to them as appropriate.
2354
2355 You should define these to the GPIO value as given directly to
2356 the generic GPIO functions.
2357
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +02002358 CONFIG_SYS_I2C_INIT_BOARD
wdenk47cd00f2003-03-06 13:39:27 +00002359
wdenk8bde7f72003-06-27 21:31:46 +00002360 When a board is reset during an i2c bus transfer
2361 chips might think that the current transfer is still
2362 in progress. On some boards it is possible to access
2363 the i2c SCLK line directly, either by using the
2364 processor pin as a GPIO or by having a second pin
2365 connected to the bus. If this option is defined a
2366 custom i2c_init_board() routine in boards/xxx/board.c
2367 is run early in the boot sequence.
wdenk47cd00f2003-03-06 13:39:27 +00002368
Richard Retanubun26a33502010-04-12 15:08:17 -04002369 CONFIG_SYS_I2C_BOARD_LATE_INIT
2370
2371 An alternative to CONFIG_SYS_I2C_INIT_BOARD. If this option is
2372 defined a custom i2c_board_late_init() routine in
2373 boards/xxx/board.c is run AFTER the operations in i2c_init()
2374 is completed. This callpoint can be used to unreset i2c bus
2375 using CPU i2c controller register accesses for CPUs whose i2c
2376 controller provide such a method. It is called at the end of
2377 i2c_init() to allow i2c_init operations to setup the i2c bus
2378 controller on the CPU (e.g. setting bus speed & slave address).
2379
wdenk17ea1172004-06-06 21:51:03 +00002380 CONFIG_I2CFAST (PPC405GP|PPC405EP only)
2381
2382 This option enables configuration of bi_iic_fast[] flags
2383 in u-boot bd_info structure based on u-boot environment
2384 variable "i2cfast". (see also i2cfast)
2385
Ben Warrenbb99ad62006-09-07 16:50:54 -04002386 CONFIG_I2C_MULTI_BUS
2387
2388 This option allows the use of multiple I2C buses, each of which
Wolfgang Denkc0f40852011-10-26 10:21:21 +00002389 must have a controller. At any point in time, only one bus is
2390 active. To switch to a different bus, use the 'i2c dev' command.
Ben Warrenbb99ad62006-09-07 16:50:54 -04002391 Note that bus numbering is zero-based.
2392
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +02002393 CONFIG_SYS_I2C_NOPROBES
Ben Warrenbb99ad62006-09-07 16:50:54 -04002394
2395 This option specifies a list of I2C devices that will be skipped
Wolfgang Denkc0f40852011-10-26 10:21:21 +00002396 when the 'i2c probe' command is issued. If CONFIG_I2C_MULTI_BUS
Peter Tyser0f89c542009-04-18 22:34:03 -05002397 is set, specify a list of bus-device pairs. Otherwise, specify
2398 a 1D array of device addresses
Ben Warrenbb99ad62006-09-07 16:50:54 -04002399
2400 e.g.
2401 #undef CONFIG_I2C_MULTI_BUS
Wolfgang Denkc0f40852011-10-26 10:21:21 +00002402 #define CONFIG_SYS_I2C_NOPROBES {0x50,0x68}
Ben Warrenbb99ad62006-09-07 16:50:54 -04002403
2404 will skip addresses 0x50 and 0x68 on a board with one I2C bus
2405
Wolfgang Denkc0f40852011-10-26 10:21:21 +00002406 #define CONFIG_I2C_MULTI_BUS
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +02002407 #define CONFIG_SYS_I2C_MULTI_NOPROBES {{0,0x50},{0,0x68},{1,0x54}}
Ben Warrenbb99ad62006-09-07 16:50:54 -04002408
2409 will skip addresses 0x50 and 0x68 on bus 0 and address 0x54 on bus 1
2410
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +02002411 CONFIG_SYS_SPD_BUS_NUM
Timur Tabibe5e6182006-11-03 19:15:00 -06002412
2413 If defined, then this indicates the I2C bus number for DDR SPD.
2414 If not defined, then U-Boot assumes that SPD is on I2C bus 0.
2415
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +02002416 CONFIG_SYS_RTC_BUS_NUM
Stefan Roese0dc018e2007-02-20 10:51:26 +01002417
2418 If defined, then this indicates the I2C bus number for the RTC.
2419 If not defined, then U-Boot assumes that RTC is on I2C bus 0.
2420
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +02002421 CONFIG_SYS_DTT_BUS_NUM
Stefan Roese0dc018e2007-02-20 10:51:26 +01002422
2423 If defined, then this indicates the I2C bus number for the DTT.
2424 If not defined, then U-Boot assumes that DTT is on I2C bus 0.
2425
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +02002426 CONFIG_SYS_I2C_DTT_ADDR:
Victor Gallardo9ebbb542008-09-09 15:13:29 -07002427
2428 If defined, specifies the I2C address of the DTT device.
2429 If not defined, then U-Boot uses predefined value for
2430 specified DTT device.
2431
Andrew Dyer2ac69852008-12-29 17:36:01 -06002432 CONFIG_SOFT_I2C_READ_REPEATED_START
2433
2434 defining this will force the i2c_read() function in
2435 the soft_i2c driver to perform an I2C repeated start
2436 between writing the address pointer and reading the
2437 data. If this define is omitted the default behaviour
2438 of doing a stop-start sequence will be used. Most I2C
2439 devices can use either method, but some require one or
2440 the other.
Timur Tabibe5e6182006-11-03 19:15:00 -06002441
wdenkc6097192002-11-03 00:24:07 +00002442- SPI Support: CONFIG_SPI
2443
2444 Enables SPI driver (so far only tested with
2445 SPI EEPROM, also an instance works with Crystal A/D and
2446 D/As on the SACSng board)
2447
Yoshihiro Shimoda66395622011-01-31 16:50:43 +09002448 CONFIG_SH_SPI
2449
2450 Enables the driver for SPI controller on SuperH. Currently
2451 only SH7757 is supported.
2452
wdenkc6097192002-11-03 00:24:07 +00002453 CONFIG_SPI_X
2454
2455 Enables extended (16-bit) SPI EEPROM addressing.
2456 (symmetrical to CONFIG_I2C_X)
2457
2458 CONFIG_SOFT_SPI
2459
wdenk43d96162003-03-06 00:02:04 +00002460 Enables a software (bit-bang) SPI driver rather than
2461 using hardware support. This is a general purpose
2462 driver that only requires three general I/O port pins
2463 (two outputs, one input) to function. If this is
2464 defined, the board configuration must define several
2465 SPI configuration items (port pins to use, etc). For
2466 an example, see include/configs/sacsng.h.
wdenkc6097192002-11-03 00:24:07 +00002467
Ben Warren04a9e112008-01-16 22:37:35 -05002468 CONFIG_HARD_SPI
2469
2470 Enables a hardware SPI driver for general-purpose reads
2471 and writes. As with CONFIG_SOFT_SPI, the board configuration
2472 must define a list of chip-select function pointers.
Wolfgang Denkc0f40852011-10-26 10:21:21 +00002473 Currently supported on some MPC8xxx processors. For an
Ben Warren04a9e112008-01-16 22:37:35 -05002474 example, see include/configs/mpc8349emds.h.
2475
Guennadi Liakhovetski38254f42008-04-15 14:14:25 +02002476 CONFIG_MXC_SPI
2477
2478 Enables the driver for the SPI controllers on i.MX and MXC
Fabio Estevam2e3cd1c2011-10-28 08:57:46 +00002479 SoCs. Currently i.MX31/35/51 are supported.
Guennadi Liakhovetski38254f42008-04-15 14:14:25 +02002480
Matthias Fuchs01335022007-12-27 17:12:34 +01002481- FPGA Support: CONFIG_FPGA
2482
2483 Enables FPGA subsystem.
2484
2485 CONFIG_FPGA_<vendor>
2486
2487 Enables support for specific chip vendors.
2488 (ALTERA, XILINX)
2489
2490 CONFIG_FPGA_<family>
2491
2492 Enables support for FPGA family.
2493 (SPARTAN2, SPARTAN3, VIRTEX2, CYCLONE2, ACEX1K, ACEX)
2494
2495 CONFIG_FPGA_COUNT
wdenkc6097192002-11-03 00:24:07 +0000