blob: 255c933baa4be2a2440e831f7fdbe97ee32627bd [file] [log] [blame]
Christian Gmeiner39d09732014-10-02 13:33:46 +02001/*
2 * Copyright (C) 2010-2013 Freescale Semiconductor, Inc.
3 * Copyright (C) 2014 Bachmann electronic GmbH
4 *
5 * SPDX-License-Identifier: GPL-2.0+
6 */
7
8#ifndef __CONFIG_H
9#define __CONFIG_H
10
11#include "mx6_common.h"
12#define CONFIG_MX6
13#define CONFIG_DISPLAY_CPUINFO
14#define CONFIG_DISPLAY_BOARDINFO
15
16#include <asm/arch/imx-regs.h>
17#include <asm/imx-common/gpio.h>
18
19#define CONFIG_CMDLINE_TAG
20#define CONFIG_SETUP_MEMORY_TAGS
21#define CONFIG_INITRD_TAG
22#define CONFIG_REVISION_TAG
23#define CONFIG_SYS_GENERIC_BOARD
24
25/* Size of malloc() pool */
26#define CONFIG_SYS_MALLOC_LEN (10 * 1024 * 1024)
27
28#define CONFIG_BOARD_EARLY_INIT_F
29#define CONFIG_MISC_INIT_R
30#define CONFIG_MXC_GPIO
31
32/* FUSE Configs */
33#define CONFIG_CMD_FUSE
34#define CONFIG_MXC_OCOTP
35
36/* UART Configs */
37#define CONFIG_MXC_UART
38#define CONFIG_MXC_UART_BASE UART1_BASE
39
40/* SF Configs */
41#define CONFIG_CMD_SF
42#define CONFIG_SPI
43#define CONFIG_SPI_FLASH
44#define CONFIG_SPI_FLASH_STMICRO
45#define CONFIG_SPI_FLASH_WINBOND
46#define CONFIG_SPI_FLASH_MACRONIX
47#define CONFIG_SPI_FLASH_SST
48#define CONFIG_MXC_SPI
49#define CONFIG_SF_DEFAULT_BUS 2
Christian Gmeiner2e3a1f42014-10-22 11:29:51 +020050#define CONFIG_SF_DEFAULT_CS 0
Christian Gmeiner39d09732014-10-02 13:33:46 +020051#define CONFIG_SF_DEFAULT_SPEED 25000000
52#define CONFIG_SF_DEFAULT_MODE (SPI_MODE_0)
53
54/* IO expander */
55#define CONFIG_PCA953X
56#define CONFIG_SYS_I2C_PCA953X_ADDR 0x20
57#define CONFIG_SYS_I2C_PCA953X_WIDTH { {0x20, 16} }
58#define CONFIG_CMD_PCA953X
59#define CONFIG_CMD_PCA953X_INFO
60
61/* I2C Configs */
62#define CONFIG_CMD_I2C
63#define CONFIG_SYS_I2C
64#define CONFIG_SYS_I2C_MXC
65#define CONFIG_SYS_I2C_SPEED 100000
66
67/* OCOTP Configs */
68#define CONFIG_CMD_IMXOTP
69#define CONFIG_IMX_OTP
70#define IMX_OTP_BASE OCOTP_BASE_ADDR
71#define IMX_OTP_ADDR_MAX 0x7F
72#define IMX_OTP_DATA_ERROR_VAL 0xBADABADA
73#define IMX_OTPWRITE_ENABLED
74
75/* MMC Configs */
76#define CONFIG_FSL_ESDHC
77#define CONFIG_FSL_USDHC
78#define CONFIG_SYS_FSL_ESDHC_ADDR 0
79#define CONFIG_SYS_FSL_USDHC_NUM 2
80
81#define CONFIG_MMC
82#define CONFIG_CMD_MMC
83#define CONFIG_GENERIC_MMC
84#define CONFIG_BOUNCE_BUFFER
85
Christian Gmeiner39c7d5a2014-11-10 14:35:48 +010086/* USB Configs */
87#define CONFIG_CMD_USB
Christian Gmeiner7f223072014-12-04 09:56:32 +010088#define CONFIG_USB_STORAGE
Christian Gmeiner39c7d5a2014-11-10 14:35:48 +010089#define CONFIG_USB_EHCI
90#define CONFIG_USB_EHCI_MX6
91#define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW)
92#define CONFIG_USB_MAX_CONTROLLER_COUNT 2
93
Christian Gmeiner39d09732014-10-02 13:33:46 +020094#ifdef CONFIG_MX6Q
95#define CONFIG_CMD_SATA
96#endif
97
98/*
99 * SATA Configs
100 */
101#ifdef CONFIG_CMD_SATA
102#define CONFIG_DWC_AHSATA
103#define CONFIG_SYS_SATA_MAX_DEVICE 1
104#define CONFIG_DWC_AHSATA_PORT_ID 0
105#define CONFIG_DWC_AHSATA_BASE_ADDR SATA_ARB_BASE_ADDR
106#define CONFIG_LBA48
107#define CONFIG_LIBATA
108#endif
109
110
111#define CONFIG_CMD_PING
112#define CONFIG_CMD_DHCP
113#define CONFIG_CMD_MII
114#define CONFIG_CMD_NET
115#define CONFIG_FEC_MXC
116#define CONFIG_MII
117#define IMX_FEC_BASE ENET_BASE_ADDR
118#define CONFIG_FEC_XCV_TYPE MII100
119#define CONFIG_ETHPRIME "FEC"
120#define CONFIG_FEC_MXC_PHYADDR 0x5
121#define CONFIG_PHYLIB
122#define CONFIG_PHY_SMSC
123
124/* Miscellaneous commands */
125#define CONFIG_CMD_BMODE
126#define CONFIG_CMD_SETEXPR
127
128/* allow to overwrite serial and ethaddr */
129#define CONFIG_ENV_OVERWRITE
130#define CONFIG_CONS_INDEX 1
131#define CONFIG_BAUDRATE 115200
132
133/* Command definition */
134#include <config_cmd_default.h>
135
136#undef CONFIG_CMD_IMLS
137
138#define CONFIG_BOOTDELAY 2
139
140#define CONFIG_PREBOOT ""
141
142#define CONFIG_LOADADDR 0x12000000
143#define CONFIG_SYS_TEXT_BASE 0x17800000
144
145/* Miscellaneous configurable options */
146#define CONFIG_SYS_LONGHELP
147#define CONFIG_SYS_HUSH_PARSER
148#define CONFIG_SYS_CBSIZE 1024
149
150/* Print Buffer Size */
151#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16)
152#define CONFIG_SYS_MAXARGS 16
153#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
154
155#define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
156
157#define CONFIG_CMDLINE_EDITING
158
159/* Physical Memory Map */
160#define CONFIG_NR_DRAM_BANKS 1
161#define PHYS_SDRAM MMDC0_ARB_BASE_ADDR
162#define PHYS_SDRAM_SIZE (1u * 1024 * 1024 * 1024)
163
164#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM
165#define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR
166#define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE
167
168#define CONFIG_SYS_INIT_SP_OFFSET \
169 (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
170#define CONFIG_SYS_INIT_SP_ADDR \
171 (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
172
173/* FLASH and environment organization */
174#define CONFIG_SYS_NO_FLASH
175
176#define CONFIG_ENV_IS_IN_SPI_FLASH
177#define CONFIG_ENV_SIZE (64 * 1024) /* 64 kb */
178#define CONFIG_ENV_OFFSET (1024 * 1024)
179/* M25P16 has an erase size of 64 KiB */
180#define CONFIG_ENV_SECT_SIZE (64 * 1024)
181#define CONFIG_ENV_SPI_BUS CONFIG_SF_DEFAULT_BUS
182#define CONFIG_ENV_SPI_CS CONFIG_SF_DEFAULT_CS
183#define CONFIG_ENV_SPI_MODE CONFIG_SF_DEFAULT_MODE
184#define CONFIG_ENV_SPI_MAX_HZ CONFIG_SF_DEFAULT_SPEED
185
186#define CONFIG_OF_LIBFDT
187#define CONFIG_CMD_BOOTZ
188
189#ifndef CONFIG_SYS_DCACHE_OFF
190#define CONFIG_CMD_CACHE
191#endif
192
193#define CONFIG_CMD_BOOTZ
194#define CONFIG_SUPPORT_RAW_INITRD
195
196/* FS Configs */
197#define CONFIG_CMD_EXT3
198#define CONFIG_CMD_EXT4
199#define CONFIG_DOS_PARTITION
200#define CONFIG_CMD_FS_GENERIC
Christian Gmeinerbd2600d2014-12-04 09:55:36 +0100201#define CONFIG_LIB_UUID
202#define CONFIG_CMD_FS_UUID
Christian Gmeiner39d09732014-10-02 13:33:46 +0200203
204#define CONFIG_BOOTP_SERVERIP
205#define CONFIG_BOOTP_BOOTFILE
206
207#endif /* __CONFIG_H */