blob: 2c583b8b83179803d8a8667bbb1ac5a790c8594d [file] [log] [blame]
Aaron Williamse602dd52020-08-20 07:22:03 +02001// SPDX-License-Identifier: GPL-2.0+
2/*
3 * Copyright (C) 2020 Stefan Roese <sr@denx.de>
4 */
5
6#include <command.h>
7#include <config.h>
8#include <cpu_func.h>
9#include <dm.h>
10#include <elf.h>
11#include <env.h>
Simon Glass401d1c42020-10-30 21:38:53 -060012#include <asm/global_data.h>
Aaron Williamse602dd52020-08-20 07:22:03 +020013
14#include <asm/io.h>
15#include <linux/compat.h>
16#include <linux/ctype.h>
17#include <linux/delay.h>
18#include <linux/io.h>
19
20#include <mach/cvmx-coremask.h>
21#include <mach/cvmx-bootinfo.h>
22#include <mach/cvmx-bootmem.h>
23#include <mach/cvmx-regs.h>
24#include <mach/cvmx-fuse.h>
25#include <mach/octeon-model.h>
26#include <mach/octeon-feature.h>
27#include <mach/bootoct_cmd.h>
Stefan Roeseb0f4ba02020-12-11 17:05:56 +010028#include <mach/cvmx-ciu-defs.h>
Aaron Williamse602dd52020-08-20 07:22:03 +020029
30DECLARE_GLOBAL_DATA_PTR;
31
32/* ToDo: Revisit these settings */
33#define OCTEON_RESERVED_LOW_MEM_SIZE (512 * 1024)
34#define OCTEON_RESERVED_LOW_BOOT_MEM_SIZE (1024 * 1024)
35#define BOOTLOADER_BOOTMEM_DESC_SPACE (1024 * 1024)
36
37/* Default stack and heap sizes, in bytes */
38#define DEFAULT_STACK_SIZE (1 * 1024 * 1024)
39#define DEFAULT_HEAP_SIZE (3 * 1024 * 1024)
40
41/**
42 * NOTE: This must duplicate octeon_boot_descriptor_t in the toolchain
43 * octeon-app-init.h file.
44 */
45enum {
46 /* If set, core should do app-wide init, only one core per app will have
47 * this flag set.
48 */
49 BOOT_FLAG_INIT_CORE = 1,
50 OCTEON_BL_FLAG_DEBUG = 1 << 1,
51 OCTEON_BL_FLAG_NO_MAGIC = 1 << 2,
52 /* If set, use uart1 for console */
53 OCTEON_BL_FLAG_CONSOLE_UART1 = 1 << 3,
54 OCTEON_BL_FLAG_CONSOLE_PCI = 1 << 4, /* If set, use PCI console */
55 /* Call exit on break on serial port */
56 OCTEON_BL_FLAG_BREAK = 1 << 5,
57 /*
58 * Be sure to update OCTEON_APP_INIT_H_VERSION when new fields are added
59 * and to conditionalize the new flag's usage based on the version.
60 */
61} octeon_boot_descriptor_flag;
62
63/**
64 * NOTE: This must duplicate octeon_boot_descriptor_t in the toolchain
65 * octeon-app-init.h file.
66 */
67#ifndef OCTEON_CURRENT_DESC_VERSION
68# define OCTEON_CURRENT_DESC_VERSION 7
69#endif
70/**
71 * NOTE: This must duplicate octeon_boot_descriptor_t in the toolchain
72 * octeon-app-init.h file.
73 */
74/* Version 7 changes: Change names of deprecated fields */
75#ifndef OCTEON_ARGV_MAX_ARGS
76# define OCTEON_ARGV_MAX_ARGS 64
77#endif
78
79/**
80 * NOTE: This must duplicate octeon_boot_descriptor_t in the toolchain
81 * octeon-app-init.h file.
82 */
83#ifndef OCTEON_SERIAL_LEN
84# define OCTEON_SERIAL_LEN 20
85#endif
86
87/**
88 * Bootloader structure used to pass info to Octeon executive startup code.
89 * NOTE: all fields are deprecated except for:
90 * * desc_version
91 * * desc_size,
92 * * heap_base
93 * * heap_end
94 * * eclock_hz
95 * * flags
96 * * argc
97 * * argv
98 * * cvmx_desc_vaddr
99 * * debugger_flags_base_addr
100 *
101 * All other fields have been moved to the cvmx_descriptor, and the new
102 * fields should be added there. They are left as placeholders in this
103 * structure for binary compatibility.
104 *
105 * NOTE: This structure must match what is in the toolchain octeon-app-init.h
106 * file.
107 */
108struct octeon_boot_descriptor {
109 /* Start of block referenced by assembly code - do not change! */
110 u32 desc_version;
111 u32 desc_size;
112 u64 stack_top;
113 u64 heap_base;
114 u64 heap_end;
115 u64 deprecated17;
116 u64 deprecated16;
117 /* End of block referenced by assembly code - do not change! */
118 u32 deprecated18;
119 u32 deprecated15;
120 u32 deprecated14;
121 u32 argc; /* argc for main() */
122 u32 argv[OCTEON_ARGV_MAX_ARGS]; /* argv for main() */
123 u32 flags; /* Flags for application */
124 u32 core_mask; /* Coremask running this image */
125 u32 dram_size; /* DEPRECATED, DRAM size in megabyes. Used up to SDK 1.8.1 */
126 u32 phy_mem_desc_addr;
127 u32 debugger_flags_base_addr; /* used to pass flags from app to debugger. */
128 u32 eclock_hz; /* CPU clock speed, in hz. */
129 u32 deprecated10;
130 u32 deprecated9;
131 u16 deprecated8;
132 u8 deprecated7;
133 u8 deprecated6;
134 u16 deprecated5;
135 u8 deprecated4;
136 u8 deprecated3;
137 char deprecated2[OCTEON_SERIAL_LEN];
138 u8 deprecated1[6];
139 u8 deprecated0;
140 u64 cvmx_desc_vaddr; /* Address of cvmx descriptor */
141};
142
143static struct octeon_boot_descriptor boot_desc[CVMX_MIPS_MAX_CORES];
144static struct cvmx_bootinfo cvmx_bootinfo_array[CVMX_MIPS_MAX_CORES];
145
146/**
147 * Programs the boot bus moveable region
148 * @param base base address to place the boot bus moveable region
149 * (bits [31:7])
150 * @param region_num Selects which region, 0 or 1 for node 0,
151 * 2 or 3 for node 1
152 * @param enable Set true to enable, false to disable
153 * @param data Pointer to data to put in the region, up to
154 * 16 dwords.
155 * @param num_words Number of data dwords (up to 32)
156 *
Heinrich Schuchardt185f8122022-01-19 18:05:50 +0100157 * Return: 0 for success, -1 on error
Aaron Williamse602dd52020-08-20 07:22:03 +0200158 */
159static int octeon_set_moveable_region(u32 base, int region_num,
160 bool enable, const u64 *data,
161 unsigned int num_words)
162{
163 int node = region_num >> 1;
164 u64 val;
165 int i;
166 u8 node_mask = 0x01; /* ToDo: Currently only one node is supported */
167
168 debug("%s(0x%x, %d, %d, %p, %u)\n", __func__, base, region_num, enable,
169 data, num_words);
170
171 if (num_words > 32) {
172 printf("%s: Too many words (%d) for region %d\n", __func__,
173 num_words, region_num);
174 return -1;
175 }
176
177 if (base & 0x7f) {
178 printf("%s: Error: base address 0x%x must be 128 byte aligned\n",
179 __func__, base);
180 return -1;
181 }
182
183 if (region_num > (node_mask > 1 ? 3 : 1)) {
184 printf("%s: Region number %d out of range\n",
185 __func__, region_num);
186 return -1;
187 }
188
189 if (!data && num_words > 0) {
190 printf("%s: Error: NULL data\n", __func__);
191 return -1;
192 }
193
194 region_num &= 1;
195
196 val = MIO_BOOT_LOC_CFG_EN |
197 FIELD_PREP(MIO_BOOT_LOC_CFG_BASE, base >> 7);
198 debug("%s: Setting MIO_BOOT_LOC_CFG(%d) on node %d to 0x%llx\n",
199 __func__, region_num, node, val);
200 csr_wr(CVMX_MIO_BOOT_LOC_CFGX(region_num & 1), val);
201
202 val = FIELD_PREP(MIO_BOOT_LOC_ADR_ADR, (region_num ? 0x80 : 0x00) >> 3);
203 debug("%s: Setting MIO_BOOT_LOC_ADR start to 0x%llx\n", __func__, val);
204 csr_wr(CVMX_MIO_BOOT_LOC_ADR, val);
205
206 for (i = 0; i < num_words; i++) {
207 debug(" 0x%02llx: 0x%016llx\n",
208 csr_rd(CVMX_MIO_BOOT_LOC_ADR), data[i]);
209 csr_wr(CVMX_MIO_BOOT_LOC_DAT, data[i]);
210 }
211
212 return 0;
213}
214
215/**
216 * Parse comma separated numbers into an array
217 *
218 * @param[out] values values read for each node
219 * @param[in] str string to parse
220 * @param base 0 for auto, otherwise 8, 10 or 16 for the number base
221 *
Heinrich Schuchardt185f8122022-01-19 18:05:50 +0100222 * Return: number of values read.
Aaron Williamse602dd52020-08-20 07:22:03 +0200223 */
224static int octeon_parse_nodes(u64 values[CVMX_MAX_NODES],
225 const char *str, int base)
226{
227 int node = 0;
228 char *sep;
229
230 do {
231 debug("Parsing node %d: \"%s\"\n", node, str);
232 values[node] = simple_strtoull(str, &sep, base);
233 debug(" node %d: 0x%llx\n", node, values[node]);
234 str = sep + 1;
235 } while (++node < CVMX_MAX_NODES && *sep == ',');
236
237 debug("%s: returning %d\n", __func__, node);
238 return node;
239}
240
241/**
242 * Parse command line arguments
243 *
244 * @param argc number of arguments
245 * @param[in] argv array of argument strings
246 * @param cmd command type
247 * @param[out] boot_args parsed values
248 *
Heinrich Schuchardt185f8122022-01-19 18:05:50 +0100249 * Return: number of arguments parsed
Aaron Williamse602dd52020-08-20 07:22:03 +0200250 */
251int octeon_parse_bootopts(int argc, char *const argv[],
252 enum octeon_boot_cmd_type cmd,
253 struct octeon_boot_args *boot_args)
254{
255 u64 node_values[CVMX_MAX_NODES];
256 int arg, j;
257 int num_values;
258 int node;
259 u8 node_mask = 0x01; /* ToDo: Currently only one node is supported */
260
261 debug("%s(%d, %p, %d, %p)\n", __func__, argc, argv, cmd, boot_args);
262 memset(boot_args, 0, sizeof(*boot_args));
263 boot_args->stack_size = DEFAULT_STACK_SIZE;
264 boot_args->heap_size = DEFAULT_HEAP_SIZE;
265 boot_args->node_mask = 0;
266
267 for (arg = 0; arg < argc; arg++) {
268 debug(" argv[%d]: %s\n", arg, argv[arg]);
269 if (cmd == BOOTOCT && !strncmp(argv[arg], "stack=", 6)) {
270 boot_args->stack_size = simple_strtoul(argv[arg] + 6,
271 NULL, 0);
272 } else if (cmd == BOOTOCT && !strncmp(argv[arg], "heap=", 5)) {
273 boot_args->heap_size = simple_strtoul(argv[arg] + 5,
274 NULL, 0);
275 } else if (!strncmp(argv[arg], "debug", 5)) {
276 puts("setting debug flag!\n");
277 boot_args->boot_flags |= OCTEON_BL_FLAG_DEBUG;
278 } else if (cmd == BOOTOCT && !strncmp(argv[arg], "break", 5)) {
279 puts("setting break flag!\n");
280 boot_args->boot_flags |= OCTEON_BL_FLAG_BREAK;
281 } else if (!strncmp(argv[arg], "forceboot", 9)) {
282 boot_args->forceboot = true;
283 } else if (!strncmp(argv[arg], "nodemask=", 9)) {
Simon Glass7e5f4602021-07-24 09:03:29 -0600284 boot_args->node_mask = hextoul(argv[arg] + 9, NULL);
Aaron Williamse602dd52020-08-20 07:22:03 +0200285 } else if (!strncmp(argv[arg], "numcores=", 9)) {
286 memset(node_values, 0, sizeof(node_values));
287 num_values = octeon_parse_nodes(node_values,
288 argv[arg] + 9, 0);
289 for (j = 0; j < num_values; j++)
290 boot_args->num_cores[j] = node_values[j];
291 boot_args->num_cores_set = true;
292 } else if (!strncmp(argv[arg], "skipcores=", 10)) {
293 memset(node_values, 0, sizeof(node_values));
294 num_values = octeon_parse_nodes(node_values,
295 argv[arg] + 10, 0);
296 for (j = 0; j < num_values; j++)
297 boot_args->num_skipped[j] = node_values[j];
298 boot_args->num_skipped_set = true;
299 } else if (!strncmp(argv[arg], "console_uart=", 13)) {
300 boot_args->console_uart = simple_strtoul(argv[arg] + 13,
301 NULL, 0);
302 if (boot_args->console_uart == 1) {
303 boot_args->boot_flags |=
304 OCTEON_BL_FLAG_CONSOLE_UART1;
305 } else if (!boot_args->console_uart) {
306 boot_args->boot_flags &=
307 ~OCTEON_BL_FLAG_CONSOLE_UART1;
308 }
309 } else if (!strncmp(argv[arg], "coremask=", 9)) {
310 memset(node_values, 0, sizeof(node_values));
311 num_values = octeon_parse_nodes(node_values,
312 argv[arg] + 9, 16);
313 for (j = 0; j < num_values; j++)
314 cvmx_coremask_set64_node(&boot_args->coremask,
315 j, node_values[j]);
316 boot_args->coremask_set = true;
317 } else if (cmd == BOOTOCTLINUX &&
318 !strncmp(argv[arg], "namedblock=", 11)) {
319 boot_args->named_block = argv[arg] + 11;
320 } else if (!strncmp(argv[arg], "endbootargs", 11)) {
321 boot_args->endbootargs = 1;
322 arg++;
323 if (argc >= arg && cmd != BOOTOCTLINUX)
324 boot_args->app_name = argv[arg];
325 break;
326 } else {
327 debug(" Unknown argument \"%s\"\n", argv[arg]);
328 }
329 }
330
331 if (boot_args->coremask_set && boot_args->num_cores_set) {
332 puts("Warning: both coremask and numcores are set, using coremask.\n");
333 } else if (!boot_args->coremask_set && !boot_args->num_cores_set) {
334 cvmx_coremask_set_core(&boot_args->coremask, 0);
335 boot_args->coremask_set = true;
336 } else if ((!boot_args->coremask_set) && boot_args->num_cores_set) {
337 cvmx_coremask_for_each_node(node, node_mask)
338 cvmx_coremask_set64_node(&boot_args->coremask, node,
339 ((1ull << boot_args->num_cores[node]) - 1) <<
340 boot_args->num_skipped[node]);
341 boot_args->coremask_set = true;
342 }
343
344 /* Update the node mask based on the coremask or the number of cores */
345 for (j = 0; j < CVMX_MAX_NODES; j++) {
346 if (cvmx_coremask_get64_node(&boot_args->coremask, j))
347 boot_args->node_mask |= 1 << j;
348 }
349
350 debug("%s: return %d\n", __func__, arg);
351 return arg;
352}
353
354int do_bootoctlinux(struct cmd_tbl *cmdtp, int flag, int argc,
355 char *const argv[])
356{
357 typedef void __noreturn (*kernel_entry_t)(int, ulong, ulong, ulong);
358 kernel_entry_t kernel;
359 struct octeon_boot_args boot_args;
360 int arg_start = 1;
361 int arg_count;
362 u64 addr = 0; /* Address of the ELF image */
363 int arg0;
364 u64 arg1;
365 u64 arg2;
366 u64 arg3;
367 int ret;
368 struct cvmx_coremask core_mask;
369 struct cvmx_coremask coremask_to_run;
370 struct cvmx_coremask avail_coremask;
371 int first_core;
372 int core;
Aaron Williamse602dd52020-08-20 07:22:03 +0200373 const u64 *nmi_code;
374 int num_dwords;
375 u8 node_mask = 0x01;
376 int i;
377
378 cvmx_coremask_clear_all(&core_mask);
379 cvmx_coremask_clear_all(&coremask_to_run);
380
381 if (argc >= 2 && (isxdigit(argv[1][0]) && (isxdigit(argv[1][1]) ||
382 argv[1][1] == 'x' ||
383 argv[1][1] == 'X' ||
384 argv[1][1] == '\0'))) {
Simon Glass7e5f4602021-07-24 09:03:29 -0600385 addr = hextoul(argv[1], NULL);
Aaron Williamse602dd52020-08-20 07:22:03 +0200386 if (!addr)
387 addr = CONFIG_SYS_LOAD_ADDR;
388 arg_start++;
389 }
390 if (addr == 0)
391 addr = CONFIG_SYS_LOAD_ADDR;
392
393 debug("%s: arg start: %d\n", __func__, arg_start);
394 arg_count = octeon_parse_bootopts(argc - arg_start, argv + arg_start,
395 BOOTOCTLINUX, &boot_args);
396
397 debug("%s:\n"
398 " named block: %s\n"
399 " node mask: 0x%x\n"
400 " stack size: 0x%x\n"
401 " heap size: 0x%x\n"
402 " boot flags: 0x%x\n"
403 " force boot: %s\n"
404 " coremask set: %s\n"
405 " num cores set: %s\n"
406 " num skipped set: %s\n"
407 " endbootargs: %s\n",
408 __func__,
409 boot_args.named_block ? boot_args.named_block : "none",
410 boot_args.node_mask,
411 boot_args.stack_size,
412 boot_args.heap_size,
413 boot_args.boot_flags,
414 boot_args.forceboot ? "true" : "false",
415 boot_args.coremask_set ? "true" : "false",
416 boot_args.num_cores_set ? "true" : "false",
417 boot_args.num_skipped_set ? "true" : "false",
418 boot_args.endbootargs ? "true" : "false");
419 debug(" num cores: ");
420 for (i = 0; i < CVMX_MAX_NODES; i++)
421 debug("%s%d", i > 0 ? ", " : "", boot_args.num_cores[i]);
422 debug("\n num skipped: ");
423 for (i = 0; i < CVMX_MAX_NODES; i++) {
424 debug("%s%d", i > 0 ? ", " : "", boot_args.num_skipped[i]);
425 debug("\n coremask:\n");
426 cvmx_coremask_dprint(&boot_args.coremask);
427 }
428
429 if (boot_args.endbootargs) {
430 debug("endbootargs set, adjusting argc from %d to %d, arg_count: %d, arg_start: %d\n",
431 argc, argc - (arg_count + arg_start), arg_count,
432 arg_start);
433 argc -= (arg_count + arg_start);
434 argv += (arg_count + arg_start);
435 }
436
437 /*
438 * numcores specification overrides a coremask on the same command line
439 */
440 cvmx_coremask_copy(&core_mask, &boot_args.coremask);
441
442 /*
443 * Remove cores from coremask based on environment variable stored in
444 * flash
445 */
446 if (validate_coremask(&core_mask) != 0) {
447 puts("Invalid coremask.\n");
448 return 1;
449 } else if (cvmx_coremask_is_empty(&core_mask)) {
450 puts("Coremask is empty after coremask_override mask. Nothing to do.\n");
451 return 0;
452 }
453
454 if (cvmx_coremask_intersects(&core_mask, &coremask_to_run)) {
455 puts("ERROR: Can't load code on core twice! Provided coremask:\n");
456 cvmx_coremask_print(&core_mask);
457 puts("overlaps previously loaded coremask:\n");
458 cvmx_coremask_print(&coremask_to_run);
459 return -1;
460 }
461
462 debug("Setting up boot descriptor block with core mask:\n");
463 cvmx_coremask_dprint(&core_mask);
464
465 /*
466 * Add coremask to global mask of cores that have been set up and are
467 * runable
468 */
469 cvmx_coremask_or(&coremask_to_run, &coremask_to_run, &core_mask);
470
Aaron Williamse602dd52020-08-20 07:22:03 +0200471 /*
472 * Load kernel ELF image, or try binary if ELF is not detected.
473 * This way the much smaller vmlinux.bin can also be started but
474 * has to be loaded at the correct address (ep as parameter).
475 */
476 if (!valid_elf_image(addr))
477 printf("Booting binary image instead (vmlinux.bin)...\n");
478 else
479 addr = load_elf_image_shdr(addr);
480
481 /* Set kernel entry point */
482 kernel = (kernel_entry_t)addr;
483
484 /* Init bootmem list for Linux kernel booting */
485 if (!cvmx_bootmem_phy_mem_list_init(
Stefan Roeseb7eac192020-10-28 15:10:02 +0100486 gd->ram_size, OCTEON_RESERVED_LOW_MEM_SIZE,
Aaron Williamse602dd52020-08-20 07:22:03 +0200487 (void *)CKSEG0ADDR(BOOTLOADER_BOOTMEM_DESC_SPACE))) {
488 printf("FATAL: Error initializing free memory list\n");
489 return 0;
490 }
491
492 first_core = cvmx_coremask_get_first_core(&coremask_to_run);
493
494 cvmx_coremask_for_each_core(core, &coremask_to_run) {
495 debug("%s: Activating core %d\n", __func__, core);
496
497 cvmx_bootinfo_array[core].core_mask =
498 cvmx_coremask_get32(&coremask_to_run);
499 cvmx_coremask_copy(&cvmx_bootinfo_array[core].ext_core_mask,
500 &coremask_to_run);
501
502 if (core == first_core)
503 cvmx_bootinfo_array[core].flags |= BOOT_FLAG_INIT_CORE;
504
Stefan Roeseb7eac192020-10-28 15:10:02 +0100505 cvmx_bootinfo_array[core].dram_size = gd->ram_size /
506 (1024 * 1024);
Aaron Williamse602dd52020-08-20 07:22:03 +0200507
508 cvmx_bootinfo_array[core].dclock_hz = gd->mem_clk * 1000000;
509 cvmx_bootinfo_array[core].eclock_hz = gd->cpu_clk;
510
511 cvmx_bootinfo_array[core].led_display_base_addr = 0;
512 cvmx_bootinfo_array[core].phy_mem_desc_addr =
513 ((u32)(u64)__cvmx_bootmem_internal_get_desc_ptr()) &
514 0x7ffffff;
515
516 cvmx_bootinfo_array[core].major_version = CVMX_BOOTINFO_MAJ_VER;
517 cvmx_bootinfo_array[core].minor_version = CVMX_BOOTINFO_MIN_VER;
518 cvmx_bootinfo_array[core].fdt_addr = virt_to_phys(gd->fdt_blob);
519
520 boot_desc[core].dram_size = gd->ram_size / (1024 * 1024);
521 boot_desc[core].cvmx_desc_vaddr =
522 virt_to_phys(&cvmx_bootinfo_array[core]);
523
524 boot_desc[core].desc_version = OCTEON_CURRENT_DESC_VERSION;
525 boot_desc[core].desc_size = sizeof(boot_desc[0]);
526
527 boot_desc[core].flags = cvmx_bootinfo_array[core].flags;
528 boot_desc[core].eclock_hz = cvmx_bootinfo_array[core].eclock_hz;
529
530 boot_desc[core].argc = argc;
531 for (i = 0; i < argc; i++)
532 boot_desc[core].argv[i] = (u32)virt_to_phys(argv[i]);
533 }
534
535 core = 0;
536 arg0 = argc;
537 arg1 = (u64)argv;
538 arg2 = 0x1; /* Core 0 sets init core for Linux */
539 arg3 = XKPHYS | virt_to_phys(&boot_desc[core]);
540
541 debug("## Transferring control to Linux (at address %p) ...\n", kernel);
542
543 /*
544 * Flush cache before jumping to application. Let's flush the
545 * whole SDRAM area, since we don't know the size of the image
546 * that was loaded.
547 */
548 flush_cache(gd->ram_base, gd->ram_top - gd->ram_base);
549
550 /* Take all cores out of reset */
551 csr_wr(CVMX_CIU_PP_RST, 0);
552 sync();
553
554 /* Wait a short while for the other cores... */
555 mdelay(100);
556
557 /* Install boot code into moveable bus for NMI (other cores) */
558 nmi_code = (const u64 *)nmi_bootvector;
559 num_dwords = (((u64)&nmi_handler_para[0] - (u64)nmi_code) + 7) / 8;
560
561 ret = octeon_set_moveable_region(0x1fc00000, 0, true, nmi_code,
562 num_dwords);
563 if (ret) {
564 printf("Error installing NMI handler for SMP core startup\n");
565 return 0;
566 }
567
568 /* Write NMI handler parameters for Linux kernel booting */
569 nmi_handler_para[0] = (u64)kernel;
570 nmi_handler_para[1] = arg0;
571 nmi_handler_para[2] = arg1;
572 nmi_handler_para[3] = 0; /* Don't set init core for secondary cores */
573 nmi_handler_para[4] = arg3;
574 sync();
575
576 /* Wait a short while for the other cores... */
577 mdelay(100);
578
579 /*
580 * Cores have already been taken out of reset to conserve power.
581 * We need to send a NMI to get the cores out of their wait loop
582 */
583 octeon_get_available_coremask(&avail_coremask);
584 debug("Available coremask:\n");
585 cvmx_coremask_dprint(&avail_coremask);
586 debug("Starting coremask:\n");
587 cvmx_coremask_dprint(&coremask_to_run);
588 debug("Sending NMIs to other cores\n");
589 if (octeon_has_feature(OCTEON_FEATURE_CIU3)) {
590 u64 avail_cm;
591 int node;
592
593 cvmx_coremask_for_each_node(node, node_mask) {
594 avail_cm = cvmx_coremask_get64_node(&avail_coremask,
595 node);
596
597 if (avail_cm != 0) {
598 debug("Sending NMI to node %d, coremask=0x%llx, CIU3_NMI=0x%llx\n",
599 node, avail_cm,
600 (node > 0 ? -1ull : -2ull) & avail_cm);
601 csr_wr(CVMX_CIU3_NMI,
602 (node > 0 ? -1ull : -2ull) & avail_cm);
603 }
604 }
605 } else {
606 csr_wr(CVMX_CIU_NMI,
607 -2ull & cvmx_coremask_get64(&avail_coremask));
608 }
609 debug("Done sending NMIs\n");
610
611 /* Wait a short while for the other cores... */
612 mdelay(100);
613
614 /*
615 * pass address parameter as argv[0] (aka command name),
616 * and all remaining args
617 * a0 = argc
618 * a1 = argv (32 bit physical addresses, not pointers)
619 * a2 = init core
620 * a3 = boot descriptor address
621 * a4/t0 = entry point (only used by assembly stub)
622 */
623 kernel(arg0, arg1, arg2, arg3);
624
625 return 0;
626}
627
628U_BOOT_CMD(bootoctlinux, 32, 0, do_bootoctlinux,
629 "Boot from a linux ELF image in memory",
630 "elf_address [coremask=mask_to_run | numcores=core_cnt_to_run] "
631 "[forceboot] [skipcores=core_cnt_to_skip] [namedblock=name] [endbootargs] [app_args ...]\n"
632 "elf_address - address of ELF image to load. If 0, default load address\n"
633 " is used.\n"
634 "coremask - mask of cores to run on. Anded with coremask_override\n"
635 " environment variable to ensure only working cores are used\n"
636 "numcores - number of cores to run on. Runs on specified number of cores,\n"
637 " taking into account the coremask_override.\n"
638 "skipcores - only meaningful with numcores. Skips this many cores\n"
639 " (starting from 0) when loading the numcores cores.\n"
640 " For example, setting skipcores to 1 will skip core 0\n"
641 " and load the application starting at the next available core.\n"
642 "forceboot - if set, boots application even if core 0 is not in mask\n"
643 "namedblock - specifies a named block to load the kernel\n"
644 "endbootargs - if set, bootloader does not process any further arguments and\n"
645 " only passes the arguments that follow to the kernel.\n"
646 " If not set, the kernel gets the entire commnad line as\n"
647 " arguments.\n" "\n");