Ying Zhang | 7c8eea5 | 2013-08-16 15:16:12 +0800 | [diff] [blame^] | 1 | /* |
| 2 | * Copyright 2013 Freescale Semiconductor, Inc. |
| 3 | * |
| 4 | * This program is free software; you can redistribute it and/or |
| 5 | * modify it under the terms of the GNU General Public License as |
| 6 | * published by the Free Software Foundation; either version 2 of |
| 7 | * the License, or (at your option) any later version. |
| 8 | * |
| 9 | * This program is distributed in the hope that it will be useful, |
| 10 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 11 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 12 | * |
| 13 | * GNU General Public License for more details. |
| 14 | * |
| 15 | * You should have received a copy of the GNU General Public License |
| 16 | * along with this program; if not, write to the Free Software |
| 17 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, |
| 18 | * MA 02111-1307 USA |
| 19 | * |
| 20 | */ |
| 21 | |
| 22 | #include <common.h> |
| 23 | #include <ns16550.h> |
| 24 | #include <malloc.h> |
| 25 | #include <mmc.h> |
| 26 | #include <nand.h> |
| 27 | #include <i2c.h> |
| 28 | #include "../common/ngpixis.h" |
| 29 | #include <fsl_esdhc.h> |
| 30 | |
| 31 | DECLARE_GLOBAL_DATA_PTR; |
| 32 | |
| 33 | static const u32 sysclk_tbl[] = { |
| 34 | 66666000, 7499900, 83332500, 8999900, |
| 35 | 99999000, 11111000, 12499800, 13333200 |
| 36 | }; |
| 37 | |
| 38 | ulong get_effective_memsize(void) |
| 39 | { |
| 40 | return CONFIG_SYS_L2_SIZE; |
| 41 | } |
| 42 | |
| 43 | void board_init_f(ulong bootflag) |
| 44 | { |
| 45 | int px_spd; |
| 46 | u32 plat_ratio, sys_clk, bus_clk; |
| 47 | ccsr_gur_t *gur = (void *)CONFIG_SYS_MPC85xx_GUTS_ADDR; |
| 48 | |
| 49 | console_init_f(); |
| 50 | |
| 51 | /* Set pmuxcr to allow both i2c1 and i2c2 */ |
| 52 | setbits_be32(&gur->pmuxcr, in_be32(&gur->pmuxcr) | 0x1000); |
| 53 | setbits_be32(&gur->pmuxcr, |
| 54 | in_be32(&gur->pmuxcr) | MPC85xx_PMUXCR_SD_DATA); |
| 55 | |
| 56 | /* Read back the register to synchronize the write. */ |
| 57 | in_be32(&gur->pmuxcr); |
| 58 | |
| 59 | /* initialize selected port with appropriate baud rate */ |
| 60 | px_spd = in_8((unsigned char *)(PIXIS_BASE + PIXIS_SPD)); |
| 61 | sys_clk = sysclk_tbl[px_spd & PIXIS_SPD_SYSCLK_MASK]; |
| 62 | plat_ratio = in_be32(&gur->porpllsr) & MPC85xx_PORPLLSR_PLAT_RATIO; |
| 63 | bus_clk = sys_clk * plat_ratio / 2; |
| 64 | |
| 65 | NS16550_init((NS16550_t)CONFIG_SYS_NS16550_COM1, |
| 66 | bus_clk / 16 / CONFIG_BAUDRATE); |
| 67 | #ifdef CONFIG_SPL_MMC_BOOT |
| 68 | puts("\nSD boot...\n"); |
| 69 | #endif |
| 70 | |
| 71 | /* copy code to RAM and jump to it - this should not return */ |
| 72 | /* NOTE - code has to be copied out of NAND buffer before |
| 73 | * other blocks can be read. |
| 74 | */ |
| 75 | relocate_code(CONFIG_SPL_RELOC_STACK, 0, CONFIG_SPL_RELOC_TEXT_BASE); |
| 76 | } |
| 77 | |
| 78 | void board_init_r(gd_t *gd, ulong dest_addr) |
| 79 | { |
| 80 | /* Pointer is writable since we allocated a register for it */ |
| 81 | gd = (gd_t *)CONFIG_SPL_GD_ADDR; |
| 82 | bd_t *bd; |
| 83 | |
| 84 | memset(gd, 0, sizeof(gd_t)); |
| 85 | bd = (bd_t *)(CONFIG_SPL_GD_ADDR + sizeof(gd_t)); |
| 86 | memset(bd, 0, sizeof(bd_t)); |
| 87 | gd->bd = bd; |
| 88 | bd->bi_memstart = CONFIG_SYS_INIT_L2_ADDR; |
| 89 | bd->bi_memsize = CONFIG_SYS_L2_SIZE; |
| 90 | |
| 91 | probecpu(); |
| 92 | get_clocks(); |
| 93 | mem_malloc_init(CONFIG_SPL_RELOC_MALLOC_ADDR, |
| 94 | CONFIG_SPL_RELOC_MALLOC_SIZE); |
| 95 | env_init(); |
| 96 | #ifdef CONFIG_SPL_MMC_BOOT |
| 97 | mmc_initialize(bd); |
| 98 | #endif |
| 99 | /* relocate environment function pointers etc. */ |
| 100 | env_relocate(); |
| 101 | |
| 102 | i2c_init(CONFIG_SYS_FSL_I2C_SPEED, CONFIG_SYS_I2C_SLAVE); |
| 103 | |
| 104 | gd->ram_size = initdram(0); |
| 105 | puts("Second program loader running in sram...\n"); |
| 106 | |
| 107 | #ifdef CONFIG_SPL_MMC_BOOT |
| 108 | mmc_boot(); |
| 109 | #endif |
| 110 | } |