Michal Simek | 9755e3d | 2019-01-21 15:25:02 +0100 | [diff] [blame] | 1 | // SPDX-License-Identifier: GPL-2.0+ |
| 2 | /* |
| 3 | * (C) Copyright 2014 - 2019 Xilinx, Inc. |
| 4 | * Michal Simek <michal.simek@xilinx.com> |
| 5 | */ |
| 6 | |
| 7 | #include <common.h> |
Michal Simek | fc274a5 | 2019-12-19 17:45:15 +0100 | [diff] [blame] | 8 | #include <asm/sections.h> |
Michal Simek | 9755e3d | 2019-01-21 15:25:02 +0100 | [diff] [blame] | 9 | #include <dm/uclass.h> |
| 10 | #include <i2c.h> |
Michal Simek | 80fdef1 | 2020-03-31 12:39:37 +0200 | [diff] [blame^] | 11 | #include "board.h" |
Michal Simek | 9755e3d | 2019-01-21 15:25:02 +0100 | [diff] [blame] | 12 | |
Michal Simek | 829e8c7 | 2019-01-21 16:29:07 +0100 | [diff] [blame] | 13 | int zynq_board_read_rom_ethaddr(unsigned char *ethaddr) |
| 14 | { |
| 15 | int ret = -EINVAL; |
| 16 | |
| 17 | #if defined(CONFIG_ZYNQ_GEM_I2C_MAC_OFFSET) |
| 18 | struct udevice *dev; |
| 19 | ofnode eeprom; |
| 20 | |
| 21 | eeprom = ofnode_get_chosen_node("xlnx,eeprom"); |
| 22 | if (!ofnode_valid(eeprom)) |
| 23 | return -ENODEV; |
| 24 | |
| 25 | debug("%s: Path to EEPROM %s\n", __func__, |
Simon Glass | 14ca9f7 | 2020-01-27 08:49:43 -0700 | [diff] [blame] | 26 | ofnode_read_chosen_string("xlnx,eeprom")); |
Michal Simek | 829e8c7 | 2019-01-21 16:29:07 +0100 | [diff] [blame] | 27 | |
| 28 | ret = uclass_get_device_by_ofnode(UCLASS_I2C_EEPROM, eeprom, &dev); |
| 29 | if (ret) |
| 30 | return ret; |
| 31 | |
| 32 | ret = dm_i2c_read(dev, CONFIG_ZYNQ_GEM_I2C_MAC_OFFSET, ethaddr, 6); |
| 33 | if (ret) |
| 34 | debug("%s: I2C EEPROM MAC address read failed\n", __func__); |
| 35 | else |
| 36 | debug("%s: I2C EEPROM MAC %pM\n", __func__, ethaddr); |
| 37 | #endif |
| 38 | |
| 39 | return ret; |
| 40 | } |
Ibai Erkiaga | fec657b | 2019-10-02 15:57:36 +0100 | [diff] [blame] | 41 | |
Michal Simek | fc274a5 | 2019-12-19 17:45:15 +0100 | [diff] [blame] | 42 | #if defined(CONFIG_OF_BOARD) || defined(CONFIG_OF_SEPARATE) |
Ibai Erkiaga | fec657b | 2019-10-02 15:57:36 +0100 | [diff] [blame] | 43 | void *board_fdt_blob_setup(void) |
| 44 | { |
Michal Simek | 453bb77 | 2020-03-19 10:23:56 +0100 | [diff] [blame] | 45 | static void *fdt_blob; |
| 46 | |
| 47 | #if !defined(CONFIG_VERSAL_NO_DDR) && !defined(CONFIG_ZYNQMP_NO_DDR) |
| 48 | fdt_blob = (void *)CONFIG_XILINX_OF_BOARD_DTB_ADDR; |
Ibai Erkiaga | fec657b | 2019-10-02 15:57:36 +0100 | [diff] [blame] | 49 | |
Michal Simek | fc274a5 | 2019-12-19 17:45:15 +0100 | [diff] [blame] | 50 | if (fdt_magic(fdt_blob) == FDT_MAGIC) |
| 51 | return fdt_blob; |
Ibai Erkiaga | fec657b | 2019-10-02 15:57:36 +0100 | [diff] [blame] | 52 | |
Michal Simek | fc274a5 | 2019-12-19 17:45:15 +0100 | [diff] [blame] | 53 | debug("DTB is not passed via %p\n", fdt_blob); |
Michal Simek | 453bb77 | 2020-03-19 10:23:56 +0100 | [diff] [blame] | 54 | #endif |
Michal Simek | fc274a5 | 2019-12-19 17:45:15 +0100 | [diff] [blame] | 55 | |
| 56 | #ifdef CONFIG_SPL_BUILD |
| 57 | /* FDT is at end of BSS unless it is in a different memory region */ |
| 58 | if (IS_ENABLED(CONFIG_SPL_SEPARATE_BSS)) |
| 59 | fdt_blob = (ulong *)&_image_binary_end; |
| 60 | else |
| 61 | fdt_blob = (ulong *)&__bss_end; |
| 62 | #else |
| 63 | /* FDT is at end of image */ |
| 64 | fdt_blob = (ulong *)&_end; |
| 65 | #endif |
| 66 | |
| 67 | if (fdt_magic(fdt_blob) == FDT_MAGIC) |
| 68 | return fdt_blob; |
| 69 | |
| 70 | debug("DTB is also not passed via %p\n", fdt_blob); |
| 71 | |
| 72 | return NULL; |
Ibai Erkiaga | fec657b | 2019-10-02 15:57:36 +0100 | [diff] [blame] | 73 | } |
| 74 | #endif |
Michal Simek | 80fdef1 | 2020-03-31 12:39:37 +0200 | [diff] [blame^] | 75 | |
| 76 | int board_late_init_xilinx(void) |
| 77 | { |
| 78 | env_set_hex("script_offset_f", CONFIG_BOOT_SCRIPT_OFFSET); |
| 79 | |
| 80 | return 0; |
| 81 | } |