blob: e085119963b6c69f848d6e722e5ac52c9d86417e [file] [log] [blame]
Simon Glass6c51df62015-06-23 15:39:04 -06001config RAM
2 bool "Enable RAM drivers using Driver Model"
3 depends on DM
4 help
5 This allows drivers to be provided for SDRAM and other RAM
6 controllers and their type to be specified in the board's device
7 tree. Generally some parameters are required to set up the RAM and
8 the RAM size can either be statically defined or dynamically
9 detected.
10
Masahiro Yamada40c9abb2015-08-12 07:31:48 +090011config SPL_RAM
Simon Glass6c51df62015-06-23 15:39:04 -060012 bool "Enable RAM support in SPL"
Philipp Tomsich45233302017-06-29 01:41:52 +020013 depends on RAM && SPL_DM
Simon Glass6c51df62015-06-23 15:39:04 -060014 help
15 The RAM subsystem adds a small amount of overhead to the image.
16 If this is acceptable and you have a need to use RAM drivers in
17 SPL, enable this option. It might provide a cleaner interface to
18 setting up RAM (e.g. SDRAM / DDR) within SPL.
Vikas Manochabf1ae442017-04-10 15:02:51 -070019
Philipp Tomsichc336c3c2017-06-29 01:42:40 +020020config TPL_RAM
Jagan Teki93fd5b02017-08-25 20:16:00 +053021 bool "Enable RAM support in TPL"
Tom Rini8bea4bf2022-06-08 08:24:39 -040022 depends on RAM && TPL
Philipp Tomsichc336c3c2017-06-29 01:42:40 +020023 help
24 The RAM subsystem adds a small amount of overhead to the image.
25 If this is acceptable and you have a need to use RAM drivers in
26 TPL, enable this option. It might provide a cleaner interface to
27 setting up RAM (e.g. SDRAM / DDR) within TPL.
28
Vikas Manochabf1ae442017-04-10 15:02:51 -070029config STM32_SDRAM
30 bool "Enable STM32 SDRAM support"
31 depends on RAM
32 help
33 STM32F7 family devices support flexible memory controller(FMC) to
34 support external memories like sdram, psram & nand.
35 This driver is for the sdram memory interface with the FMC.
Patrick Delaunaye70f70a2018-03-12 10:46:11 +010036
Mario Sixe4061552018-08-06 10:23:30 +020037config MPC83XX_SDRAM
38 bool "Enable MPC83XX SDRAM support"
39 depends on RAM
40 help
41 Enable support for the internal DDR Memory Controller of the MPC83xx
42 family of SoCs. Both static configurations, as well as configuring
43 the RAM through the use of SPD (Serial Presence Detect) is supported
44 via device tree settings.
45
Lokesh Vutla06bda122018-11-02 19:51:02 +053046config K3_AM654_DDRSS
47 bool "Enable AM654 DDRSS support"
Andrew Davis80b93bb2022-07-15 10:25:27 -050048 depends on RAM && SOC_K3_AM654
Lokesh Vutla06bda122018-11-02 19:51:02 +053049 help
50 K3 based AM654 devices has DDR memory subsystem that comprises
51 Synopys DDR controller, Synopsis DDR phy and wrapper logic to
52 intergrate these blocks into the device. This DDR subsystem
53 provides an interface to external SDRAM devices. Enabling this
54 config add support for the initialization of the external
55 SDRAM devices connected to DDR subsystem.
56
Dave Gerlachdb243812021-05-11 10:22:10 -050057config K3_DDRSS
58 bool "Enable K3 DDRSS support"
59 depends on RAM
60
61choice
62 depends on K3_DDRSS
63 prompt "K3 DDRSS Arch Support"
64
David Huang8fdb1c72022-01-25 20:56:35 +053065 default K3_J721E_DDRSS if SOC_K3_J721E || SOC_K3_J721S2
Dave Gerlach9f9b5c12021-05-11 10:22:12 -050066 default K3_AM64_DDRSS if SOC_K3_AM642
Suman Annad98e8602022-05-25 13:38:42 +053067 default K3_AM64_DDRSS if SOC_K3_AM625
Bryan Brattloff54febe2022-11-03 19:13:53 -050068 default K3_AM62A_DDRSS if SOC_K3_AM62A7
Dave Gerlach9f9b5c12021-05-11 10:22:12 -050069
Kevin Scholz3bb3f262019-10-07 19:26:36 +053070config K3_J721E_DDRSS
71 bool "Enable J721E DDRSS support"
Kevin Scholz3bb3f262019-10-07 19:26:36 +053072 help
73 The J721E DDR subsystem comprises DDR controller, DDR PHY and
74 wrapper logic to integrate these blocks in the device. The DDR
75 subsystem is used to provide an interface to external SDRAM
76 devices which can be utilized for storing program or data.
77 Enabling this config adds support for the DDR memory controller
78 on J721E family of SoCs.
79
Dave Gerlach9f9b5c12021-05-11 10:22:12 -050080config K3_AM64_DDRSS
81 bool "Enable AM64 DDRSS support"
82 help
83 The AM64 DDR subsystem comprises DDR controller, DDR PHY and
84 wrapper logic to integrate these blocks in the device. The DDR
85 subsystem is used to provide an interface to external SDRAM
86 devices which can be utilized for storing program or data.
87 Enabling this config adds support for the DDR memory controller
88 on AM642 family of SoCs.
89
Bryan Brattlofee31be42022-10-24 16:53:28 -050090config K3_AM62A_DDRSS
91 bool "Enable AM62A DDRSS support"
92 help
93 The AM62A DDR subsystem comprises of a DDR controller, DDR PHY and
94 wrapper logic to integrate these blocks into once device. The DDR
95 subsystem is used to provide an interface to external SDRAM devices
96 which can be utilized for storing programs or any other data.
97 Enabling this option adds support for the DDR memory controller for
98 the AM62A family of SoCs.
99
Dave Gerlachdb243812021-05-11 10:22:10 -0500100endchoice
101
Giulio Benetticd647fc2020-01-10 15:51:44 +0100102config IMXRT_SDRAM
103 bool "Enable i.MXRT SDRAM support"
104 depends on RAM
105 help
106 i.MXRT family devices support smart external memory controller(SEMC)
107 to support external memories like sdram, psram & nand.
108 This driver is for the sdram memory interface with the SEMC.
109
Dylan Hung04740502020-09-07 16:25:07 +0800110source "drivers/ram/aspeed/Kconfig"
Jagan Teki82ee1382019-07-15 23:58:46 +0530111source "drivers/ram/rockchip/Kconfig"
Pragnesh Patelc514a942020-05-29 11:33:26 +0530112source "drivers/ram/sifive/Kconfig"
Patrick Delaunaye70f70a2018-03-12 10:46:11 +0100113source "drivers/ram/stm32mp1/Kconfig"
Aaron Williams15afe722020-09-02 08:29:08 +0200114source "drivers/ram/octeon/Kconfig"