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wdenk2e5983d2003-07-15 20:04:06 +00001/*
2 * (C) Copyright 2002
3 * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
4 * Marius Groeger <mgroeger@sysgo.de>
5 *
6 * (C) Copyright 2002
7 * David Mueller, ELSOFT AG, <d.mueller@elsoft.ch>
8 *
9 * (C) Copyright 2003
10 * Texas Instruments, <www.ti.com>
11 * Kshitij Gupta <Kshitij@ti.com>
12 *
13 * See file CREDITS for list of people who contributed to this
14 * project.
15 *
16 * This program is free software; you can redistribute it and/or
17 * modify it under the terms of the GNU General Public License as
18 * published by the Free Software Foundation; either version 2 of
19 * the License, or (at your option) any later version.
20 *
21 * This program is distributed in the hope that it will be useful,
22 * but WITHOUT ANY WARRANTY; without even the implied warranty of
23 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
24 * GNU General Public License for more details.
25 *
26 * You should have received a copy of the GNU General Public License
27 * along with this program; if not, write to the Free Software
28 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
29 * MA 02111-1307 USA
30 */
31
32#include <common.h>
33
Wolfgang Denkd87080b2006-03-31 18:32:53 +020034DECLARE_GLOBAL_DATA_PTR;
35
wdenk2e5983d2003-07-15 20:04:06 +000036static void flash__init (void);
37static void ether__init (void);
38
39static inline void delay (unsigned long loops)
40{
41 __asm__ volatile ("1:\n"
42 "subs %0, %1, #1\n"
43 "bne 1b":"=r" (loops):"0" (loops));
44}
45
46/*
47 * Miscellaneous platform dependent initialisations
48 */
49
50int board_init (void)
51{
wdenk2e5983d2003-07-15 20:04:06 +000052 /* arch number of OMAP 1510-Board */
wdenk731215e2004-10-10 18:41:04 +000053 gd->bd->bi_arch_number = MACH_TYPE_OMAP_INNOVATOR;
wdenk2e5983d2003-07-15 20:04:06 +000054
55 /* adress of boot parameters */
56 gd->bd->bi_boot_params = 0x10000100;
57
58/* kk - this speeds up your boot a quite a bit. However to make it
59 * work, you need make sure your kernel startup flush bug is fixed.
60 * ... rkw ...
61 */
62 icache_enable ();
63
64 flash__init ();
65 ether__init ();
66 return 0;
67}
68
69
70int misc_init_r (void)
71{
72 /* volatile ushort *gdir = (ushort *) (GPIO_DIR_CONTROL_REG); */
73 /* volatile ushort *mdir = (ushort *) (MPUIO_DIR_CONTROL_REG); */
74
75 /* setup gpio direction to match board (no floats!) */
76 /**gdir = 0xCFF9; */
77 /**mdir = 0x103F; */
78
79 return (0);
80}
81
82/******************************
83 Routine:
84 Description:
85******************************/
86static void flash__init (void)
87{
88#define CS0_CHIP_SELECT_REG 0xfffecc10
89#define CS3_CHIP_SELECT_REG 0xfffecc1c
90#define EMIFS_GlB_Config_REG 0xfffecc0c
91
92 {
93 unsigned int regval;
94
95 regval = *((volatile unsigned int *) EMIFS_GlB_Config_REG);
96 regval = regval | 0x0001; /* Turn off write protection for flash devices. */
97 if (regval & 0x0002) {
98 regval = regval & 0xfffd; /* Swap CS0 and CS3 so that flash is visible at 0x0 and eeprom at 0x0c000000. */
99 /* If, instead, you want to reference flash at 0x0c000000, then it seemed the following were necessary. */
100 /* *((volatile unsigned int *)CS0_CHIP_SELECT_REG) = 0x202090; / * Overrides head.S setting of 0x212090 */
101 /* *((volatile unsigned int *)CS3_CHIP_SELECT_REG) = 0x202090; / * Let's flash chips be fully functional. */
102 }
103 *((volatile unsigned int *) EMIFS_GlB_Config_REG) = regval;
104 }
105}
106
107
108/******************************
109 Routine:
110 Description:
111******************************/
112static void ether__init (void)
113{
114#define ETH_CONTROL_REG 0x0800000b
115 /* take the Ethernet controller out of reset and wait
116 * for the EEPROM load to complete.
117 */
118 *((volatile unsigned char *) ETH_CONTROL_REG) &= ~0x01;
119 udelay (3);
120}
121
122
123int dram_init (void)
124{
wdenk2e5983d2003-07-15 20:04:06 +0000125 gd->bd->bi_dram[0].start = PHYS_SDRAM_1;
126 gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE;
127
128 return 0;
129}