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gerrit.devboardsforandroid.linaro.org / platform / external / u-boot / 83d290c56fab2d38cd1ab4c4cc7099559c1d5046 / . / arch / arm / mach-uniphier / clk / clk-pro5.c
blob: 338d73d0708507a33c1aaf973343e732071850f4 [file] [log] [blame]
Tom Rini83d290c2018-05-06 17:58:06 -0400[diff] [blame^]1// SPDX-License-Identifier: GPL-2.0+
Masahiro Yamada28f40d42015-09-22 00:27:40 +0900[diff] [blame]2/*
3 * Copyright (C) 2015 Masahiro Yamada <yamada.masahiro@socionext.com>
Masahiro Yamada28f40d42015-09-22 00:27:40 +0900[diff] [blame]4 */
5
6#include <linux/io.h>
Masahiro Yamada107b3fb2016-01-09 01:51:13 +0900[diff] [blame]7
8#include "../init.h"
9#include "../sc-regs.h"
Masahiro Yamada28f40d42015-09-22 00:27:40 +0900[diff] [blame]10
Masahiro Yamada5b660062016-03-30 20:17:02 +0900[diff] [blame]11void uniphier_pro5_clk_init(void)
Masahiro Yamada28f40d42015-09-22 00:27:40 +0900[diff] [blame]12{
13 u32 tmp;
14
15 /* deassert reset */
16 tmp = readl(SC_RSTCTRL);
Masahiro Yamadac7372d62017-10-14 02:21:17 +0900[diff] [blame]17#ifdef CONFIG_USB_DWC3_UNIPHIER
Masahiro Yamada28f40d42015-09-22 00:27:40 +0900[diff] [blame]18 tmp |= SC_RSTCTRL_NRST_USB3B0 | SC_RSTCTRL_NRST_GIO;
19#endif
20#ifdef CONFIG_NAND_DENALI
21 tmp |= SC_RSTCTRL_NRST_NAND;
22#endif
23 writel(tmp, SC_RSTCTRL);
24 readl(SC_RSTCTRL); /* dummy read */
25
Masahiro Yamadac7372d62017-10-14 02:21:17 +0900[diff] [blame]26#ifdef CONFIG_USB_DWC3_UNIPHIER
Masahiro Yamada28f40d42015-09-22 00:27:40 +0900[diff] [blame]27 tmp = readl(SC_RSTCTRL2);
28 tmp |= SC_RSTCTRL2_NRST_USB3B1;
29 writel(tmp, SC_RSTCTRL2);
30 readl(SC_RSTCTRL2); /* dummy read */
31#endif
32
Masahiro Yamada67976302016-03-30 20:17:42 +0900[diff] [blame]33 /* provide clocks */
Masahiro Yamada28f40d42015-09-22 00:27:40 +0900[diff] [blame]34 tmp = readl(SC_CLKCTRL);
Masahiro Yamadac7372d62017-10-14 02:21:17 +0900[diff] [blame]35#ifdef CONFIG_USB_DWC3_UNIPHIER
Masahiro Yamada28f40d42015-09-22 00:27:40 +0900[diff] [blame]36 tmp |= SC_CLKCTRL_CEN_USB31 | SC_CLKCTRL_CEN_USB30 |
37 SC_CLKCTRL_CEN_GIO;
38#endif
39#ifdef CONFIG_NAND_DENALI
40 tmp |= SC_CLKCTRL_CEN_NAND;
41#endif
42 writel(tmp, SC_CLKCTRL);
43 readl(SC_CLKCTRL); /* dummy read */
44}