blob: d1ef559cf4701e1a47448c6c11b092be667242b4 [file] [log] [blame]
Stefan Roeseb79316f2005-08-15 12:31:23 +02001/*
2 * (C) Copyright 2004 Sandburst Corporation
3 *
4 * See file CREDITS for list of people who contributed to this
5 * project.
6 *
7 * This program is free software; you can redistribute it and/or
8 * modify it under the terms of the GNU General Public License as
9 * published by the Free Software Foundation; either version 2 of
10 * the License, or (at your option) any later version.
11 *
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
16 *
17 * You should have received a copy of the GNU General Public License
18 * along with this program; if not, write to the Free Software
19 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
20 * MA 02111-1307 USA
21 */
22
23/************************************************************************
24 * METROBOX.h - configuration Sandburst MetroBox
25 ***********************************************************************/
26
27/*
28 * $Id: METROBOX.h,v 1.21 2005/06/03 15:05:25 tsawyer Exp $
29 *
30 *
31 * $Log: METROBOX.h,v $
32 * Revision 1.21 2005/06/03 15:05:25 tsawyer
33 * MB rev 2.0.3 KA rev 0.0.7. Add CONFIG_VERSION_VARIABLE, Add fakeled to MB
34 *
35 * Revision 1.20 2005/04/11 20:51:11 tsawyer
36 * fix ethernet
37 *
38 * Revision 1.19 2005/04/06 15:13:36 tsawyer
39 * Update appropriate files to coincide with u-boot 1.1.3
40 *
41 * Revision 1.18 2005/03/10 14:16:02 tsawyer
42 * add def'n for cis8201 short etch option.
43 *
44 * Revision 1.17 2005/03/09 19:49:51 tsawyer
45 * Remove KGDB to allow use of 2nd serial port
46 *
47 * Revision 1.16 2004/12/02 19:00:23 tsawyer
48 * Add misc_init_f to turn on i2c-1 and all four fans before sdram init
49 *
50 * Revision 1.15 2004/09/15 18:04:12 tsawyer
51 * add multiple serial port support
52 *
53 * Revision 1.14 2004/09/03 15:27:51 tsawyer
54 * All metrobox boards are at 66.66 sys clock
55 *
56 * Revision 1.13 2004/08/05 20:27:46 tsawyer
57 * Remove system ace definitions, add net console support
58 *
59 * Revision 1.12 2004/07/29 20:00:13 tsawyer
60 * Add i2c bus 1
61 *
62 * Revision 1.11 2004/07/21 13:44:18 tsawyer
63 * SystemACE is out, CF direct to local bus is in
64 *
65 * Revision 1.10 2004/06/29 19:08:55 tsawyer
66 * Add CONFIG_MISC_INIT_R
67 *
Wolfgang Denk3d078ce2005-08-15 16:03:56 +020068 * Revision 1.9 2004/06/28 21:30:53 tsawyer
Stefan Roeseb79316f2005-08-15 12:31:23 +020069 * Fix default BOOTARGS
70 *
Wolfgang Denk3d078ce2005-08-15 16:03:56 +020071 * Revision 1.8 2004/06/17 15:51:08 tsawyer
Stefan Roeseb79316f2005-08-15 12:31:23 +020072 * auto complete
73 *
Wolfgang Denk3d078ce2005-08-15 16:03:56 +020074 * Revision 1.7 2004/06/17 15:08:49 tsawyer
Stefan Roeseb79316f2005-08-15 12:31:23 +020075 * Add autocomplete
76 *
Wolfgang Denk3d078ce2005-08-15 16:03:56 +020077 * Revision 1.6 2004/06/15 12:33:57 tsawyer
Stefan Roeseb79316f2005-08-15 12:31:23 +020078 * debugging checkpoint
79 *
Wolfgang Denk3d078ce2005-08-15 16:03:56 +020080 * Revision 1.5 2004/06/12 19:48:28 tsawyer
Stefan Roeseb79316f2005-08-15 12:31:23 +020081 * Debugging checkpoint
82 *
Wolfgang Denk3d078ce2005-08-15 16:03:56 +020083 * Revision 1.4 2004/06/02 13:03:06 tsawyer
Stefan Roeseb79316f2005-08-15 12:31:23 +020084 * Fix eth addrs
85 *
Wolfgang Denk3d078ce2005-08-15 16:03:56 +020086 * Revision 1.3 2004/05/18 19:56:10 tsawyer
Stefan Roeseb79316f2005-08-15 12:31:23 +020087 * Change default bootcommand to pImage.metrobox
88 *
Wolfgang Denk3d078ce2005-08-15 16:03:56 +020089 * Revision 1.2 2004/05/18 14:13:44 tsawyer
Stefan Roeseb79316f2005-08-15 12:31:23 +020090 * Add bringup values for bootargs and bootcommand.
91 * Remove definition of ipaddress and serverip addresses.
92 *
Wolfgang Denk3d078ce2005-08-15 16:03:56 +020093 * Revision 1.1 2004/04/16 15:08:54 tsawyer
Stefan Roeseb79316f2005-08-15 12:31:23 +020094 * Initial Revision
95 *
96 *
97 */
98
99#ifndef __CONFIG_H
100#define __CONFIG_H
101
102/*-----------------------------------------------------------------------
103 * High Level Configuration Options
104 *----------------------------------------------------------------------*/
Wolfgang Denk3d078ce2005-08-15 16:03:56 +0200105#define CONFIG_METROBOX 1 /* Board is Metrobox */
106#define CONFIG_440GX 1 /* Specifc GX support */
Grzegorz Bernackiefa35cf2007-06-15 11:19:28 +0200107#define CONFIG_440 1 /* ... PPC440 family */
Wolfgang Denk3d078ce2005-08-15 16:03:56 +0200108#define CONFIG_4xx 1 /* ... PPC4xx family */
Stefan Roeseb79316f2005-08-15 12:31:23 +0200109#define CONFIG_BOARD_EARLY_INIT_F 1 /* Call board_pre_init */
Wolfgang Denk3d078ce2005-08-15 16:03:56 +0200110#define CONFIG_MISC_INIT_F 1 /* Call board misc_init_f */
111#define CONFIG_MISC_INIT_R 1 /* Call board misc_init_r */
Wolfgang Denk2ae18242010-10-06 09:05:45 +0200112
113#define CONFIG_SYS_TEXT_BASE 0xFFF80000
114
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200115#undef CONFIG_SYS_DRAM_TEST /* Disable-takes long time!*/
Wolfgang Denk3d078ce2005-08-15 16:03:56 +0200116#define CONFIG_SYS_CLK_FREQ 66666666 /* external freq to pll */
Stefan Roeseb79316f2005-08-15 12:31:23 +0200117
118#define CONFIG_VERY_BIG_RAM 1
119#define CONFIG_VERSION_VARIABLE
120
121#define CONFIG_IDENT_STRING " Sandburst Metrobox"
122
123/*-----------------------------------------------------------------------
124 * Base addresses -- Note these are effective addresses where the
125 * actual resources get mapped (not physical addresses)
126 *----------------------------------------------------------------------*/
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200127#define CONFIG_SYS_SDRAM_BASE 0x00000000 /* _must_ be 0 */
128#define CONFIG_SYS_FLASH_BASE 0xfff80000 /* start of FLASH */
129#define CONFIG_SYS_MONITOR_BASE 0xfff80000 /* start of monitor */
130#define CONFIG_SYS_PCI_MEMBASE 0x80000000 /* mapped pci memory */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200131#define CONFIG_SYS_ISRAM_BASE 0xc0000000 /* internal SRAM */
132#define CONFIG_SYS_PCI_BASE 0xd0000000 /* internal PCI regs */
Stefan Roeseb79316f2005-08-15 12:31:23 +0200133
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200134#define CONFIG_SYS_NVRAM_BASE_ADDR (CONFIG_SYS_PERIPHERAL_BASE + 0x08000000)
135#define CONFIG_SYS_FPGA_BASE (CONFIG_SYS_PERIPHERAL_BASE + 0x08200000)
136#define CONFIG_SYS_BME32_BASE (CONFIG_SYS_PERIPHERAL_BASE + 0x08500000)
137#define CONFIG_SYS_GPIO_BASE (CONFIG_SYS_PERIPHERAL_BASE + 0x00000700)
Stefan Roeseb79316f2005-08-15 12:31:23 +0200138
139/*-----------------------------------------------------------------------
140 * Initial RAM & stack pointer (placed in internal SRAM)
141 *----------------------------------------------------------------------*/
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200142#define CONFIG_SYS_TEMP_STACK_OCM 1
143#define CONFIG_SYS_OCM_DATA_ADDR CONFIG_SYS_ISRAM_BASE
144#define CONFIG_SYS_INIT_RAM_ADDR CONFIG_SYS_ISRAM_BASE /* Initial RAM address */
Wolfgang Denk553f0982010-10-26 13:32:32 +0200145#define CONFIG_SYS_INIT_RAM_SIZE 0x2000 /* Size of used area in RAM */
Stefan Roeseb79316f2005-08-15 12:31:23 +0200146
Wolfgang Denk25ddd1f2010-10-26 14:34:52 +0200147#define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
Michael Zaidman800eb092010-09-20 08:51:53 +0200148#define CONFIG_SYS_INIT_SP_OFFSET (CONFIG_SYS_GBL_DATA_OFFSET - 0x4)
Stefan Roeseb79316f2005-08-15 12:31:23 +0200149
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200150#define CONFIG_SYS_MONITOR_LEN (256 * 1024) /* Rsrv 256kB for Mon */
151#define CONFIG_SYS_MALLOC_LEN (128 * 1024) /* Rsrv 128kB for malloc */
Stefan Roeseb79316f2005-08-15 12:31:23 +0200152
153/*-----------------------------------------------------------------------
154 * Serial Port
155 *----------------------------------------------------------------------*/
Stefan Roese550650d2010-09-20 16:05:31 +0200156#define CONFIG_CONS_INDEX 1 /* Use UART0 */
157#define CONFIG_SYS_NS16550
158#define CONFIG_SYS_NS16550_SERIAL
159#define CONFIG_SYS_NS16550_REG_SIZE 1
160#define CONFIG_SYS_NS16550_CLK get_serial_clock()
Stefan Roeseb79316f2005-08-15 12:31:23 +0200161#define CONFIG_BAUDRATE 9600
162
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200163#define CONFIG_SYS_BAUDRATE_TABLE \
Stefan Roeseb79316f2005-08-15 12:31:23 +0200164 {300, 600, 1200, 2400, 4800, 9600, 19200, 38400, 57600, 115200}
165
166/*-----------------------------------------------------------------------
167 * NVRAM/RTC
168 *
169 * NOTE: Upper 8 bytes of NVRAM is where the RTC registers are located.
170 * The DS1743 code assumes this condition (i.e. -- it assumes the base
171 * address for the RTC registers is:
172 *
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200173 * CONFIG_SYS_NVRAM_BASE_ADDR + CONFIG_SYS_NVRAM_SIZE
Stefan Roeseb79316f2005-08-15 12:31:23 +0200174 *
175 *----------------------------------------------------------------------*/
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200176#define CONFIG_SYS_NVRAM_SIZE (0x2000 - 8) /* NVRAM size(8k)- RTC regs*/
Wolfgang Denk3d078ce2005-08-15 16:03:56 +0200177#define CONFIG_RTC_DS174x 1 /* DS1743 RTC */
Stefan Roeseb79316f2005-08-15 12:31:23 +0200178
179/*-----------------------------------------------------------------------
180 * FLASH related
181 *----------------------------------------------------------------------*/
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200182#define CONFIG_SYS_MAX_FLASH_BANKS 1 /* number of banks */
183#define CONFIG_SYS_MAX_FLASH_SECT 8 /* sectors per device */
Stefan Roeseb79316f2005-08-15 12:31:23 +0200184
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200185#undef CONFIG_SYS_FLASH_CHECKSUM
186#define CONFIG_SYS_FLASH_ERASE_TOUT 120000 /* Flash Erase TO (in ms) */
187#define CONFIG_SYS_FLASH_WRITE_TOUT 500 /* Flash Write TO(in ms) */
Stefan Roeseb79316f2005-08-15 12:31:23 +0200188
189/*-----------------------------------------------------------------------
190 * DDR SDRAM
191 *----------------------------------------------------------------------*/
Wolfgang Denk3d078ce2005-08-15 16:03:56 +0200192#define CONFIG_SPD_EEPROM 1 /* Use SPD EEPROM for setup*/
193#define SPD_EEPROM_ADDRESS {0x53} /* SPD i2c spd addresses */
Stefan Roeseb79316f2005-08-15 12:31:23 +0200194
195/*-----------------------------------------------------------------------
196 * I2C
197 *----------------------------------------------------------------------*/
Wolfgang Denk3d078ce2005-08-15 16:03:56 +0200198#define CONFIG_HARD_I2C 1 /* I2C hardware support */
199#undef CONFIG_SOFT_I2C /* I2C !bit-banged */
Stefan Roesed0b0dca2010-04-01 14:37:24 +0200200#define CONFIG_PPC4XX_I2C /* use PPC4xx driver */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200201#define CONFIG_SYS_I2C_SPEED 400000 /* I2C speed 400kHz */
202#define CONFIG_SYS_I2C_SLAVE 0x7F /* I2C slave address */
203#define CONFIG_SYS_I2C_NOPROBES {0x69} /* Don't probe these addrs */
Wolfgang Denk3d078ce2005-08-15 16:03:56 +0200204#define CONFIG_I2C_BUS1 1 /* Include i2c bus 1 supp */
Stefan Roeseb79316f2005-08-15 12:31:23 +0200205
206
207/*-----------------------------------------------------------------------
208 * Environment
209 *----------------------------------------------------------------------*/
Jean-Christophe PLAGNIOL-VILLARD9314cee2008-09-10 22:47:59 +0200210#define CONFIG_ENV_IS_IN_NVRAM 1 /* Environment uses NVRAM */
Jean-Christophe PLAGNIOL-VILLARD5a1aceb2008-09-10 22:48:04 +0200211#undef CONFIG_ENV_IS_IN_FLASH /* ... not in flash */
Jean-Christophe PLAGNIOL-VILLARDbb1f8b42008-09-05 09:19:30 +0200212#undef CONFIG_ENV_IS_IN_EEPROM /* ... not in EEPROM */
Wolfgang Denk3d078ce2005-08-15 16:03:56 +0200213#define CONFIG_ENV_OVERWRITE 1 /* allow env overwrite */
Stefan Roeseb79316f2005-08-15 12:31:23 +0200214
Jean-Christophe PLAGNIOL-VILLARD0e8d1582008-09-10 22:48:06 +0200215#define CONFIG_ENV_SIZE 0x1000 /* Size of Env vars */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200216#define CONFIG_ENV_ADDR (CONFIG_SYS_NVRAM_BASE_ADDR)
Stefan Roeseb79316f2005-08-15 12:31:23 +0200217
218#define CONFIG_BOOTARGS "console=ttyS0,9600 root=/dev/nfs rw nfsroot=$serverip:/home/metrobox0 nfsaddrs=$ipaddr:::::eth0:none "
219#define CONFIG_BOOTCOMMAND "tftp 8000000 pImage.metrobox;bootm 8000000"
Wolfgang Denk3d078ce2005-08-15 16:03:56 +0200220#define CONFIG_BOOTDELAY 5 /* disable autoboot */
Stefan Roeseb79316f2005-08-15 12:31:23 +0200221
Wolfgang Denk3d078ce2005-08-15 16:03:56 +0200222#define CONFIG_LOADS_ECHO 1 /* echo on for serial dnld */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200223#define CONFIG_SYS_LOADS_BAUD_CHANGE 1 /* allow baudrate change */
Stefan Roeseb79316f2005-08-15 12:31:23 +0200224
225/*-----------------------------------------------------------------------
226 * Networking
227 *----------------------------------------------------------------------*/
Ben Warren96e21f82008-10-27 23:50:15 -0700228#define CONFIG_PPC4xx_EMAC
Wolfgang Denk3d078ce2005-08-15 16:03:56 +0200229#define CONFIG_MII 1 /* MII PHY management */
Wolfgang Denk3d078ce2005-08-15 16:03:56 +0200230#define CONFIG_PHY_ADDR 0xff /* no phy on EMAC0 */
231#define CONFIG_PHY1_ADDR 0xff /* no phy on EMAC1 */
232#define CONFIG_PHY2_ADDR 0x08 /* PHY addr, MGMT, EMAC2 */
233#define CONFIG_PHY3_ADDR 0x18 /* PHY addr, LCL, EMAC3 */
Stefan Roeseb79316f2005-08-15 12:31:23 +0200234#define CONFIG_HAS_ETH0
235#define CONFIG_HAS_ETH1
236#define CONFIG_HAS_ETH2
237#define CONFIG_HAS_ETH3
Stefan Roesed6c61aa2005-08-16 18:18:00 +0200238#define CONFIG_PHY_RESET 1 /* reset phy upon startup */
Wolfgang Denk3d078ce2005-08-15 16:03:56 +0200239#define CONFIG_CIS8201_PHY 1 /* RGMII mode for Cicada */
240#define CONFIG_CIS8201_SHORT_ETCH 1 /* Use short etch mode */
241#define CONFIG_PHY_GIGE 1 /* GbE speed/duplex detect */
Stefan Roeseb79316f2005-08-15 12:31:23 +0200242#define CONFIG_PHY_RESET_DELAY 1000
Wolfgang Denk3d078ce2005-08-15 16:03:56 +0200243#define CONFIG_NETMASK 255.255.0.0
244#define CONFIG_ETHADDR 00:00:00:00:00:00 /* No EMAC 0 support */
245#define CONFIG_ETH1ADDR 00:00:00:00:00:00 /* No EMAC 1 support */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200246#define CONFIG_SYS_RX_ETH_BUFFER 32 /* #eth rx buff & descrs */
Stefan Roeseb79316f2005-08-15 12:31:23 +0200247
248
Jon Loeliger8353e132007-07-08 14:14:17 -0500249/*
Jon Loeliger659e2f62007-07-10 09:10:49 -0500250 * BOOTP options
251 */
252#define CONFIG_BOOTP_BOOTFILESIZE
253#define CONFIG_BOOTP_BOOTPATH
254#define CONFIG_BOOTP_GATEWAY
255#define CONFIG_BOOTP_HOSTNAME
256
257
258/*
Jon Loeliger8353e132007-07-08 14:14:17 -0500259 * Command line configuration.
260 */
261#include <config_cmd_default.h>
Stefan Roeseb79316f2005-08-15 12:31:23 +0200262
Jon Loeliger8353e132007-07-08 14:14:17 -0500263#define CONFIG_CMD_PCI
264#define CONFIG_CMD_IRQ
265#define CONFIG_CMD_I2C
266#define CONFIG_CMD_DHCP
267#define CONFIG_CMD_DATE
268#define CONFIG_CMD_BEDBUG
269#define CONFIG_CMD_PING
270#define CONFIG_CMD_DIAG
271#define CONFIG_CMD_MII
272#define CONFIG_CMD_NET
273#define CONFIG_CMD_ELF
274#define CONFIG_CMD_IDE
275#define CONFIG_CMD_FAT
Stefan Roeseb79316f2005-08-15 12:31:23 +0200276
277
278/* Include NetConsole support */
279#define CONFIG_NETCONSOLE
280
281/* Include auto complete with tabs */
282#define CONFIG_AUTO_COMPLETE 1
Wolfgang Denk8078f1a2006-10-28 02:28:02 +0200283#define CONFIG_AUTO_COMPLETE 1
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200284#define CONFIG_SYS_ALT_MEMTEST 1 /* use real memory test */
Stefan Roeseb79316f2005-08-15 12:31:23 +0200285
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200286#define CONFIG_SYS_LONGHELP /* undef to save memory */
287#define CONFIG_SYS_PROMPT "MetroBox=> " /* Monitor Command Prompt */
Stefan Roeseb79316f2005-08-15 12:31:23 +0200288
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200289#define CONFIG_SYS_HUSH_PARSER 1 /* HUSH for ext'd cli */
Stefan Roeseb79316f2005-08-15 12:31:23 +0200290
291
292/*-----------------------------------------------------------------------
293 * Console Buffer
294 *----------------------------------------------------------------------*/
Jon Loeliger8353e132007-07-08 14:14:17 -0500295#if defined(CONFIG_CMD_KGDB)
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200296#define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */
Stefan Roeseb79316f2005-08-15 12:31:23 +0200297#else
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200298#define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */
Stefan Roeseb79316f2005-08-15 12:31:23 +0200299#endif
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200300#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16)
Wolfgang Denk3d078ce2005-08-15 16:03:56 +0200301 /* Print Buffer Size */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200302#define CONFIG_SYS_MAXARGS 16 /* max number of cmd args */
303#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Arg Buffer Size */
Stefan Roeseb79316f2005-08-15 12:31:23 +0200304
305/*-----------------------------------------------------------------------
306 * Memory Test
307 *----------------------------------------------------------------------*/
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200308#define CONFIG_SYS_MEMTEST_START 0x0400000 /* memtest works on */
309#define CONFIG_SYS_MEMTEST_END 0x0C00000 /* 4 ... 12 MB in DRAM */
Stefan Roeseb79316f2005-08-15 12:31:23 +0200310
311/*-----------------------------------------------------------------------
312 * Compact Flash (in true IDE mode)
313 *----------------------------------------------------------------------*/
314#undef CONFIG_IDE_8xx_DIRECT /* no pcmcia interface required */
315#undef CONFIG_IDE_LED /* no led for ide supported */
316
Wolfgang Denk3d078ce2005-08-15 16:03:56 +0200317#define CONFIG_IDE_RESET /* reset for ide supported */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200318#define CONFIG_SYS_IDE_MAXBUS 1 /* max. 1 IDE busses */
319#define CONFIG_SYS_IDE_MAXDEVICE (CONFIG_SYS_IDE_MAXBUS*1) /* max. 1 drives per IDE bus */
Stefan Roeseb79316f2005-08-15 12:31:23 +0200320
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200321#define CONFIG_SYS_ATA_BASE_ADDR 0xF0000000
322#define CONFIG_SYS_ATA_IDE0_OFFSET 0x0000
323#define CONFIG_SYS_ATA_DATA_OFFSET 0x0000 /* Offset for data I/O */
324#define CONFIG_SYS_ATA_REG_OFFSET 0x0000 /* Offset for normal register accesses*/
325#define CONFIG_SYS_ATA_ALT_OFFSET 0x100000 /* Offset for alternate registers */
Stefan Roeseb79316f2005-08-15 12:31:23 +0200326
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200327#define CONFIG_SYS_ATA_STRIDE 2 /* Directly connected CF, needs a stride
Wolfgang Denk3d078ce2005-08-15 16:03:56 +0200328 to get to the correct offset */
329#define CONFIG_DOS_PARTITION 1 /* Include dos partition */
Stefan Roeseb79316f2005-08-15 12:31:23 +0200330
331/*-----------------------------------------------------------------------
332 * PCI
333 *----------------------------------------------------------------------*/
334/* General PCI */
Wolfgang Denk3d078ce2005-08-15 16:03:56 +0200335#define CONFIG_PCI /* include pci support */
Gabor Juhos842033e2013-05-30 07:06:12 +0000336#define CONFIG_PCI_INDIRECT_BRIDGE /* indirect PCI bridge support */
Wolfgang Denk3d078ce2005-08-15 16:03:56 +0200337#define CONFIG_PCI_PNP /* do pci plug-and-play */
338#define CONFIG_PCI_SCAN_SHOW /* show pci devices */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200339#define CONFIG_SYS_PCI_TARGBASE (CONFIG_SYS_PCI_MEMBASE)
Stefan Roeseb79316f2005-08-15 12:31:23 +0200340
341/* Board-specific PCI */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200342#define CONFIG_SYS_PCI_TARGET_INIT /* let board init pci target*/
Stefan Roeseb79316f2005-08-15 12:31:23 +0200343
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200344#define CONFIG_SYS_PCI_SUBSYS_VENDORID 0x17BA /* Sandburst */
345#define CONFIG_SYS_PCI_SUBSYS_DEVICEID 0xcafe /* Whatever */
Stefan Roeseb79316f2005-08-15 12:31:23 +0200346
347/*
348 * For booting Linux, the board info and command line data
349 * have to be in the first 8 MB of memory, since this is
350 * the maximum mapped by the Linux kernel during initialization.
351 */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200352#define CONFIG_SYS_BOOTMAPSZ (8 << 20) /* Initial Memory map for Linux */
Stefan Roeseb79316f2005-08-15 12:31:23 +0200353
Jon Loeliger8353e132007-07-08 14:14:17 -0500354#if defined(CONFIG_CMD_KGDB)
Wolfgang Denk3d078ce2005-08-15 16:03:56 +0200355#define CONFIG_KGDB_BAUDRATE 230400 /* kgdb serial port baud */
356#define CONFIG_KGDB_SER_INDEX 2 /* kgdb serial port */
Stefan Roeseb79316f2005-08-15 12:31:23 +0200357#endif
358
359/*-----------------------------------------------------------------------
360 * Miscellaneous configurable options
361 *----------------------------------------------------------------------*/
Wolfgang Denk3d078ce2005-08-15 16:03:56 +0200362#undef CONFIG_WATCHDOG /* watchdog disabled */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200363#define CONFIG_SYS_LOAD_ADDR 0x8000000 /* default load address */
364#define CONFIG_SYS_EXTBDINFO 1 /* use extended board_info */
Stefan Roeseb79316f2005-08-15 12:31:23 +0200365
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200366#define CONFIG_SYS_HZ 100 /* decr freq: 1 ms ticks */
Stefan Roeseb79316f2005-08-15 12:31:23 +0200367
368
369#endif /* __CONFIG_H */