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Haavard Skinnemoen5c1fe1f2006-01-20 10:03:34 +01001/*
2 * Copyright (C) 2005-2006 Atmel Corporation
3 *
Wolfgang Denk1a459662013-07-08 09:37:19 +02004 * SPDX-License-Identifier: GPL-2.0+
Haavard Skinnemoen5c1fe1f2006-01-20 10:03:34 +01005 */
6#include <common.h>
7
Haavard Skinnemoen5c1fe1f2006-01-20 10:03:34 +01008/*
9 * The u-boot networking stack is a little weird. It seems like the
10 * networking core allocates receive buffers up front without any
11 * regard to the hardware that's supposed to actually receive those
12 * packets.
13 *
14 * The MACB receives packets into 128-byte receive buffers, so the
15 * buffers allocated by the core isn't very practical to use. We'll
16 * allocate our own, but we need one such buffer in case a packet
17 * wraps around the DMA ring so that we have to copy it.
18 *
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +020019 * Therefore, define CONFIG_SYS_RX_ETH_BUFFER to 1 in the board-specific
Haavard Skinnemoen5c1fe1f2006-01-20 10:03:34 +010020 * configuration header. This way, the core allocates one RX buffer
21 * and one TX buffer, each of which can hold a ethernet packet of
22 * maximum size.
23 *
24 * For some reason, the networking core unconditionally specifies a
25 * 32-byte packet "alignment" (which really should be called
26 * "padding"). MACB shouldn't need that, but we'll refrain from any
27 * core modifications here...
28 */
29
30#include <net.h>
Ben Warren89973f82008-08-31 22:22:04 -070031#include <netdev.h>
Haavard Skinnemoen5c1fe1f2006-01-20 10:03:34 +010032#include <malloc.h>
Semih Hazar0f751d62009-12-17 15:07:15 +020033#include <miiphy.h>
Haavard Skinnemoen5c1fe1f2006-01-20 10:03:34 +010034
35#include <linux/mii.h>
36#include <asm/io.h>
37#include <asm/dma-mapping.h>
38#include <asm/arch/clk.h>
Bo Shen8314ccd2013-08-19 10:35:47 +080039#include <asm-generic/errno.h>
Haavard Skinnemoen5c1fe1f2006-01-20 10:03:34 +010040
41#include "macb.h"
42
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +020043#define CONFIG_SYS_MACB_RX_BUFFER_SIZE 4096
44#define CONFIG_SYS_MACB_RX_RING_SIZE (CONFIG_SYS_MACB_RX_BUFFER_SIZE / 128)
45#define CONFIG_SYS_MACB_TX_RING_SIZE 16
46#define CONFIG_SYS_MACB_TX_TIMEOUT 1000
47#define CONFIG_SYS_MACB_AUTONEG_TIMEOUT 5000000
Haavard Skinnemoen5c1fe1f2006-01-20 10:03:34 +010048
49struct macb_dma_desc {
50 u32 addr;
51 u32 ctrl;
52};
53
54#define RXADDR_USED 0x00000001
55#define RXADDR_WRAP 0x00000002
56
57#define RXBUF_FRMLEN_MASK 0x00000fff
58#define RXBUF_FRAME_START 0x00004000
59#define RXBUF_FRAME_END 0x00008000
60#define RXBUF_TYPEID_MATCH 0x00400000
61#define RXBUF_ADDR4_MATCH 0x00800000
62#define RXBUF_ADDR3_MATCH 0x01000000
63#define RXBUF_ADDR2_MATCH 0x02000000
64#define RXBUF_ADDR1_MATCH 0x04000000
65#define RXBUF_BROADCAST 0x80000000
66
67#define TXBUF_FRMLEN_MASK 0x000007ff
68#define TXBUF_FRAME_END 0x00008000
69#define TXBUF_NOCRC 0x00010000
70#define TXBUF_EXHAUSTED 0x08000000
71#define TXBUF_UNDERRUN 0x10000000
72#define TXBUF_MAXRETRY 0x20000000
73#define TXBUF_WRAP 0x40000000
74#define TXBUF_USED 0x80000000
75
76struct macb_device {
77 void *regs;
78
79 unsigned int rx_tail;
80 unsigned int tx_head;
81 unsigned int tx_tail;
82
83 void *rx_buffer;
84 void *tx_buffer;
85 struct macb_dma_desc *rx_ring;
86 struct macb_dma_desc *tx_ring;
87
88 unsigned long rx_buffer_dma;
89 unsigned long rx_ring_dma;
90 unsigned long tx_ring_dma;
91
92 const struct device *dev;
93 struct eth_device netdev;
94 unsigned short phy_addr;
Bo Shenb1a00062013-04-24 15:59:27 +080095 struct mii_dev *bus;
Haavard Skinnemoen5c1fe1f2006-01-20 10:03:34 +010096};
97#define to_macb(_nd) container_of(_nd, struct macb_device, netdev)
98
Bo Shend256be22013-04-24 15:59:28 +080099static int macb_is_gem(struct macb_device *macb)
100{
101 return MACB_BFEXT(IDNUM, macb_readl(macb, MID)) == 0x2;
102}
103
Haavard Skinnemoen5c1fe1f2006-01-20 10:03:34 +0100104static void macb_mdio_write(struct macb_device *macb, u8 reg, u16 value)
105{
106 unsigned long netctl;
107 unsigned long netstat;
108 unsigned long frame;
109
110 netctl = macb_readl(macb, NCR);
111 netctl |= MACB_BIT(MPE);
112 macb_writel(macb, NCR, netctl);
113
114 frame = (MACB_BF(SOF, 1)
115 | MACB_BF(RW, 1)
116 | MACB_BF(PHYA, macb->phy_addr)
117 | MACB_BF(REGA, reg)
118 | MACB_BF(CODE, 2)
119 | MACB_BF(DATA, value));
120 macb_writel(macb, MAN, frame);
121
122 do {
123 netstat = macb_readl(macb, NSR);
124 } while (!(netstat & MACB_BIT(IDLE)));
125
126 netctl = macb_readl(macb, NCR);
127 netctl &= ~MACB_BIT(MPE);
128 macb_writel(macb, NCR, netctl);
129}
130
131static u16 macb_mdio_read(struct macb_device *macb, u8 reg)
132{
133 unsigned long netctl;
134 unsigned long netstat;
135 unsigned long frame;
136
137 netctl = macb_readl(macb, NCR);
138 netctl |= MACB_BIT(MPE);
139 macb_writel(macb, NCR, netctl);
140
141 frame = (MACB_BF(SOF, 1)
142 | MACB_BF(RW, 2)
143 | MACB_BF(PHYA, macb->phy_addr)
144 | MACB_BF(REGA, reg)
145 | MACB_BF(CODE, 2));
146 macb_writel(macb, MAN, frame);
147
148 do {
149 netstat = macb_readl(macb, NSR);
150 } while (!(netstat & MACB_BIT(IDLE)));
151
152 frame = macb_readl(macb, MAN);
153
154 netctl = macb_readl(macb, NCR);
155 netctl &= ~MACB_BIT(MPE);
156 macb_writel(macb, NCR, netctl);
157
158 return MACB_BFEXT(DATA, frame);
159}
160
Joe Hershberger1b8c18b2013-06-24 19:06:38 -0500161void __weak arch_get_mdio_control(const char *name)
Shiraz Hashim416ce622012-12-13 17:22:52 +0530162{
163 return;
164}
165
Bo Shenb1a00062013-04-24 15:59:27 +0800166#if defined(CONFIG_CMD_MII) || defined(CONFIG_PHYLIB)
Semih Hazar0f751d62009-12-17 15:07:15 +0200167
Mike Frysinger5700bb62010-07-27 18:35:08 -0400168int macb_miiphy_read(const char *devname, u8 phy_adr, u8 reg, u16 *value)
Semih Hazar0f751d62009-12-17 15:07:15 +0200169{
170 struct eth_device *dev = eth_get_dev_by_name(devname);
171 struct macb_device *macb = to_macb(dev);
172
173 if ( macb->phy_addr != phy_adr )
174 return -1;
175
Shiraz Hashim416ce622012-12-13 17:22:52 +0530176 arch_get_mdio_control(devname);
Semih Hazar0f751d62009-12-17 15:07:15 +0200177 *value = macb_mdio_read(macb, reg);
178
179 return 0;
180}
181
Mike Frysinger5700bb62010-07-27 18:35:08 -0400182int macb_miiphy_write(const char *devname, u8 phy_adr, u8 reg, u16 value)
Semih Hazar0f751d62009-12-17 15:07:15 +0200183{
184 struct eth_device *dev = eth_get_dev_by_name(devname);
185 struct macb_device *macb = to_macb(dev);
186
187 if ( macb->phy_addr != phy_adr )
188 return -1;
189
Shiraz Hashim416ce622012-12-13 17:22:52 +0530190 arch_get_mdio_control(devname);
Semih Hazar0f751d62009-12-17 15:07:15 +0200191 macb_mdio_write(macb, reg, value);
192
193 return 0;
194}
195#endif
196
197
Jon Loeliger07d38a12007-07-09 17:30:01 -0500198#if defined(CONFIG_CMD_NET)
Haavard Skinnemoen5c1fe1f2006-01-20 10:03:34 +0100199
Joe Hershberger9d9a89b2012-05-21 14:45:31 +0000200static int macb_send(struct eth_device *netdev, void *packet, int length)
Haavard Skinnemoen5c1fe1f2006-01-20 10:03:34 +0100201{
202 struct macb_device *macb = to_macb(netdev);
203 unsigned long paddr, ctrl;
204 unsigned int tx_head = macb->tx_head;
205 int i;
206
207 paddr = dma_map_single(packet, length, DMA_TO_DEVICE);
208
209 ctrl = length & TXBUF_FRMLEN_MASK;
210 ctrl |= TXBUF_FRAME_END;
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200211 if (tx_head == (CONFIG_SYS_MACB_TX_RING_SIZE - 1)) {
Haavard Skinnemoen5c1fe1f2006-01-20 10:03:34 +0100212 ctrl |= TXBUF_WRAP;
213 macb->tx_head = 0;
214 } else
215 macb->tx_head++;
216
217 macb->tx_ring[tx_head].ctrl = ctrl;
218 macb->tx_ring[tx_head].addr = paddr;
Haavard Skinnemoen04fcb5d2007-05-02 13:22:38 +0200219 barrier();
Haavard Skinnemoen5c1fe1f2006-01-20 10:03:34 +0100220 macb_writel(macb, NCR, MACB_BIT(TE) | MACB_BIT(RE) | MACB_BIT(TSTART));
221
222 /*
223 * I guess this is necessary because the networking core may
224 * re-use the transmit buffer as soon as we return...
225 */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200226 for (i = 0; i <= CONFIG_SYS_MACB_TX_TIMEOUT; i++) {
Haavard Skinnemoen04fcb5d2007-05-02 13:22:38 +0200227 barrier();
228 ctrl = macb->tx_ring[tx_head].ctrl;
229 if (ctrl & TXBUF_USED)
Haavard Skinnemoen5c1fe1f2006-01-20 10:03:34 +0100230 break;
Haavard Skinnemoen5c1fe1f2006-01-20 10:03:34 +0100231 udelay(1);
Haavard Skinnemoen5c1fe1f2006-01-20 10:03:34 +0100232 }
233
234 dma_unmap_single(packet, length, paddr);
235
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200236 if (i <= CONFIG_SYS_MACB_TX_TIMEOUT) {
Haavard Skinnemoen5c1fe1f2006-01-20 10:03:34 +0100237 if (ctrl & TXBUF_UNDERRUN)
238 printf("%s: TX underrun\n", netdev->name);
239 if (ctrl & TXBUF_EXHAUSTED)
240 printf("%s: TX buffers exhausted in mid frame\n",
241 netdev->name);
Haavard Skinnemoen04fcb5d2007-05-02 13:22:38 +0200242 } else {
243 printf("%s: TX timeout\n", netdev->name);
Haavard Skinnemoen5c1fe1f2006-01-20 10:03:34 +0100244 }
245
246 /* No one cares anyway */
247 return 0;
248}
249
250static void reclaim_rx_buffers(struct macb_device *macb,
251 unsigned int new_tail)
252{
253 unsigned int i;
254
255 i = macb->rx_tail;
256 while (i > new_tail) {
257 macb->rx_ring[i].addr &= ~RXADDR_USED;
258 i++;
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200259 if (i > CONFIG_SYS_MACB_RX_RING_SIZE)
Haavard Skinnemoen5c1fe1f2006-01-20 10:03:34 +0100260 i = 0;
261 }
262
263 while (i < new_tail) {
264 macb->rx_ring[i].addr &= ~RXADDR_USED;
265 i++;
266 }
267
Haavard Skinnemoen04fcb5d2007-05-02 13:22:38 +0200268 barrier();
Haavard Skinnemoen5c1fe1f2006-01-20 10:03:34 +0100269 macb->rx_tail = new_tail;
270}
271
272static int macb_recv(struct eth_device *netdev)
273{
274 struct macb_device *macb = to_macb(netdev);
275 unsigned int rx_tail = macb->rx_tail;
276 void *buffer;
277 int length;
278 int wrapped = 0;
279 u32 status;
280
281 for (;;) {
282 if (!(macb->rx_ring[rx_tail].addr & RXADDR_USED))
283 return -1;
284
285 status = macb->rx_ring[rx_tail].ctrl;
286 if (status & RXBUF_FRAME_START) {
287 if (rx_tail != macb->rx_tail)
288 reclaim_rx_buffers(macb, rx_tail);
289 wrapped = 0;
290 }
291
292 if (status & RXBUF_FRAME_END) {
293 buffer = macb->rx_buffer + 128 * macb->rx_tail;
294 length = status & RXBUF_FRMLEN_MASK;
295 if (wrapped) {
296 unsigned int headlen, taillen;
297
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200298 headlen = 128 * (CONFIG_SYS_MACB_RX_RING_SIZE
Haavard Skinnemoen5c1fe1f2006-01-20 10:03:34 +0100299 - macb->rx_tail);
300 taillen = length - headlen;
301 memcpy((void *)NetRxPackets[0],
302 buffer, headlen);
303 memcpy((void *)NetRxPackets[0] + headlen,
304 macb->rx_buffer, taillen);
305 buffer = (void *)NetRxPackets[0];
306 }
307
308 NetReceive(buffer, length);
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200309 if (++rx_tail >= CONFIG_SYS_MACB_RX_RING_SIZE)
Haavard Skinnemoen5c1fe1f2006-01-20 10:03:34 +0100310 rx_tail = 0;
311 reclaim_rx_buffers(macb, rx_tail);
312 } else {
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200313 if (++rx_tail >= CONFIG_SYS_MACB_RX_RING_SIZE) {
Haavard Skinnemoen5c1fe1f2006-01-20 10:03:34 +0100314 wrapped = 1;
315 rx_tail = 0;
316 }
317 }
Haavard Skinnemoen04fcb5d2007-05-02 13:22:38 +0200318 barrier();
Haavard Skinnemoen5c1fe1f2006-01-20 10:03:34 +0100319 }
320
321 return 0;
322}
323
Haavard Skinnemoenf2134f82007-05-02 13:31:53 +0200324static void macb_phy_reset(struct macb_device *macb)
325{
326 struct eth_device *netdev = &macb->netdev;
327 int i;
328 u16 status, adv;
329
330 adv = ADVERTISE_CSMA | ADVERTISE_ALL;
331 macb_mdio_write(macb, MII_ADVERTISE, adv);
332 printf("%s: Starting autonegotiation...\n", netdev->name);
333 macb_mdio_write(macb, MII_BMCR, (BMCR_ANENABLE
334 | BMCR_ANRESTART));
335
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200336 for (i = 0; i < CONFIG_SYS_MACB_AUTONEG_TIMEOUT / 100; i++) {
Haavard Skinnemoenf2134f82007-05-02 13:31:53 +0200337 status = macb_mdio_read(macb, MII_BMSR);
338 if (status & BMSR_ANEGCOMPLETE)
339 break;
340 udelay(100);
341 }
342
343 if (status & BMSR_ANEGCOMPLETE)
344 printf("%s: Autonegotiation complete\n", netdev->name);
345 else
346 printf("%s: Autonegotiation timed out (status=0x%04x)\n",
347 netdev->name, status);
348}
349
Gunnar Rangoyfc01ea12009-01-23 12:56:31 +0100350#ifdef CONFIG_MACB_SEARCH_PHY
351static int macb_phy_find(struct macb_device *macb)
352{
353 int i;
354 u16 phy_id;
355
356 /* Search for PHY... */
357 for (i = 0; i < 32; i++) {
358 macb->phy_addr = i;
359 phy_id = macb_mdio_read(macb, MII_PHYSID1);
360 if (phy_id != 0xffff) {
361 printf("%s: PHY present at %d\n", macb->netdev.name, i);
362 return 1;
363 }
364 }
365
366 /* PHY isn't up to snuff */
Andreas Bießmann6ed0e942012-08-16 01:50:04 +0000367 printf("%s: PHY not found\n", macb->netdev.name);
Gunnar Rangoyfc01ea12009-01-23 12:56:31 +0100368
369 return 0;
370}
371#endif /* CONFIG_MACB_SEARCH_PHY */
372
373
Haavard Skinnemoen5c1fe1f2006-01-20 10:03:34 +0100374static int macb_phy_init(struct macb_device *macb)
375{
376 struct eth_device *netdev = &macb->netdev;
Bo Shenb1a00062013-04-24 15:59:27 +0800377#ifdef CONFIG_PHYLIB
378 struct phy_device *phydev;
379#endif
Haavard Skinnemoen5c1fe1f2006-01-20 10:03:34 +0100380 u32 ncfgr;
381 u16 phy_id, status, adv, lpa;
382 int media, speed, duplex;
383 int i;
384
Shiraz Hashim416ce622012-12-13 17:22:52 +0530385 arch_get_mdio_control(netdev->name);
Gunnar Rangoyfc01ea12009-01-23 12:56:31 +0100386#ifdef CONFIG_MACB_SEARCH_PHY
387 /* Auto-detect phy_addr */
388 if (!macb_phy_find(macb)) {
389 return 0;
390 }
391#endif /* CONFIG_MACB_SEARCH_PHY */
392
Haavard Skinnemoen5c1fe1f2006-01-20 10:03:34 +0100393 /* Check if the PHY is up to snuff... */
394 phy_id = macb_mdio_read(macb, MII_PHYSID1);
395 if (phy_id == 0xffff) {
396 printf("%s: No PHY present\n", netdev->name);
397 return 0;
398 }
399
Bo Shenb1a00062013-04-24 15:59:27 +0800400#ifdef CONFIG_PHYLIB
Bo Shen8314ccd2013-08-19 10:35:47 +0800401 /* need to consider other phy interface mode */
402 phydev = phy_connect(macb->bus, macb->phy_addr, netdev,
403 PHY_INTERFACE_MODE_RGMII);
404 if (!phydev) {
405 printf("phy_connect failed\n");
406 return -ENODEV;
407 }
408
Bo Shenb1a00062013-04-24 15:59:27 +0800409 phy_config(phydev);
410#endif
411
Haavard Skinnemoenf2134f82007-05-02 13:31:53 +0200412 status = macb_mdio_read(macb, MII_BMSR);
Haavard Skinnemoen5c1fe1f2006-01-20 10:03:34 +0100413 if (!(status & BMSR_LSTATUS)) {
Haavard Skinnemoenf2134f82007-05-02 13:31:53 +0200414 /* Try to re-negotiate if we don't have link already. */
415 macb_phy_reset(macb);
416
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200417 for (i = 0; i < CONFIG_SYS_MACB_AUTONEG_TIMEOUT / 100; i++) {
Haavard Skinnemoen5c1fe1f2006-01-20 10:03:34 +0100418 status = macb_mdio_read(macb, MII_BMSR);
419 if (status & BMSR_LSTATUS)
420 break;
Haavard Skinnemoenf2134f82007-05-02 13:31:53 +0200421 udelay(100);
Haavard Skinnemoen5c1fe1f2006-01-20 10:03:34 +0100422 }
423 }
424
425 if (!(status & BMSR_LSTATUS)) {
426 printf("%s: link down (status: 0x%04x)\n",
427 netdev->name, status);
428 return 0;
Haavard Skinnemoen5c1fe1f2006-01-20 10:03:34 +0100429 }
Bo Shend256be22013-04-24 15:59:28 +0800430
431 /* First check for GMAC */
432 if (macb_is_gem(macb)) {
433 lpa = macb_mdio_read(macb, MII_STAT1000);
434 if (lpa & (1 << 11)) {
435 speed = 1000;
436 duplex = 1;
437 } else {
438 if (lpa & (1 << 10)) {
439 speed = 1000;
440 duplex = 1;
441 } else {
442 speed = 0;
443 }
444 }
445
446 if (speed == 1000) {
447 printf("%s: link up, %dMbps %s-duplex (lpa: 0x%04x)\n",
448 netdev->name,
449 speed,
450 duplex ? "full" : "half",
451 lpa);
452
453 ncfgr = macb_readl(macb, NCFGR);
454 ncfgr &= ~(GEM_BIT(GBE) | MACB_BIT(SPD) | MACB_BIT(FD));
455 if (speed)
456 ncfgr |= GEM_BIT(GBE);
457 if (duplex)
458 ncfgr |= MACB_BIT(FD);
459 macb_writel(macb, NCFGR, ncfgr);
460
461 return 1;
462 }
463 }
464
465 /* fall back for EMAC checking */
466 adv = macb_mdio_read(macb, MII_ADVERTISE);
467 lpa = macb_mdio_read(macb, MII_LPA);
468 media = mii_nway_result(lpa & adv);
469 speed = (media & (ADVERTISE_100FULL | ADVERTISE_100HALF)
470 ? 1 : 0);
471 duplex = (media & ADVERTISE_FULL) ? 1 : 0;
472 printf("%s: link up, %sMbps %s-duplex (lpa: 0x%04x)\n",
473 netdev->name,
474 speed ? "100" : "10",
475 duplex ? "full" : "half",
476 lpa);
477
478 ncfgr = macb_readl(macb, NCFGR);
479 ncfgr &= ~(MACB_BIT(SPD) | MACB_BIT(FD));
480 if (speed)
481 ncfgr |= MACB_BIT(SPD);
482 if (duplex)
483 ncfgr |= MACB_BIT(FD);
484 macb_writel(macb, NCFGR, ncfgr);
485
486 return 1;
Haavard Skinnemoen5c1fe1f2006-01-20 10:03:34 +0100487}
488
489static int macb_init(struct eth_device *netdev, bd_t *bd)
490{
491 struct macb_device *macb = to_macb(netdev);
492 unsigned long paddr;
Haavard Skinnemoen5c1fe1f2006-01-20 10:03:34 +0100493 int i;
494
495 /*
496 * macb_halt should have been called at some point before now,
497 * so we'll assume the controller is idle.
498 */
499
500 /* initialize DMA descriptors */
501 paddr = macb->rx_buffer_dma;
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200502 for (i = 0; i < CONFIG_SYS_MACB_RX_RING_SIZE; i++) {
503 if (i == (CONFIG_SYS_MACB_RX_RING_SIZE - 1))
Haavard Skinnemoen5c1fe1f2006-01-20 10:03:34 +0100504 paddr |= RXADDR_WRAP;
505 macb->rx_ring[i].addr = paddr;
506 macb->rx_ring[i].ctrl = 0;
507 paddr += 128;
508 }
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200509 for (i = 0; i < CONFIG_SYS_MACB_TX_RING_SIZE; i++) {
Haavard Skinnemoen5c1fe1f2006-01-20 10:03:34 +0100510 macb->tx_ring[i].addr = 0;
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200511 if (i == (CONFIG_SYS_MACB_TX_RING_SIZE - 1))
Haavard Skinnemoen5c1fe1f2006-01-20 10:03:34 +0100512 macb->tx_ring[i].ctrl = TXBUF_USED | TXBUF_WRAP;
513 else
514 macb->tx_ring[i].ctrl = TXBUF_USED;
515 }
516 macb->rx_tail = macb->tx_head = macb->tx_tail = 0;
517
518 macb_writel(macb, RBQP, macb->rx_ring_dma);
519 macb_writel(macb, TBQP, macb->tx_ring_dma);
520
Bo Shend256be22013-04-24 15:59:28 +0800521 if (macb_is_gem(macb)) {
522#ifdef CONFIG_RGMII
523 gem_writel(macb, UR, GEM_BIT(RGMII));
524#else
525 gem_writel(macb, UR, 0);
526#endif
527 } else {
Haavard Skinnemoen5c1fe1f2006-01-20 10:03:34 +0100528 /* choose RMII or MII mode. This depends on the board */
529#ifdef CONFIG_RMII
Bo Shend8f64b42013-04-24 15:59:26 +0800530#ifdef CONFIG_AT91FAMILY
Stelian Pop7263ef12008-01-03 21:15:56 +0000531 macb_writel(macb, USRIO, MACB_BIT(RMII) | MACB_BIT(CLKEN));
532#else
Haavard Skinnemoen5c1fe1f2006-01-20 10:03:34 +0100533 macb_writel(macb, USRIO, 0);
Stelian Pop7263ef12008-01-03 21:15:56 +0000534#endif
535#else
Bo Shend8f64b42013-04-24 15:59:26 +0800536#ifdef CONFIG_AT91FAMILY
Stelian Pop7263ef12008-01-03 21:15:56 +0000537 macb_writel(macb, USRIO, MACB_BIT(CLKEN));
Haavard Skinnemoen5c1fe1f2006-01-20 10:03:34 +0100538#else
539 macb_writel(macb, USRIO, MACB_BIT(MII));
540#endif
Stelian Pop7263ef12008-01-03 21:15:56 +0000541#endif /* CONFIG_RMII */
Bo Shend256be22013-04-24 15:59:28 +0800542 }
Haavard Skinnemoen5c1fe1f2006-01-20 10:03:34 +0100543
544 if (!macb_phy_init(macb))
Ben Warren422b1a02008-01-09 18:15:53 -0500545 return -1;
Haavard Skinnemoen5c1fe1f2006-01-20 10:03:34 +0100546
547 /* Enable TX and RX */
548 macb_writel(macb, NCR, MACB_BIT(TE) | MACB_BIT(RE));
549
Ben Warren422b1a02008-01-09 18:15:53 -0500550 return 0;
Haavard Skinnemoen5c1fe1f2006-01-20 10:03:34 +0100551}
552
553static void macb_halt(struct eth_device *netdev)
554{
555 struct macb_device *macb = to_macb(netdev);
556 u32 ncr, tsr;
557
558 /* Halt the controller and wait for any ongoing transmission to end. */
559 ncr = macb_readl(macb, NCR);
560 ncr |= MACB_BIT(THALT);
561 macb_writel(macb, NCR, ncr);
562
563 do {
564 tsr = macb_readl(macb, TSR);
565 } while (tsr & MACB_BIT(TGO));
566
567 /* Disable TX and RX, and clear statistics */
568 macb_writel(macb, NCR, MACB_BIT(CLRSTAT));
569}
570
Ben Warren6bb46792010-06-01 11:55:42 -0700571static int macb_write_hwaddr(struct eth_device *dev)
572{
573 struct macb_device *macb = to_macb(dev);
574 u32 hwaddr_bottom;
575 u16 hwaddr_top;
576
577 /* set hardware address */
andreas.devel@googlemail.com6c169c12011-06-09 02:08:46 +0000578 hwaddr_bottom = dev->enetaddr[0] | dev->enetaddr[1] << 8 |
579 dev->enetaddr[2] << 16 | dev->enetaddr[3] << 24;
Ben Warren6bb46792010-06-01 11:55:42 -0700580 macb_writel(macb, SA1B, hwaddr_bottom);
andreas.devel@googlemail.com6c169c12011-06-09 02:08:46 +0000581 hwaddr_top = dev->enetaddr[4] | dev->enetaddr[5] << 8;
Ben Warren6bb46792010-06-01 11:55:42 -0700582 macb_writel(macb, SA1T, hwaddr_top);
583 return 0;
584}
585
Bo Shend256be22013-04-24 15:59:28 +0800586static u32 macb_mdc_clk_div(int id, struct macb_device *macb)
587{
588 u32 config;
589 unsigned long macb_hz = get_macb_pclk_rate(id);
590
591 if (macb_hz < 20000000)
592 config = MACB_BF(CLK, MACB_CLK_DIV8);
593 else if (macb_hz < 40000000)
594 config = MACB_BF(CLK, MACB_CLK_DIV16);
595 else if (macb_hz < 80000000)
596 config = MACB_BF(CLK, MACB_CLK_DIV32);
597 else
598 config = MACB_BF(CLK, MACB_CLK_DIV64);
599
600 return config;
601}
602
603static u32 gem_mdc_clk_div(int id, struct macb_device *macb)
604{
605 u32 config;
606 unsigned long macb_hz = get_macb_pclk_rate(id);
607
608 if (macb_hz < 20000000)
609 config = GEM_BF(CLK, GEM_CLK_DIV8);
610 else if (macb_hz < 40000000)
611 config = GEM_BF(CLK, GEM_CLK_DIV16);
612 else if (macb_hz < 80000000)
613 config = GEM_BF(CLK, GEM_CLK_DIV32);
614 else if (macb_hz < 120000000)
615 config = GEM_BF(CLK, GEM_CLK_DIV48);
616 else if (macb_hz < 160000000)
617 config = GEM_BF(CLK, GEM_CLK_DIV64);
618 else
619 config = GEM_BF(CLK, GEM_CLK_DIV96);
620
621 return config;
622}
623
Haavard Skinnemoen5c1fe1f2006-01-20 10:03:34 +0100624int macb_eth_initialize(int id, void *regs, unsigned int phy_addr)
625{
626 struct macb_device *macb;
627 struct eth_device *netdev;
Haavard Skinnemoen5c1fe1f2006-01-20 10:03:34 +0100628 u32 ncfgr;
629
630 macb = malloc(sizeof(struct macb_device));
631 if (!macb) {
632 printf("Error: Failed to allocate memory for MACB%d\n", id);
633 return -1;
634 }
635 memset(macb, 0, sizeof(struct macb_device));
636
637 netdev = &macb->netdev;
638
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200639 macb->rx_buffer = dma_alloc_coherent(CONFIG_SYS_MACB_RX_BUFFER_SIZE,
Haavard Skinnemoen5c1fe1f2006-01-20 10:03:34 +0100640 &macb->rx_buffer_dma);
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200641 macb->rx_ring = dma_alloc_coherent(CONFIG_SYS_MACB_RX_RING_SIZE
Haavard Skinnemoen5c1fe1f2006-01-20 10:03:34 +0100642 * sizeof(struct macb_dma_desc),
643 &macb->rx_ring_dma);
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200644 macb->tx_ring = dma_alloc_coherent(CONFIG_SYS_MACB_TX_RING_SIZE
Haavard Skinnemoen5c1fe1f2006-01-20 10:03:34 +0100645 * sizeof(struct macb_dma_desc),
646 &macb->tx_ring_dma);
647
648 macb->regs = regs;
649 macb->phy_addr = phy_addr;
650
Bo Shend256be22013-04-24 15:59:28 +0800651 if (macb_is_gem(macb))
652 sprintf(netdev->name, "gmac%d", id);
653 else
654 sprintf(netdev->name, "macb%d", id);
655
Haavard Skinnemoen5c1fe1f2006-01-20 10:03:34 +0100656 netdev->init = macb_init;
657 netdev->halt = macb_halt;
658 netdev->send = macb_send;
659 netdev->recv = macb_recv;
Ben Warren6bb46792010-06-01 11:55:42 -0700660 netdev->write_hwaddr = macb_write_hwaddr;
Haavard Skinnemoen5c1fe1f2006-01-20 10:03:34 +0100661
662 /*
663 * Do some basic initialization so that we at least can talk
664 * to the PHY
665 */
Bo Shend256be22013-04-24 15:59:28 +0800666 if (macb_is_gem(macb)) {
667 ncfgr = gem_mdc_clk_div(id, macb);
668 ncfgr |= GEM_BF(DBW, 1);
669 } else {
670 ncfgr = macb_mdc_clk_div(id, macb);
671 }
Haavard Skinnemoen5c1fe1f2006-01-20 10:03:34 +0100672
673 macb_writel(macb, NCFGR, ncfgr);
674
675 eth_register(netdev);
676
Bo Shenb1a00062013-04-24 15:59:27 +0800677#if defined(CONFIG_CMD_MII) || defined(CONFIG_PHYLIB)
Semih Hazar0f751d62009-12-17 15:07:15 +0200678 miiphy_register(netdev->name, macb_miiphy_read, macb_miiphy_write);
Bo Shenb1a00062013-04-24 15:59:27 +0800679 macb->bus = miiphy_get_dev_by_name(netdev->name);
Semih Hazar0f751d62009-12-17 15:07:15 +0200680#endif
Haavard Skinnemoen5c1fe1f2006-01-20 10:03:34 +0100681 return 0;
682}
683
Jon Loeliger07d38a12007-07-09 17:30:01 -0500684#endif