blob: 436c35a6dc439c9d51eb82ff3ea7c2c1de61a37f [file] [log] [blame]
Simon Glassc19d13b2013-05-08 08:06:02 +00001/*
2 * Copyright (c) 2013, Google Inc.
3 *
4 * Copyright (C) 2011
Simon Schwarz0a672d42012-03-15 04:01:45 +00005 * Corscience GmbH & Co. KG - Simon Schwarz <schwarz@corscience.de>
6 *
Wolfgang Denk1a459662013-07-08 09:37:19 +02007 * SPDX-License-Identifier: GPL-2.0+
Simon Schwarz0a672d42012-03-15 04:01:45 +00008 *
Wolfgang Denk1a459662013-07-08 09:37:19 +02009 * SPDX-License-Identifier: GPL-2.0+
Simon Schwarz0a672d42012-03-15 04:01:45 +000010 */
11#ifndef ARM_BOOTM_H
12#define ARM_BOOTM_H
13
Simon Schwarz0a672d42012-03-15 04:01:45 +000014extern void udc_disconnect(void);
Simon Glassc19d13b2013-05-08 08:06:02 +000015
16#if defined(CONFIG_SETUP_MEMORY_TAGS) || \
17 defined(CONFIG_CMDLINE_TAG) || \
18 defined(CONFIG_INITRD_TAG) || \
19 defined(CONFIG_SERIAL_TAG) || \
20 defined(CONFIG_REVISION_TAG)
21# define BOOTM_ENABLE_TAGS 1
22#else
23# define BOOTM_ENABLE_TAGS 0
24#endif
25
26#ifdef CONFIG_SETUP_MEMORY_TAGS
27# define BOOTM_ENABLE_MEMORY_TAGS 1
28#else
29# define BOOTM_ENABLE_MEMORY_TAGS 0
30#endif
31
32#ifdef CONFIG_CMDLINE_TAG
33 #define BOOTM_ENABLE_CMDLINE_TAG 1
34#else
35 #define BOOTM_ENABLE_CMDLINE_TAG 0
36#endif
37
38#ifdef CONFIG_INITRD_TAG
39 #define BOOTM_ENABLE_INITRD_TAG 1
40#else
41 #define BOOTM_ENABLE_INITRD_TAG 0
42#endif
43
44#ifdef CONFIG_SERIAL_TAG
45 #define BOOTM_ENABLE_SERIAL_TAG 1
46void get_board_serial(struct tag_serialnr *serialnr);
47#else
48 #define BOOTM_ENABLE_SERIAL_TAG 0
49static inline void get_board_serial(struct tag_serialnr *serialnr)
50{
51}
52#endif
53
54#ifdef CONFIG_REVISION_TAG
55 #define BOOTM_ENABLE_REVISION_TAG 1
56u32 get_board_rev(void);
57#else
58 #define BOOTM_ENABLE_REVISION_TAG 0
59static inline u32 get_board_rev(void)
60{
61 return 0;
62}
Simon Schwarz0a672d42012-03-15 04:01:45 +000063#endif
64
65#endif