blob: e66272ecb9872312464f28671bf9f4f842a37bdd [file] [log] [blame]
wdenkd1cbe852003-06-28 17:24:46 +00001/*
2 * (C) Copyright 2003
3 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
4 *
5 * See file CREDITS for list of people who contributed to this
6 * project.
7 *
8 * This program is free software; you can redistribute it and/or
9 * modify it under the terms of the GNU General Public License as
10 * published by the Free Software Foundation; either version 2 of
11 * the License, or (at your option) any later version.
12 *
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
17 *
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
21 * MA 02111-1307 USA
22 */
23
24#include <common.h>
25#include <mpc824x.h>
wdenk7152b1d2003-09-05 23:19:14 +000026#include <pci.h>
Ben Warren89973f82008-08-31 22:22:04 -070027#include <netdev.h>
wdenkd1cbe852003-06-28 17:24:46 +000028
29int checkboard (void)
30{
31 ulong busfreq = get_bus_freq(0);
32 char buf[32];
33
34 printf("Board: SL8245, local bus @ %s MHz\n", strmhz(buf, busfreq));
35 return 0;
36}
37
Becky Bruce9973e3c2008-06-09 16:03:40 -050038phys_size_t initdram (int board_type)
wdenkd1cbe852003-06-28 17:24:46 +000039{
40#ifndef CFG_RAMBOOT
wdenkc83bf6a2004-01-06 22:38:14 +000041 long size;
42 long new_bank0_end;
43 long mear1;
44 long emear1;
wdenkd1cbe852003-06-28 17:24:46 +000045
wdenkc83bf6a2004-01-06 22:38:14 +000046 size = get_ram_size(CFG_SDRAM_BASE, CFG_MAX_RAM_SIZE);
wdenkd1cbe852003-06-28 17:24:46 +000047
wdenkc83bf6a2004-01-06 22:38:14 +000048 new_bank0_end = size - 1;
49 mear1 = mpc824x_mpc107_getreg(MEAR1);
50 emear1 = mpc824x_mpc107_getreg(EMEAR1);
51 mear1 = (mear1 & 0xFFFFFF00) |
52 ((new_bank0_end & MICR_ADDR_MASK) >> MICR_ADDR_SHIFT);
53 emear1 = (emear1 & 0xFFFFFF00) |
54 ((new_bank0_end & MICR_ADDR_MASK) >> MICR_EADDR_SHIFT);
55 mpc824x_mpc107_setreg(MEAR1, mear1);
56 mpc824x_mpc107_setreg(EMEAR1, emear1);
wdenkd1cbe852003-06-28 17:24:46 +000057
wdenkc83bf6a2004-01-06 22:38:14 +000058 return (size);
wdenkd1cbe852003-06-28 17:24:46 +000059#else
60 return CFG_MAX_RAM_SIZE;
61#endif
62}
wdenk7152b1d2003-09-05 23:19:14 +000063
64static struct pci_controller hose;
65
66void pci_init_board(void)
67{
68 pci_mpc824x_init(&hose);
69}
Ben Warren6a002172008-07-12 00:17:50 -070070
Ben Warren6a002172008-07-12 00:17:50 -070071int board_eth_init(bd_t *bis)
72{
73 int rc = 0;
74
75#if defined(CONFIG_SK98)
76 rc = skge_initialize(bis);
77#endif
78 return rc;
79}
80