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Yusuke Godac133c1f2008-03-11 12:55:12 +09001/*
Nobuhiro Iwamatsuf309fa32008-03-12 18:02:57 +09002 * Copyright (C) 2007,2008 Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Yusuke Godac133c1f2008-03-11 12:55:12 +09003 * Copyright (C) 2008 Yusuke Goda <goda.yusuke@renesas.com>
4 *
5 * This program is free software; you can redistribute it and/or
6 * modify it under the terms of the GNU General Public License as
7 * published by the Free Software Foundation; either version 2 of
8 * the License, or (at your option) any later version.
9 *
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
14 *
15 * You should have received a copy of the GNU General Public License
16 * along with this program; if not, write to the Free Software
17 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
18 * MA 02111-1307 USA
19 */
20
21#include <common.h>
22#include <ide.h>
23#include <asm/processor.h>
24#include <asm/io.h>
25#include <asm/pci.h>
26#include "r7780mp.h"
27
28int checkboard(void)
29{
30#if defined(CONFIG_R7780MP)
31 puts("BOARD: Renesas Solutions R7780MP\n");
32#else
33 puts("BOARD: Renesas Solutions R7780RP\n");
34#endif
35 return 0;
36}
37
38int board_init(void)
39{
40 /* SCIF Enable */
41 *(vu_short*)PHCR = 0x0000;
42
Yusuke Godac133c1f2008-03-11 12:55:12 +090043 return 0;
44}
45
46int dram_init (void)
47{
48 DECLARE_GLOBAL_DATA_PTR;
49
50 gd->bd->bi_memstart = CFG_SDRAM_BASE;
51 gd->bd->bi_memsize = CFG_SDRAM_SIZE;
52 printf("DRAM: %dMB\n", CFG_SDRAM_SIZE / (1024 * 1024));
53 return 0;
54}
55
56void led_set_state (unsigned short value)
57{
58
59}
60
61void ide_set_reset (int idereset)
62{
63 /* if reset = 1 IDE reset will be asserted */
64 if (idereset){
65 (*(vu_short *)FPGA_CFCTL) = 0x432;
66#if defined(CONFIG_R7780MP)
67 (*(vu_short *)FPGA_CFPOW) |= 0x01;
68#else
69 (*(vu_short *)FPGA_CFPOW) |= 0x02;
70#endif
71 (*(vu_short *)FPGA_CFCDINTCLR) = 0x01;
72 }
73}
74
75#if defined(CONFIG_PCI)
76static struct pci_controller hose;
77void pci_init_board(void)
78{
79 pci_sh7780_init( &hose );
80}
81#endif