blob: 8a94c28237bac800fd8794458e3b3962d4b0cd8b [file] [log] [blame]
Yoshihiro Shimodab2b5e2b2007-12-03 22:58:50 +09001/*
2 * Configuation settings for the Hitachi Solution Engine 7720
3 *
4 * Copyright (C) 2007 Yoshihiro Shimoda <shimoda.yoshihiro@renesas.com>
5 *
6 * See file CREDITS for list of people who contributed to this
7 * project.
8 *
9 * This program is free software; you can redistribute it and/or
10 * modify it under the terms of the GNU General Public License as
11 * published by the Free Software Foundation; either version 2 of
12 * the License, or (at your option) any later version.
13 *
14 * This program is distributed in the hope that it will be useful,
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 * GNU General Public License for more details.
18 *
19 * You should have received a copy of the GNU General Public License
20 * along with this program; if not, write to the Free Software
21 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
22 * MA 02111-1307 USA
23 */
24
25#ifndef __MS7720SE_H
26#define __MS7720SE_H
27
28#undef DEBUG
29#define CONFIG_SH 1
30#define CONFIG_SH3 1
31#define CONFIG_CPU_SH7720 1
32#define CONFIG_MS7720SE 1
33
34#define CONFIG_CMD_FLASH
35#define CONFIG_CMD_ENV
36#define CONFIG_CMD_SDRAM
37#define CONFIG_CMD_MEMORY
38#define CONFIG_CMD_CACHE
39#define CONFIG_CMD_PCMCIA
40#define CONFIG_CMD_IDE
41#define CONFIG_CMD_EXT2
42
43#define CFG_CMD_PCMCIA 0x01
44#define CFG_CMD_IDE 0x02
45
46#define CONFIG_COMMANDS ((CONFIG_CMD_DFL | \
47 CFG_CMD_IDE|CFG_CMD_PCMCIA) & \
48 ~(CFG_CMD_FPGA))
49
50#define CONFIG_BAUDRATE 115200
51#define CONFIG_BOOTARGS "console=ttySC0,115200"
52#define CONFIG_BOOTFILE /boot/zImage
53#define CONFIG_LOADADDR 0x8E000000
54
55#define CONFIG_VERSION_VARIABLE
56#undef CONFIG_SHOW_BOOT_PROGRESS
57
58/* MEMORY */
59#define MS7720SE_SDRAM_BASE 0x8C000000
60#define MS7720SE_FLASH_BASE_1 0xA0000000
61#define MS7720SE_FLASH_BANK_SIZE (8 * 1024 * 1024)
62
63#define CFG_LONGHELP /* undef to save memory */
64#define CFG_PROMPT "=> " /* Monitor Command Prompt */
65#define CFG_CBSIZE 256 /* Buffer size for input from the Console */
66#define CFG_PBSIZE 256 /* Buffer size for Console output */
67#define CFG_MAXARGS 16 /* max args accepted for monitor commands */
68/* Buffer size for Boot Arguments passed to kernel */
69#define CFG_BARGSIZE 512
70/* List of legal baudrate settings for this board */
71#define CFG_BAUDRATE_TABLE { 115200 }
72
73/* SCIF */
74#define CFG_SCIF_CONSOLE 1
75#define CONFIG_CONS_SCIF0 1
76
77#define CFG_MEMTEST_START MS7720SE_SDRAM_BASE
78#define CFG_MEMTEST_END (CFG_MEMTEST_START + (60 * 1024 * 1024))
79
80#define CFG_SDRAM_BASE MS7720SE_SDRAM_BASE
81#define CFG_SDRAM_SIZE (64 * 1024 * 1024)
82
83#define CFG_LOAD_ADDR (CFG_SDRAM_BASE + 32 * 1024 * 1024)
84#define CFG_MONITOR_BASE MS7720SE_FLASH_BASE_1
85#define CFG_MONITOR_LEN (128 * 1024)
86#define CFG_MALLOC_LEN (256 * 1024)
87#define CFG_GBL_DATA_SIZE 256
88#define CFG_BOOTMAPSZ (8 * 1024 * 1024)
89
90
91/* FLASH */
92#define CFG_FLASH_CFI
93#define CFG_FLASH_CFI_DRIVER
94#undef CFG_FLASH_QUIET_TEST
95#define CFG_FLASH_EMPTY_INFO /* print 'E' for empty sector on flinfo */
96
97#define CFG_FLASH_BASE MS7720SE_FLASH_BASE_1
98
99#define CFG_MAX_FLASH_SECT 150
100#define CFG_MAX_FLASH_BANKS 1
101#define CFG_FLASH_BANKS_LIST { CFG_FLASH_BASE }
102
103#define CFG_ENV_IS_IN_FLASH
104#define CFG_ENV_SECT_SIZE (64 * 1024)
105#define CFG_ENV_SIZE CFG_ENV_SECT_SIZE
106#define CFG_ENV_ADDR (CFG_MONITOR_BASE + CFG_MONITOR_LEN)
107#define CFG_FLASH_ERASE_TOUT 120000
108#define CFG_FLASH_WRITE_TOUT 500
109
110/* Board Clock */
111#define CONFIG_SYS_CLK_FREQ 33333333
112#define TMU_CLK_DIVIDER 4 /* 4 (default), 16, 64, 256 or 1024 */
113#define CFG_HZ (CONFIG_SYS_CLK_FREQ / TMU_CLK_DIVIDER)
114
115/* PCMCIA */
116#define CONFIG_IDE_PCMCIA 1
117#define CONFIG_MARUBUN_PCCARD 1
118#define CONFIG_PCMCIA_SLOT_A 1
119#define CFG_IDE_MAXDEVICE 1
120#define CFG_MARUBUN_MRSHPC 0xb83fffe0
121#define CFG_MARUBUN_MW1 0xb8400000
122#define CFG_MARUBUN_MW2 0xb8500000
123#define CFG_MARUBUN_IO 0xb8600000
124
125#define CFG_PIO_MODE 1
126#define CFG_IDE_MAXBUS 1
127#define CONFIG_DOS_PARTITION 1
128#define CFG_ATA_BASE_ADDR CFG_MARUBUN_IO /* base address */
129#define CFG_ATA_IDE0_OFFSET 0x01F0 /* ide0 offste */
130#define CFG_ATA_DATA_OFFSET 0 /* data reg offset */
131#define CFG_ATA_REG_OFFSET 0 /* reg offset */
132#define CFG_ATA_ALT_OFFSET 0x200 /* alternate register offset */
133
134#endif /* __MS7720SE_H */