blob: 649c163152e200df4f1bf3c13547b41b9495d196 [file] [log] [blame]
Stephen Warren25734282015-08-13 22:34:22 -06001/dts-v1/;
2
3#include "tegra210.dtsi"
4
5/ {
6 model = "NVIDIA P2371-2180";
7 compatible = "nvidia,p2371-2180", "nvidia,tegra210";
8
9 chosen {
10 stdout-path = &uarta;
11 };
12
13 aliases {
Stephen Warreneb631d72016-09-13 10:45:49 -060014 i2c0 = "/i2c@7000d000";
Stephen Warren9eb15cb2020-03-26 15:20:45 -070015 i2c2 = "/i2c@7000c400";
16 i2c3 = "/i2c@7000c500";
Stephen Warreneb631d72016-09-13 10:45:49 -060017 mmc0 = "/sdhci@700b0600";
18 mmc1 = "/sdhci@700b0000";
19 usb0 = "/usb@7d000000";
Stephen Warren25734282015-08-13 22:34:22 -060020 };
21
22 memory {
23 reg = <0x0 0x80000000 0x0 0xc0000000>;
24 };
25
Thierry Reding1e669b42019-04-15 11:32:37 +020026 pcie@1003000 {
Stephen Warren019bc622015-10-05 17:02:40 -060027 status = "okay";
28
29 pci@1,0 {
30 status = "okay";
31 };
32
33 pci@2,0 {
34 status = "okay";
35 };
36 };
37
Stephen Warreneb631d72016-09-13 10:45:49 -060038 padctl@7009f000 {
Stephen Warren019bc622015-10-05 17:02:40 -060039 pinctrl-0 = <&padctl_default>;
40 pinctrl-names = "default";
41
42 padctl_default: pinmux {
43 xusb {
44 nvidia,lanes = "otg-1", "otg-2";
45 nvidia,function = "xusb";
46 nvidia,iddq = <0>;
47 };
48
49 usb3 {
50 nvidia,lanes = "pcie-5", "pcie-6";
51 nvidia,function = "usb3";
52 nvidia,iddq = <0>;
53 };
54
55 pcie-x1 {
56 nvidia,lanes = "pcie-0";
57 nvidia,function = "pcie-x1";
58 nvidia,iddq = <0>;
59 };
60
61 pcie-x4 {
62 nvidia,lanes = "pcie-1", "pcie-2",
63 "pcie-3", "pcie-4";
64 nvidia,function = "pcie-x4";
65 nvidia,iddq = <0>;
66 };
67
68 sata {
69 nvidia,lanes = "sata-0";
70 nvidia,function = "sata";
71 nvidia,iddq = <0>;
72 };
73 };
74 };
75
Stephen Warreneb631d72016-09-13 10:45:49 -060076 sdhci@700b0000 {
Stephen Warren25734282015-08-13 22:34:22 -060077 status = "okay";
78 cd-gpios = <&gpio TEGRA_GPIO(Z, 1) GPIO_ACTIVE_LOW>;
79 power-gpios = <&gpio TEGRA_GPIO(Z, 3) GPIO_ACTIVE_HIGH>;
80 wp-gpios = <&gpio TEGRA_GPIO(Z, 4) GPIO_ACTIVE_LOW>;
81 bus-width = <4>;
82 };
83
Stephen Warreneb631d72016-09-13 10:45:49 -060084 sdhci@700b0600 {
Stephen Warren25734282015-08-13 22:34:22 -060085 status = "okay";
86 bus-width = <8>;
Tom Warren9a06a1a2016-09-13 10:45:42 -060087 non-removable;
Stephen Warren25734282015-08-13 22:34:22 -060088 };
89
Stephen Warren9eb15cb2020-03-26 15:20:45 -070090 i2c@7000c400 {
91 status = "okay";
92 clock-frequency = <400000>;
93 };
94
95 i2c@7000c500 {
96 status = "okay";
97 clock-frequency = <400000>;
98 };
99
Stephen Warreneb631d72016-09-13 10:45:49 -0600100 i2c@7000d000 {
Stephen Warren25734282015-08-13 22:34:22 -0600101 status = "okay";
102 clock-frequency = <400000>;
103 };
104
Stephen Warreneb631d72016-09-13 10:45:49 -0600105 usb@7d000000 {
Stephen Warren25734282015-08-13 22:34:22 -0600106 status = "okay";
107 dr_mode = "otg";
108 nvidia,vbus-gpio = <&gpio TEGRA_GPIO(CC, 4) GPIO_ACTIVE_HIGH>;
109 };
110
111 clocks {
112 compatible = "simple-bus";
113 #address-cells = <1>;
114 #size-cells = <0>;
115
116 clk32k_in: clock@0 {
117 compatible = "fixed-clock";
118 reg = <0>;
119 #clock-cells = <0>;
120 clock-frequency = <32768>;
121 };
122 };
123};
Simon Glassf53dcc02017-06-12 06:22:01 -0600124
125&uarta {
126 status = "okay";
127};