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Thomas Chouc8a7ba92015-10-09 13:46:34 +08001menu "Timer Support"
2
3config TIMER
Bin Meng435ae762015-11-13 00:11:14 -08004 bool "Enable driver model for timer drivers"
Thomas Chouc8a7ba92015-10-09 13:46:34 +08005 depends on DM
6 help
Bin Meng435ae762015-11-13 00:11:14 -08007 Enable driver model for timer access. It uses the same API as
8 lib/time.c, but now implemented by the uclass. The first timer
Thomas Chouc8a7ba92015-10-09 13:46:34 +08009 will be used. The timer is usually a 32 bits free-running up
10 counter. There may be no real tick, and no timer interrupt.
11
Philipp Tomsiche9e5d9d2017-07-28 17:38:42 +020012config SPL_TIMER
13 bool "Enable driver model for timer drivers in SPL"
14 depends on TIMER && SPL
15 help
16 Enable support for timer drivers in SPL. These can be used to get
17 a timer value when in SPL, or perhaps for implementing a delay
18 function. This enables the drivers in drivers/timer as part of an
19 SPL build.
20
21config TPL_TIMER
22 bool "Enable driver model for timer drivers in TPL"
23 depends on TIMER && TPL
24 help
25 Enable support for timer drivers in TPL. These can be used to get
26 a timer value when in TPL, or perhaps for implementing a delay
27 function. This enables the drivers in drivers/timer as part of an
28 TPL build.
29
Simon Glassc95fec32016-02-24 09:14:49 -070030config TIMER_EARLY
31 bool "Allow timer to be used early in U-Boot"
32 depends on TIMER
Simon Glass97d20f62018-09-02 17:02:24 -060033 # initr_bootstage() requires a timer and is called before initr_dm()
34 # so only the early timer is available
35 default y if X86 && BOOTSTAGE
Simon Glassc95fec32016-02-24 09:14:49 -070036 help
37 In some cases the timer must be accessible before driver model is
38 active. Examples include when using CONFIG_TRACE to trace U-Boot's
39 execution before driver model is set up. Enable this option to
40 use an early timer. These functions must be supported by your timer
41 driver: timer_early_get_count() and timer_early_get_rate().
42
Bin Meng73fe4112018-10-10 22:07:02 -070043config AG101P_TIMER
44 bool "AG101P timer support"
45 depends on TIMER && NDS32
46 help
47 Select this to enable a timer for AG01P devices.
48
Thomas Choua54915d2015-10-22 22:28:53 +080049config ALTERA_TIMER
Bin Meng435ae762015-11-13 00:11:14 -080050 bool "Altera timer support"
Thomas Choua54915d2015-10-22 22:28:53 +080051 depends on TIMER
52 help
Bin Meng435ae762015-11-13 00:11:14 -080053 Select this to enable a timer for Altera devices. Please find
Thomas Choua54915d2015-10-22 22:28:53 +080054 details on the "Embedded Peripherals IP User Guide" of Altera.
55
Bin Meng73fe4112018-10-10 22:07:02 -070056config ARC_TIMER
57 bool "ARC timer support"
58 depends on TIMER && ARC && CLK
59 help
60 Select this to enable built-in ARC timers.
61 ARC cores may have up to 2 built-in timers: timer0 and timer1,
62 usually at least one of them exists. Either of them is supported
63 in U-Boot.
64
65config AST_TIMER
66 bool "Aspeed ast2400/ast2500 timer support"
67 depends on TIMER
68 default y if ARCH_ASPEED
69 help
70 Select this to enable timer for Aspeed ast2400/ast2500 devices.
71 This is a simple sys timer driver, it is compatible with lib/time.c,
72 but does not support any interrupts. Even though SoC has 8 hardware
73 counters, they are all treated as a single device by this driver.
74 This is mostly because they all share several registers which
75 makes it difficult to completely separate them.
76
77config ATCPIT100_TIMER
78 bool "ATCPIT100 timer support"
79 depends on TIMER
80 help
81 Select this to enable a ATCPIT100 timer which will be embedded
82 in AE3XX, AE250 boards.
83
Wenyou.Yang@microchip.com47edaea2017-08-15 17:40:26 +080084config ATMEL_PIT_TIMER
85 bool "Atmel periodic interval timer support"
86 depends on TIMER
87 help
88 Select this to enable a periodic interval timer for Atmel devices,
89 it is designed to offer maximum accuracy and efficient management,
90 even for systems with long response time.
91
Michal Simek72c37d12018-04-17 13:40:46 +020092config CADENCE_TTC_TIMER
93 bool "Cadence TTC (Triple Timer Counter)"
94 depends on TIMER
95 help
96 Enables support for the cadence ttc driver. This driver is present
97 on Xilinx Zynq and ZynqMP SoCs.
98
Marek Vasut66011a02018-08-18 15:58:32 +020099config DESIGNWARE_APB_TIMER
100 bool "Designware APB Timer"
101 depends on TIMER
102 help
103 Enables support for the Designware APB Timer driver. This timer is
104 present on Altera SoCFPGA SoCs.
105
Bin Meng73fe4112018-10-10 22:07:02 -0700106config MPC83XX_TIMER
107 bool "MPC83xx timer support"
108 depends on TIMER
Thomas Chou9961a0b2015-10-30 15:35:52 +0800109 help
Bin Meng73fe4112018-10-10 22:07:02 -0700110 Select this to enable support for the timer found on
111 devices based on the MPC83xx family of SoCs.
Bin Meng7030f272015-11-13 00:11:24 -0800112
Marek Vasut4d0732b2019-05-04 17:30:58 +0200113config RENESAS_OSTM_TIMER
114 bool "Renesas RZ/A1 R7S72100 OSTM Timer"
115 depends on TIMER
116 help
117 Enables support for the Renesas OSTM Timer driver.
118 This timer is present on Renesas RZ/A1 R7S72100 SoCs.
119
Bin Meng6ce38362018-10-13 20:52:10 -0700120config X86_TSC_TIMER_EARLY_FREQ
121 int "x86 TSC timer frequency in MHz when used as the early timer"
122 depends on X86_TSC_TIMER
123 default 1000
124 help
125 Sets the estimated CPU frequency in MHz when TSC is used as the
126 early timer and the frequency can neither be calibrated via some
127 hardware ways, nor got from device tree at the time when device
128 tree is not available yet.
129
Mugunthan V Ndadf3132015-12-24 16:08:07 +0530130config OMAP_TIMER
131 bool "Omap timer support"
132 depends on TIMER
133 help
134 Select this to enable an timer for Omap devices.
135
Bin Meng60262cd02018-12-12 06:12:27 -0800136config RISCV_TIMER
137 bool "RISC-V timer support"
138 depends on TIMER && RISCV
139 help
140 Select this to enable support for the timer as defined
141 by the RISC-V privileged architecture spec.
142
Bin Meng73fe4112018-10-10 22:07:02 -0700143config ROCKCHIP_TIMER
144 bool "Rockchip timer support"
maxims@google.com4697abe2017-01-18 13:44:55 -0800145 depends on TIMER
maxims@google.com4697abe2017-01-18 13:44:55 -0800146 help
Bin Meng73fe4112018-10-10 22:07:02 -0700147 Select this to enable support for the timer found on
148 Rockchip devices.
149
150config SANDBOX_TIMER
151 bool "Sandbox timer support"
152 depends on SANDBOX && TIMER
153 help
154 Select this to enable an emulated timer for sandbox. It gets
155 time from host os.
maxims@google.com4697abe2017-01-18 13:44:55 -0800156
Patrice Chotard347cb2e2017-02-21 13:37:05 +0100157config STI_TIMER
158 bool "STi timer support"
159 depends on TIMER
160 default y if ARCH_STI
161 help
162 Select this to enable a timer for STi devices.
163
Patrice Chotard5120a082018-02-07 10:44:45 +0100164config STM32_TIMER
Bin Meng73fe4112018-10-10 22:07:02 -0700165 bool "STM32 timer support"
Patrice Chotard5120a082018-02-07 10:44:45 +0100166 depends on TIMER
167 help
168 Select this to enable support for the timer found on
169 STM32 devices.
170
Bin Meng73fe4112018-10-10 22:07:02 -0700171config X86_TSC_TIMER
172 bool "x86 Time-Stamp Counter (TSC) timer support"
173 depends on TIMER && X86
Mario Six2c217492018-08-06 10:23:38 +0200174 help
Bin Meng73fe4112018-10-10 22:07:02 -0700175 Select this to enable Time-Stamp Counter (TSC) timer for x86.
Mario Six2c217492018-08-06 10:23:38 +0200176
Simon Glass77dd7c62019-12-06 21:41:49 -0700177config X86_TSC_READ_BASE
178 bool "Read the TSC timer base on start-up"
179 depends on X86_TSC_TIMER
180 help
181 On x86 platforms the TSC timer tick starts at the value 0 on reset.
182 This it makes no sense to read the timer on boot and use that as the
183 base, since we will miss some time taken to load U-Boot, etc. This
184 delay is controlled by the SoC and we cannot reduce it, but for
185 bootstage we want to record the time since reset as accurately as
186 possible.
187
188 The only exception is when U-Boot is used as a secondary bootloader,
189 where this option should be enabled.
190
Simon Glass642e8482019-12-06 21:41:50 -0700191config TPL_X86_TSC_TIMER_NATIVE
192 bool "x86 TSC timer uses native calibration"
193 depends on TPL && X86_TSC_TIMER
194 help
195 Selects native timer calibration for TPL and don't include the other
196 methods in the code. This helps to reduce code size in TPL and works
197 on fairly modern Intel chips. Code-size reductions is about 700
198 bytes.
199
Ryder Leed3c36062018-11-15 10:07:56 +0800200config MTK_TIMER
201 bool "MediaTek timer support"
202 depends on TIMER
203 help
204 Select this to enable support for the timer found on
205 MediaTek devices.
206
Thomas Chouc8a7ba92015-10-09 13:46:34 +0800207endmenu