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wdenk3b285da2002-10-07 16:54:55 +00001/*
2 * (C) Copyright 2000
3 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
4 *
5 * See file CREDITS for list of people who contributed to this
6 * project.
7 *
8 * This program is free software; you can redistribute it and/or
9 * modify it under the terms of the GNU General Public License as
10 * published by the Free Software Foundation; either version 2 of
11 * the License, or (at your option) any later version.
12 *
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
17 *
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
21 * MA 02111-1307 USA
22 */
23
24#include <common.h>
25#include <commproc.h>
26#include <mpc8xx_irq.h>
27#include <syscall.h>
28
29#undef DEBUG
30
31#define TIMER_PERIOD 1000000 /* 1 second clock */
32
33static void timer_handler (void *arg);
34
35
36/* Access functions for the Machine State Register */
37static __inline__ unsigned long get_msr(void)
38{
39 unsigned long msr;
40
41 asm volatile("mfmsr %0" : "=r" (msr) :);
42 return msr;
43}
44
45static __inline__ void set_msr(unsigned long msr)
46{
47 asm volatile("mtmsr %0" : : "r" (msr));
48}
49
50/*
51 * Definitions to access the CPM Timer registers
52 * See 8xx_immap.h for Internal Memory Map layout,
53 * and commproc.h for CPM Interrupt vectors (aka "IRQ"s)
54 */
55
56typedef struct tid_8xx_cpmtimer_s {
57 int cpm_vec; /* CPM Interrupt Vector for this timer */
58 ushort *tgcrp; /* Pointer to Timer Global Config Reg. */
59 ushort *tmrp; /* Pointer to Timer Mode Register */
60 ushort *trrp; /* Pointer to Timer Reference Register */
61 ushort *tcrp; /* Pointer to Timer Capture Register */
62 ushort *tcnp; /* Pointer to Timer Counter Register */
63 ushort *terp; /* Pointer to Timer Event Register */
64} tid_8xx_cpmtimer_t;
65
66#ifndef CLOCKRATE
67# define CLOCKRATE 64
68#endif
69
70#define CPMT_CLOCK_DIV 16
71#define CPMT_MAX_PRESCALER 256
72#define CPMT_MAX_REFERENCE 65535 /* max. unsigned short */
73
74#define CPMT_MAX_TICKS (CPMT_MAX_REFERENCE * CPMT_MAX_PRESCALER)
75#define CPMT_MAX_TICKS_WITH_DIV (CPMT_MAX_REFERENCE * CPMT_MAX_PRESCALER * CPMT_CLOCK_DIV)
76#define CPMT_MAX_INTERVAL (CPMT_MAX_TICKS_WITH_DIV / CLOCKRATE)
77
78/* For now: always use max. prescaler value */
79#define CPMT_PRESCALER (CPMT_MAX_PRESCALER)
80
81/* CPM Timer Event Register Bits */
82#define CPMT_EVENT_CAP 0x0001 /* Capture Event */
83#define CPMT_EVENT_REF 0x0002 /* Reference Counter Event */
84
85/* CPM Timer Global Config Register */
86#define CPMT_GCR_RST 0x0001 /* Reset Timer */
87#define CPMT_GCR_STP 0x0002 /* Stop Timer */
88#define CPMT_GCR_FRZ 0x0004 /* Freeze Timer */
89#define CPMT_GCR_GM_CAS 0x0008 /* Gate Mode / Cascade Timers */
90#define CPMT_GCR_MASK (CPMT_GCR_RST|CPMT_GCR_STP|CPMT_GCR_FRZ|CPMT_GCR_GM_CAS)
91
92/* CPM Timer Mode register */
93#define CPMT_MR_GE 0x0001 /* Gate Enable */
94#define CPMT_MR_ICLK_CASC 0x0000 /* Clock internally cascaded */
95#define CPMT_MR_ICLK_CLK 0x0002 /* Clock = system clock */
96#define CPMT_MR_ICLK_CLKDIV 0x0004 /* Clock = system clock / 16 */
97#define CPMT_MR_ICLK_TIN 0x0006 /* Clock = TINx signal */
98#define CPMT_MR_FRR 0x0008 /* Free Run / Restart */
99#define CPMT_MR_ORI 0x0010 /* Out. Reference Interrupt En. */
100#define CPMT_MR_OM 0x0020 /* Output Mode */
101#define CPMT_MR_CE_DIS 0x0000 /* Capture/Interrupt disabled */
102#define CPMT_MR_CE_RISE 0x0040 /* Capt./Interr. on rising TIN */
103#define CPMT_MR_CE_FALL 0x0080 /* Capt./Interr. on falling TIN */
104#define CPMT_MR_CE_ANY 0x00C0 /* Capt./Interr. on any TIN edge*/
105
106
107
108/*
109 * which CPM timer to use - index starts at 0 (= timer 1)
110 */
111#define TID_TIMER_ID 0 /* use CPM timer 1 */
112
113void setPeriod (tid_8xx_cpmtimer_t *hwp, ulong interval);
114
115static char *usage = "\n[q, b, e, ?] ";
116
117int timer (int argc, char *argv[])
118{
119 DECLARE_GLOBAL_DATA_PTR;
120
121 cpmtimer8xx_t *cpmtimerp; /* Pointer to the CPM Timer structure */
122 tid_8xx_cpmtimer_t hw;
123 tid_8xx_cpmtimer_t *hwp = &hw;
124 int c;
wdenk7c7a23b2002-12-07 00:20:59 +0000125 int running;
wdenk3b285da2002-10-07 16:54:55 +0000126
127 /* Pointer to CPM Timer structure */
128 cpmtimerp = &((immap_t *) gd->bd->bi_immr_base)->im_cpmtimer;
129
130 mon_printf ("TIMERS=0x%x\n", (unsigned) cpmtimerp);
131
132 /* Initialize pointers depending on which timer we use */
133 switch (TID_TIMER_ID) {
134 case 0:
135 hwp->tmrp = &(cpmtimerp->cpmt_tmr1);
136 hwp->trrp = &(cpmtimerp->cpmt_trr1);
137 hwp->tcrp = &(cpmtimerp->cpmt_tcr1);
138 hwp->tcnp = &(cpmtimerp->cpmt_tcn1);
139 hwp->terp = &(cpmtimerp->cpmt_ter1);
140 hwp->cpm_vec = CPMVEC_TIMER1;
141 break;
142 case 1:
143 hwp->tmrp = &(cpmtimerp->cpmt_tmr2);
144 hwp->trrp = &(cpmtimerp->cpmt_trr2);
145 hwp->tcrp = &(cpmtimerp->cpmt_tcr2);
146 hwp->tcnp = &(cpmtimerp->cpmt_tcn2);
147 hwp->terp = &(cpmtimerp->cpmt_ter2);
148 hwp->cpm_vec = CPMVEC_TIMER2;
149 break;
150 case 2:
151 hwp->tmrp = &(cpmtimerp->cpmt_tmr3);
152 hwp->trrp = &(cpmtimerp->cpmt_trr3);
153 hwp->tcrp = &(cpmtimerp->cpmt_tcr3);
154 hwp->tcnp = &(cpmtimerp->cpmt_tcn3);
155 hwp->terp = &(cpmtimerp->cpmt_ter3);
156 hwp->cpm_vec = CPMVEC_TIMER3;
157 break;
158 case 3:
159 hwp->tmrp = &(cpmtimerp->cpmt_tmr4);
160 hwp->trrp = &(cpmtimerp->cpmt_trr4);
161 hwp->tcrp = &(cpmtimerp->cpmt_tcr4);
162 hwp->tcnp = &(cpmtimerp->cpmt_tcn4);
163 hwp->terp = &(cpmtimerp->cpmt_ter4);
164 hwp->cpm_vec = CPMVEC_TIMER4;
165 break;
166 }
167
168 hwp->tgcrp = &cpmtimerp->cpmt_tgcr;
169
170 mon_printf ("Using timer %d\n"
171 "tgcr @ 0x%x, tmr @ 0x%x, trr @ 0x%x,"
172 " tcr @ 0x%x, tcn @ 0x%x, ter @ 0x%x\n",
173 TID_TIMER_ID + 1,
174 (unsigned) hwp->tgcrp,
175 (unsigned) hwp->tmrp,
176 (unsigned) hwp->trrp,
177 (unsigned) hwp->tcrp,
178 (unsigned) hwp->tcnp,
179 (unsigned) hwp->terp
180 );
181
182 /* reset timer */
183 *hwp->tgcrp &= ~(CPMT_GCR_MASK << TID_TIMER_ID);
184
185 /* clear all events */
186 *hwp->terp = (CPMT_EVENT_CAP | CPMT_EVENT_REF);
187
188 mon_printf (usage);
wdenk7c7a23b2002-12-07 00:20:59 +0000189 running = 0;
wdenk3b285da2002-10-07 16:54:55 +0000190 while ((c = mon_getc()) != 'q') {
191 if (c == 'b') {
192
193 setPeriod (hwp, TIMER_PERIOD); /* Set period and start ticking */
194
195 /* Install interrupt handler (enable timer in CIMR) */
196 mon_install_hdlr (hwp->cpm_vec, timer_handler, hwp);
197
198 mon_printf ("Enabling timer\n");
199
200 /* enable timer */
201 *hwp->tgcrp |= (CPMT_GCR_RST << TID_TIMER_ID);
wdenk7c7a23b2002-12-07 00:20:59 +0000202 running = 1;
wdenk3b285da2002-10-07 16:54:55 +0000203
204#ifdef DEBUG
205 mon_printf ("tgcr=0x%x, tmr=0x%x, trr=0x%x,"
206 " tcr=0x%x, tcn=0x%x, ter=0x%x\n",
207 *hwp->tgcrp, *hwp->tmrp, *hwp->trrp,
208 *hwp->tcrp, *hwp->tcnp, *hwp->terp
209 );
210#endif
211 } else if (c == 'e') {
212
213 mon_printf ("Stopping timer\n");
214
215 *hwp->tgcrp &= ~(CPMT_GCR_MASK << TID_TIMER_ID);
wdenk7c7a23b2002-12-07 00:20:59 +0000216 running = 0;
wdenk3b285da2002-10-07 16:54:55 +0000217
218#ifdef DEBUG
219 mon_printf ("tgcr=0x%x, tmr=0x%x, trr=0x%x,"
220 " tcr=0x%x, tcn=0x%x, ter=0x%x\n",
221 *hwp->tgcrp, *hwp->tmrp, *hwp->trrp,
222 *hwp->tcrp, *hwp->tcnp, *hwp->terp
223 );
224#endif
225 /* Uninstall interrupt handler */
226 mon_free_hdlr (hwp->cpm_vec);
227
228 } else if (c == '?') {
229#ifdef DEBUG
230 cpic8xx_t *cpm_icp = &((immap_t *) gd->bd->bi_immr_base)->im_cpic;
231 sysconf8xx_t *siup = &((immap_t *) gd->bd->bi_immr_base)->im_siu_conf;
232#endif
233
234 mon_printf ("\ntgcr=0x%x, tmr=0x%x, trr=0x%x,"
235 " tcr=0x%x, tcn=0x%x, ter=0x%x\n",
236 *hwp->tgcrp, *hwp->tmrp, *hwp->trrp,
237 *hwp->tcrp, *hwp->tcnp, *hwp->terp
238 );
239#ifdef DEBUG
240 mon_printf ("SIUMCR=0x%08lx, SYPCR=0x%08lx,"
241 " SIMASK=0x%08lx, SIPEND=0x%08lx\n",
242 siup->sc_siumcr,
243 siup->sc_sypcr,
244 siup->sc_simask,
245 siup->sc_sipend
246 );
247
248 mon_printf ("CIMR=0x%08lx, CICR=0x%08lx, CIPR=0x%08lx\n",
249 cpm_icp->cpic_cimr,
250 cpm_icp->cpic_cicr,
251 cpm_icp->cpic_cipr
252 );
253#endif
254 } else {
255 mon_printf ("\nEnter: q - quit, b - start timer, e - stop timer, ? - get status\n");
256 }
257 mon_printf (usage);
258 }
wdenk7c7a23b2002-12-07 00:20:59 +0000259 if (running) {
260 mon_printf ("Stopping timer\n");
261 *hwp->tgcrp &= ~(CPMT_GCR_MASK << TID_TIMER_ID);
262 mon_free_hdlr (hwp->cpm_vec);
263 }
264
wdenk3b285da2002-10-07 16:54:55 +0000265 return (0);
266}
267
268
269/* Set period in microseconds and start.
270 * Truncate to maximum period if more than this is requested - but warn about it.
271 */
272
273void setPeriod (tid_8xx_cpmtimer_t *hwp, ulong interval)
274{
275 unsigned short prescaler;
276 unsigned long ticks;
277
278 mon_printf ("Set interval %ld us\n", interval);
279
280 /* Warn if requesting longer period than possible */
281 if (interval > CPMT_MAX_INTERVAL) {
282 mon_printf ("Truncate interval %ld to maximum (%d)\n",
283 interval, CPMT_MAX_INTERVAL);
284 interval = CPMT_MAX_INTERVAL;
285 }
286 /*
287 * Check if we want to use clock divider:
288 * Since the reference counter can be incremented only in integer steps,
289 * we try to keep it as big as possible to allow the resulting period to be
290 * as precise as possible.
291 */
292 /* prescaler, enable interrupt, restart after ref count is reached */
293 prescaler = (ushort) ((CPMT_PRESCALER - 1) << 8) |
294 CPMT_MR_ORI |
295 CPMT_MR_FRR;
296
297 ticks = ((ulong) CLOCKRATE * interval);
298
299 if (ticks > CPMT_MAX_TICKS) {
300 ticks /= CPMT_CLOCK_DIV;
301 prescaler |= CPMT_MR_ICLK_CLKDIV; /* use system clock divided by 16 */
302 } else {
303 prescaler |= CPMT_MR_ICLK_CLK; /* use system clock without divider */
304 }
305
306#ifdef DEBUG
307 mon_printf ("clock/%d, prescale factor %d, reference %ld, ticks %ld\n",
308 (ticks > CPMT_MAX_TICKS) ? CPMT_CLOCK_DIV : 1,
309 CPMT_PRESCALER,
310 (ticks / CPMT_PRESCALER),
311 ticks
312 );
313#endif
314
315 /* set prescaler register */
316 *hwp->tmrp = prescaler;
317
318 /* clear timer counter */
319 *hwp->tcnp = 0;
320
321 /* set reference register */
322 *hwp->trrp = (unsigned short) (ticks / CPMT_PRESCALER);
323
324#ifdef DEBUG
325 mon_printf ("tgcr=0x%x, tmr=0x%x, trr=0x%x,"
326 " tcr=0x%x, tcn=0x%x, ter=0x%x\n",
327 *hwp->tgcrp, *hwp->tmrp, *hwp->trrp,
328 *hwp->tcrp, *hwp->tcnp, *hwp->terp
329 );
330#endif
331}
332
333/*
334 * Handler for CPMVEC_TIMER1 interrupt
335 */
336static
337void timer_handler (void *arg)
338{
339 tid_8xx_cpmtimer_t *hwp = (tid_8xx_cpmtimer_t *)arg;
340
341 /* printf ("** TER1=%04x ** ", *hwp->terp); */
342
343 /* just for demonstration */
344 mon_printf (".");
345
346 /* clear all possible events: Ref. and Cap. */
347 *hwp->terp = (CPMT_EVENT_CAP | CPMT_EVENT_REF);
348}