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wdenk028ab6b2004-02-23 23:54:43 +00001/*
2 * Author: Xilinx, Inc.
3 *
4 *
5 * This program is free software; you can redistribute it and/or modify it
6 * under the terms of the GNU General Public License as published by the
7 * Free Software Foundation; either version 2 of the License, or (at your
8 * option) any later version.
9 *
10 *
11 * XILINX IS PROVIDING THIS DESIGN, CODE, OR INFORMATION "AS IS" AS A
12 * COURTESY TO YOU. BY PROVIDING THIS DESIGN, CODE, OR INFORMATION AS
13 * ONE POSSIBLE IMPLEMENTATION OF THIS FEATURE, APPLICATION OR STANDARD,
14 * XILINX IS MAKING NO REPRESENTATION THAT THIS IMPLEMENTATION IS FREE
15 * FROM ANY CLAIMS OF INFRINGEMENT, AND YOU ARE RESPONSIBLE FOR OBTAINING
16 * ANY THIRD PARTY RIGHTS YOU MAY REQUIRE FOR YOUR IMPLEMENTATION.
17 * XILINX EXPRESSLY DISCLAIMS ANY WARRANTY WHATSOEVER WITH RESPECT TO
18 * THE ADEQUACY OF THE IMPLEMENTATION, INCLUDING BUT NOT LIMITED TO ANY
19 * WARRANTIES OR REPRESENTATIONS THAT THIS IMPLEMENTATION IS FREE FROM
20 * CLAIMS OF INFRINGEMENT, IMPLIED WARRANTIES OF MERCHANTABILITY AND
21 * FITNESS FOR A PARTICULAR PURPOSE.
22 *
23 *
24 * Xilinx hardware products are not intended for use in life support
25 * appliances, devices, or systems. Use in such applications is
26 * expressly prohibited.
27 *
28 *
29 * (c) Copyright 2002-2004 Xilinx Inc.
30 * All rights reserved.
31 *
32 *
33 * You should have received a copy of the GNU General Public License along
34 * with this program; if not, write to the Free Software Foundation, Inc.,
35 * 675 Mass Ave, Cambridge, MA 02139, USA.
36 *
37 */
38
39#include <asm/u-boot.h>
40#include <asm/processor.h>
41#include <common.h>
42#include <command.h>
Grant Likely99b0f0f2007-02-20 09:04:52 +010043#include <config.h>
wdenk028ab6b2004-02-23 23:54:43 +000044
Wolfgang Denkd87080b2006-03-31 18:32:53 +020045DECLARE_GLOBAL_DATA_PTR;
46
wdenk028ab6b2004-02-23 23:54:43 +000047#define USE_CHAN1 \
48 ((defined XPAR_UARTNS550_0_BASEADDR) && (defined CFG_INIT_CHAN1))
49#define USE_CHAN2 \
50 ((defined XPAR_UARTNS550_1_BASEADDR) && (defined CFG_INIT_CHAN2))
51
52#if USE_CHAN1
53#include <ns16550.h>
54#endif
55
56#if USE_CHAN1
57const NS16550_t COM_PORTS[] = { (NS16550_t) (XPAR_UARTNS550_0_BASEADDR + 3)
58#if USE_CHAN2
59 , (NS16550_t) (XPAR_UARTNS550_1_BASEADDR + 3)
60#endif
61};
62#endif
63
64int
65serial_init(void)
66{
67#if USE_CHAN1
wdenk028ab6b2004-02-23 23:54:43 +000068 int clock_divisor;
69
70 clock_divisor = XPAR_UARTNS550_0_CLOCK_FREQ_HZ / 16 / gd->baudrate;
71 (void) NS16550_init(COM_PORTS[0], clock_divisor);
72#if USE_CHAN2
73 clock_divisor = XPAR_UARTNS550_1_CLOCK_FREQ_HZ / 16 / gd->baudrate;
74 (void) NS16550_init(COM_PORTS[1], clock_divisor);
75#endif
76#endif
77 return 0;
78
79}
80
81void
82serial_putc(const char c)
83{
84 if (c == '\n')
85 NS16550_putc(COM_PORTS[CFG_DUART_CHAN], '\r');
86
87 NS16550_putc(COM_PORTS[CFG_DUART_CHAN], c);
88}
89
90int
91serial_getc(void)
92{
93 return NS16550_getc(COM_PORTS[CFG_DUART_CHAN]);
94}
95
96int
97serial_tstc(void)
98{
99 return NS16550_tstc(COM_PORTS[CFG_DUART_CHAN]);
100}
101
102void
103serial_setbrg(void)
104{
105#if USE_CHAN1
wdenk028ab6b2004-02-23 23:54:43 +0000106 int clock_divisor;
107
108 clock_divisor = XPAR_UARTNS550_0_CLOCK_FREQ_HZ / 16 / gd->baudrate;
109 NS16550_reinit(COM_PORTS[0], clock_divisor);
110#if USE_CHAN2
111 clock_divisor = XPAR_UARTNS550_1_CLOCK_FREQ_HZ / 16 / gd->baudrate;
112 NS16550_reinit(COM_PORTS[1], clock_divisor);
113#endif
114#endif
115}
116
117void
118serial_puts(const char *s)
119{
120 while (*s) {
121 serial_putc(*s++);
122 }
123}
124
125#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
126void
127kgdb_serial_init(void)
128{
129}
130
131void
132putDebugChar(int c)
133{
134 serial_putc(c);
135}
136
137void
138putDebugStr(const char *str)
139{
140 serial_puts(str);
141}
142
143int
144getDebugChar(void)
145{
146 return serial_getc();
147}
148
149void
150kgdb_interruptible(int yes)
151{
152 return;
153}
154#endif /* CFG_CMD_KGDB */