blob: 35aa40b30df5312c2813c25c9d13d42b6646e50a [file] [log] [blame]
Guennadi Liakhovetski11edcfe2008-08-31 00:39:47 +02001/*
2 * (C) Copyright 2002
3 * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
4 * Marius Groeger <mgroeger@sysgo.de>
5 *
6 * (C) Copyright 2002
7 * David Mueller, ELSOFT AG, <d.mueller@elsoft.ch>
8 *
9 * (C) Copyright 2008
10 * Guennadi Liakhovetki, DENX Software Engineering, <lg@denx.de>
11 *
12 * See file CREDITS for list of people who contributed to this
13 * project.
14 *
15 * This program is free software; you can redistribute it and/or
16 * modify it under the terms of the GNU General Public License as
17 * published by the Free Software Foundation; either version 2 of
18 * the License, or (at your option) any later version.
19 *
20 * This program is distributed in the hope that it will be useful,
21 * but WITHOUT ANY WARRANTY; without even the implied warranty of
22 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
23 * GNU General Public License for more details.
24 *
25 * You should have received a copy of the GNU General Public License
26 * along with this program; if not, write to the Free Software
27 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
28 * MA 02111-1307 USA
29 */
30
31#include <common.h>
Ben Warrenb1c0eaa2009-08-25 13:09:37 -070032#include <netdev.h>
Minkyu Kang47e801b2009-11-04 16:07:59 +090033#include <asm/arch/s3c6400.h>
Guennadi Liakhovetski11edcfe2008-08-31 00:39:47 +020034
John Rigby29565322010-12-20 18:27:51 -070035DECLARE_GLOBAL_DATA_PTR;
36
Guennadi Liakhovetski11edcfe2008-08-31 00:39:47 +020037/* ------------------------------------------------------------------------- */
38#define CS8900_Tacs 0x0 /* 0clk address set-up */
39#define CS8900_Tcos 0x4 /* 4clk chip selection set-up */
40#define CS8900_Tacc 0xE /* 14clk access cycle */
41#define CS8900_Tcoh 0x1 /* 1clk chip selection hold */
42#define CS8900_Tah 0x4 /* 4clk address holding time */
43#define CS8900_Tacp 0x6 /* 6clk page mode access cycle */
44#define CS8900_PMC 0x0 /* normal(1data)page mode configuration */
45
46static inline void delay(unsigned long loops)
47{
48 __asm__ volatile ("1:\n" "subs %0, %1, #1\n"
49 "bne 1b"
50 : "=r" (loops) : "0" (loops));
51}
52
53/*
54 * Miscellaneous platform dependent initialisations
55 */
56
57static void cs8900_pre_init(void)
58{
59 SROM_BW_REG &= ~(0xf << 4);
60 SROM_BW_REG |= (1 << 7) | (1 << 6) | (1 << 4);
61 SROM_BC1_REG = ((CS8900_Tacs << 28) + (CS8900_Tcos << 24) +
62 (CS8900_Tacc << 16) + (CS8900_Tcoh << 12) +
63 (CS8900_Tah << 8) + (CS8900_Tacp << 4) + CS8900_PMC);
64}
65
66int board_init(void)
67{
Guennadi Liakhovetski11edcfe2008-08-31 00:39:47 +020068 cs8900_pre_init();
69
70 /* NOR-flash in SROM0 */
71
72 /* Enable WAIT */
73 SROM_BW_REG |= 4 | 8 | 1;
74
75 gd->bd->bi_arch_number = MACH_TYPE;
76 gd->bd->bi_boot_params = PHYS_SDRAM_1 + 0x100;
77
78 return 0;
79}
80
81int dram_init(void)
82{
Guennadi Liakhovetski11edcfe2008-08-31 00:39:47 +020083 gd->bd->bi_dram[0].start = PHYS_SDRAM_1;
84 gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE;
85
86 return 0;
87}
88
89#ifdef CONFIG_DISPLAY_BOARDINFO
90int checkboard(void)
91{
92 printf("Board: SMDK6400\n");
93 return 0;
94}
95#endif
96
97#ifdef CONFIG_ENABLE_MMU
98ulong virt_to_phy_smdk6400(ulong addr)
99{
100 if ((0xc0000000 <= addr) && (addr < 0xc8000000))
101 return addr - 0xc0000000 + 0x50000000;
102 else
103 printf("do not support this address : %08lx\n", addr);
104
105 return addr;
106}
107#endif
108
Guennadi Liakhovetski11edcfe2008-08-31 00:39:47 +0200109ulong board_flash_get_legacy (ulong base, int banknum, flash_info_t *info)
110{
111 if (banknum == 0) { /* non-CFI boot flash */
112 info->portwidth = FLASH_CFI_16BIT;
113 info->chipwidth = FLASH_CFI_BY16;
114 info->interface = FLASH_CFI_X16;
115 return 1;
116 } else
117 return 0;
118}
Ben Warrenb1c0eaa2009-08-25 13:09:37 -0700119
120#ifdef CONFIG_CMD_NET
121int board_eth_init(bd_t *bis)
122{
123 int rc = 0;
124#ifdef CONFIG_CS8900
125 rc = cs8900_initialize(0, CONFIG_CS8900_BASE);
126#endif
127 return rc;
128}
129#endif