blob: cf21b215b71131a14dffa3f63dd16c687241de9a [file] [log] [blame]
Markus Klotzbuecherd28707d2007-01-09 14:57:10 +01001/*
2 * (C) Copyright 2006
3 * Markus Klotzbuecher, DENX Software Engineering, mk@denx.de.
4 *
5 * See file CREDITS for list of people who contributed to this
6 * project.
7 *
8 * This program is free software; you can redistribute it and/or
9 * modify it under the terms of the GNU General Public License as
10 * published by the Free Software Foundation; either version 2 of
11 * the License, or (at your option) any later version.
12 *
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
17 *
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
21 * MA 02111-1307 USA
22 */
23
24/*
25 * Host Port Interface (HPI)
26 */
27
28/* debug levels:
29 * 0 : errors
30 * 1 : usefull info
31 * 2 : lots of info
32 * 3 : noisy
33 */
34
35#define DEBUG 0
36
37#include <config.h>
38#include <common.h>
39#include <mpc8xx.h>
40
41#include "pld.h"
42#include "hpi.h"
Markus Klotzbuecherd28707d2007-01-09 14:57:10 +010043
44#define _NOT_USED_ 0xFFFFFFFF
45
46/* original table:
47 * - inserted loops to achieve long CS low and high Periods (~217ns)
48 * - move cs high 2/4 to the right
49 */
50const uint dsp_table_slow[] =
51{
52 /* single read (offset 0x00 in upm ram) */
53 0x8fffdc04, 0x0fffdc84, 0x0fffdc84, 0x0fffdc00,
54 0x3fffdc04, 0xffffdc84, 0xffffdc84, 0xffffdc05,
55
56 /* burst read (offset 0x08 in upm ram) */
57 _NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
58 _NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
59 _NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
60 _NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
61
62 /* single write (offset 0x18 in upm ram) */
63 0x8fffd004, 0x0fffd084, 0x0fffd084, 0x3fffd000,
64 0xffffd084, 0xffffd084, 0xffffd005, _NOT_USED_,
65
66 /* burst write (offset 0x20 in upm ram) */
67 _NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
68 _NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
69 _NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
70 _NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
71 /* refresh (offset 0x30 in upm ram) */
72 _NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
73 _NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
74 _NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
75 /* exception (offset 0x3C in upm ram) */
76 _NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
77};
78
79/* dsp hpi upm ram table
80 * works fine for noninc access, failes on incremental.
81 * - removed first word
82 */
83const uint dsp_table_fast[] =
84{
85 /* single read (offset 0x00 in upm ram) */
86 0x8fffdc04, 0x0fffdc04, 0x0fffdc00, 0x3fffdc04,
87 0xffffdc05, _NOT_USED_, _NOT_USED_, _NOT_USED_,
88
89 /* burst read (offset 0x08 in upm ram) */
90 _NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
91 _NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
92 _NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
93 _NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
94
95 /* single write (offset 0x18 in upm ram) */
96 0x8fffd004, 0x0fffd004, 0x3fffd000, 0xffffd005,
97 _NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
98
99 /* burst write (offset 0x20 in upm ram) */
100 _NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
101 _NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
102 _NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
103 _NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
104 /* refresh (offset 0x30 in upm ram) */
105 _NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
106 _NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
107 _NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
108 /* exception (offset 0x3C in upm ram) */
109 _NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
110};
111
112
113#ifdef CONFIG_SPC1920_HPI_TEST
114#undef HPI_TEST_OSZI
115
116#define HPI_TEST_CHUNKSIZE 0x1000
117#define HPI_TEST_PATTERN 0x00000000
118#define HPI_TEST_START 0x0
119#define HPI_TEST_END 0x30000
120
121#define TINY_AUTOINC_DATA_SIZE 16 /* 32bit words */
122#define TINY_AUTOINC_BASE_ADDR 0x0
123
124static int hpi_activate(void);
Wolfgang Denkcdd917a2007-08-02 00:48:45 +0200125#if 0
Markus Klotzbuecherd28707d2007-01-09 14:57:10 +0100126static void hpi_inactivate(void);
Wolfgang Denkcdd917a2007-08-02 00:48:45 +0200127#endif
Markus Klotzbuecherd28707d2007-01-09 14:57:10 +0100128static void dsp_reset(void);
129
130static int hpi_write_inc(u32 addr, u32 *data, u32 count);
131static int hpi_read_inc(u32 addr, u32 *buf, u32 count);
132static int hpi_write_noinc(u32 addr, u32 data);
133static u32 hpi_read_noinc(u32 addr);
134
135int hpi_test(void);
136static int hpi_write_addr_test(u32 addr);
137static int hpi_read_write_test(u32 addr, u32 data);
Wolfgang Denkcdd917a2007-08-02 00:48:45 +0200138#ifdef DO_TINY_TEST
Markus Klotzbuecherd28707d2007-01-09 14:57:10 +0100139static int hpi_tiny_autoinc_test(void);
Wolfgang Denkcdd917a2007-08-02 00:48:45 +0200140#endif /* DO_TINY_TEST */
Markus Klotzbuecherd28707d2007-01-09 14:57:10 +0100141#endif /* CONFIG_SPC1920_HPI_TEST */
142
143
144/* init the host port interface on UPMA */
145int hpi_init(void)
146{
147 volatile immap_t *immr = (immap_t *) CFG_IMMR;
148 volatile memctl8xx_t *memctl = &immr->im_memctl;
149 volatile spc1920_pld_t *pld = (spc1920_pld_t *) CFG_SPC1920_PLD_BASE;
150
151 upmconfig(UPMA, (uint *)dsp_table_slow, sizeof(dsp_table_slow)/sizeof(uint));
152 udelay(100);
153
154 memctl->memc_mamr = CFG_MAMR;
Markus Klotzbuecher67fea022007-01-09 16:02:48 +0100155 memctl->memc_or3 = CFG_OR3;
156 memctl->memc_br3 = CFG_BR3;
Markus Klotzbuecherd28707d2007-01-09 14:57:10 +0100157
158 /* reset dsp */
159 dsp_reset();
160
161 /* activate hpi switch*/
162 pld->dsp_hpi_on = 0x1;
163
164 udelay(100);
165
166 return 0;
167}
168
169#ifdef CONFIG_SPC1920_HPI_TEST
170/* activate the Host Port interface */
171static int hpi_activate(void)
172{
173 volatile spc1920_pld_t *pld = (spc1920_pld_t *) CFG_SPC1920_PLD_BASE;
174
175 /* turn on hpi */
176 pld->dsp_hpi_on = 0x1;
177
178 udelay(5);
179
180 /* turn on the power EN_DSP_POWER high*/
181 /* currently always on TBD */
182
183 /* setup hpi control register */
184 HPI_HPIC_1 = (u16) 0x0008;
185 HPI_HPIC_2 = (u16) 0x0008;
186
187 udelay(100);
188
189 return 0;
190}
191
Wolfgang Denkcdd917a2007-08-02 00:48:45 +0200192#if 0
Markus Klotzbuecherd28707d2007-01-09 14:57:10 +0100193/* turn off the host port interface */
194static void hpi_inactivate(void)
195{
196 volatile spc1920_pld_t *pld = (spc1920_pld_t *) CFG_SPC1920_PLD_BASE;
197
198 /* deactivate hpi */
199 pld->dsp_hpi_on = 0x0;
200
201 /* reset the dsp */
202 /* pld->dsp_reset = 0x0; */
203
204 /* turn off the power EN_DSP_POWER# high*/
205 /* currently always on TBD */
206
207}
Wolfgang Denkcdd917a2007-08-02 00:48:45 +0200208#endif
Markus Klotzbuecherd28707d2007-01-09 14:57:10 +0100209
210/* reset the DSP */
211static void dsp_reset(void)
212{
213 volatile spc1920_pld_t *pld = (spc1920_pld_t *) CFG_SPC1920_PLD_BASE;
214 pld->dsp_reset = 0x1;
215 pld->dsp_hpi_on = 0x0;
216
217 udelay(300000);
218
219 pld->dsp_reset = 0x0;
220 pld->dsp_hpi_on = 0x1;
221}
222
223
224/* write using autoinc (count is number of 32bit words) */
225static int hpi_write_inc(u32 addr, u32 *data, u32 count)
226{
227 int i;
228 u16 addr1, addr2;
229
230 addr1 = (u16) ((addr >> 16) & 0xffff); /* First HW is most significant */
231 addr2 = (u16) (addr & 0xffff);
232
233 /* write address */
234 HPI_HPIA_1 = addr1;
235 HPI_HPIA_2 = addr2;
236
Wolfgang Denk9b55a252008-07-11 01:16:00 +0200237 debugX(4, "writing from data=0x%lx to 0x%lx\n",
238 (ulong)data, (ulong)(data+count));
Markus Klotzbuecherd28707d2007-01-09 14:57:10 +0100239
240 for(i=0; i<count; i++) {
241 HPI_HPID_INC_1 = (u16) ((data[i] >> 16) & 0xffff);
242 HPI_HPID_INC_2 = (u16) (data[i] & 0xffff);
243 debugX(4, "hpi_write_inc: data1=0x%x, data2=0x%x\n",
244 (u16) ((data[i] >> 16) & 0xffff),
245 (u16) (data[i] & 0xffff));
246 }
247#if 0
248 while(data_ptr < (u16*) (data + count)) {
249 HPI_HPID_INC_1 = *(data_ptr++);
250 HPI_HPID_INC_2 = *(data_ptr++);
251 }
252#endif
253
254 /* return number of bytes written */
255 return count;
256}
257
258/*
259 * read using autoinc (count is number of 32bit words)
260 */
261static int hpi_read_inc(u32 addr, u32 *buf, u32 count)
262{
263 int i;
264 u16 addr1, addr2, data1, data2;
265
266 addr1 = (u16) ((addr >> 16) & 0xffff); /* First HW is most significant */
267 addr2 = (u16) (addr & 0xffff);
268
269 /* write address */
270 HPI_HPIA_1 = addr1;
271 HPI_HPIA_2 = addr2;
272
273 for(i=0; i<count; i++) {
274 data1 = HPI_HPID_INC_1;
275 data2 = HPI_HPID_INC_2;
276 debugX(4, "hpi_read_inc: data1=0x%x, data2=0x%x\n", data1, data2);
277 buf[i] = (((u32) data1) << 16) | (data2 & 0xffff);
278 }
279
280#if 0
281 while(buf_ptr < (u16*) (buf + count)) {
282 *(buf_ptr++) = HPI_HPID_INC_1;
283 *(buf_ptr++) = HPI_HPID_INC_2;
284 }
285#endif
286
287 /* return number of bytes read */
288 return count;
289}
290
291
292/* write to non- auto inc regs */
293static int hpi_write_noinc(u32 addr, u32 data)
294{
295
296 u16 addr1, addr2, data1, data2;
297
298 addr1 = (u16) ((addr >> 16) & 0xffff); /* First HW is most significant */
299 addr2 = (u16) (addr & 0xffff);
300
301 /* printf("hpi_write_noinc: addr1=0x%x, addr2=0x%x\n", addr1, addr2); */
302
303 HPI_HPIA_1 = addr1;
304 HPI_HPIA_2 = addr2;
305
306 data1 = (u16) ((data >> 16) & 0xffff);
307 data2 = (u16) (data & 0xffff);
308
309 /* printf("hpi_write_noinc: data1=0x%x, data2=0x%x\n", data1, data2); */
310
311 HPI_HPID_NOINC_1 = data1;
312 HPI_HPID_NOINC_2 = data2;
313
314 return 0;
315}
316
317/* read from non- auto inc regs */
318static u32 hpi_read_noinc(u32 addr)
319{
320 u16 addr1, addr2, data1, data2;
321 u32 ret;
322
323 addr1 = (u16) ((addr >> 16) & 0xffff); /* First HW is most significant */
324 addr2 = (u16) (addr & 0xffff);
325
326 HPI_HPIA_1 = addr1;
327 HPI_HPIA_2 = addr2;
328
329 /* printf("hpi_read_noinc: addr1=0x%x, addr2=0x%x\n", addr1, addr2); */
330
331 data1 = HPI_HPID_NOINC_1;
332 data2 = HPI_HPID_NOINC_2;
333
334 /* printf("hpi_read_noinc: data1=0x%x, data2=0x%x\n", data1, data2); */
335
336 ret = (((u32) data1) << 16) | (data2 & 0xffff);
337 return ret;
338
339}
340
341/*
342 * Host Port Interface Tests
343 */
344
345#ifndef HPI_TEST_OSZI
346/* main test function */
347int hpi_test(void)
348{
349 int err = 0;
350 u32 i, ii, pattern, tmp;
351
352 pattern = HPI_TEST_PATTERN;
353
354 u32 test_data[HPI_TEST_CHUNKSIZE];
355 u32 read_data[HPI_TEST_CHUNKSIZE];
356
357 debugX(2, "hpi_test: activating hpi...");
358 hpi_activate();
359 debugX(2, "OK.\n");
360
361#if 0
362 /* Dump the first 1024 bytes
363 *
364 */
365 for(i=0; i<1024; i+=4) {
366 if(i%16==0)
367 printf("\n0x%08x: ", i);
368 printf("0x%08x ", hpi_read_noinc(i));
369 }
370#endif
371
372 /* HPIA read-write test
373 *
374 */
375 debugX(1, "hpi_test: starting HPIA read-write tests...\n");
376 err |= hpi_write_addr_test(0xdeadc0de);
377 err |= hpi_write_addr_test(0xbeefd00d);
378 err |= hpi_write_addr_test(0xabcd1234);
379 err |= hpi_write_addr_test(0xaaaaaaaa);
380 if(err) {
381 debugX(1, "hpi_test: HPIA read-write tests: *** FAILED ***\n");
382 return -1;
383 }
384 debugX(1, "hpi_test: HPIA read-write tests: OK\n");
385
386
387 /* read write test using nonincremental data regs
388 *
389 */
390 debugX(1, "hpi_test: starting nonincremental tests...\n");
391 for(i=HPI_TEST_START; i<HPI_TEST_END; i+=4) {
392 err |= hpi_read_write_test(i, pattern);
393
394 /* stolen from cmd_mem.c */
395 if(pattern & 0x80000000) {
396 pattern = -pattern; /* complement & increment */
397 } else {
398 pattern = ~pattern;
399 }
400 err |= hpi_read_write_test(i, pattern);
401
402 if(err) {
403 debugX(1, "hpi_test: nonincremental tests *** FAILED ***\n");
404 return -1;
405 }
406 }
407 debugX(1, "hpi_test: nonincremental test OK\n");
408
409 /* read write a chunk of data using nonincremental data regs
410 *
411 */
412 debugX(1, "hpi_test: starting nonincremental chunk tests...\n");
413 pattern = HPI_TEST_PATTERN;
414 for(i=HPI_TEST_START; i<HPI_TEST_END; i+=4) {
415 hpi_write_noinc(i, pattern);
416
417 /* stolen from cmd_mem.c */
418 if(pattern & 0x80000000) {
419 pattern = -pattern; /* complement & increment */
420 } else {
421 pattern = ~pattern;
422 }
423 }
424 pattern = HPI_TEST_PATTERN;
425 for(i=HPI_TEST_START; i<HPI_TEST_END; i+=4) {
426 tmp = hpi_read_noinc(i);
427
428 if(tmp != pattern) {
429 debugX(1, "hpi_test: noninc chunk test *** FAILED *** @ 0x%x, written=0x%x, read=0x%x\n", i, pattern, tmp);
430 err = -1;
431 }
432 /* stolen from cmd_mem.c */
433 if(pattern & 0x80000000) {
434 pattern = -pattern; /* complement & increment */
435 } else {
436 pattern = ~pattern;
437 }
438 }
439 if(err)
440 return -1;
441 debugX(1, "hpi_test: nonincremental chunk test OK\n");
442
443
444#ifdef DO_TINY_TEST
445 /* small verbose test using autoinc and nonautoinc to compare
446 *
447 */
448 debugX(1, "hpi_test: tiny_autoinc_test...\n");
449 hpi_tiny_autoinc_test();
450 debugX(1, "hpi_test: tiny_autoinc_test done\n");
451#endif /* DO_TINY_TEST */
452
453
454 /* $%& write a chunk of data using the autoincremental regs
455 *
456 */
457 debugX(1, "hpi_test: starting autoinc test %d chunks with 0x%x bytes...\n",
458 ((HPI_TEST_END - HPI_TEST_START) / HPI_TEST_CHUNKSIZE),
459 HPI_TEST_CHUNKSIZE);
460
461 for(i=HPI_TEST_START;
462 i < ((HPI_TEST_END - HPI_TEST_START) / HPI_TEST_CHUNKSIZE);
463 i++) {
464 /* generate the pattern data */
465 debugX(3, "generating pattern data: ");
466 for(ii = 0; ii < HPI_TEST_CHUNKSIZE; ii++) {
467 debugX(3, "0x%x ", pattern);
468
469 test_data[ii] = pattern;
470 read_data[ii] = 0x0; /* zero to be sure */
471
472 /* stolen from cmd_mem.c */
473 if(pattern & 0x80000000) {
474 pattern = -pattern; /* complement & increment */
475 } else {
476 pattern = ~pattern;
477 }
478 }
479 debugX(3, "done\n");
480
481 debugX(2, "Writing autoinc data @ 0x%x\n", i);
482 hpi_write_inc(i, test_data, HPI_TEST_CHUNKSIZE);
483
484 debugX(2, "Reading autoinc data @ 0x%x\n", i);
485 hpi_read_inc(i, read_data, HPI_TEST_CHUNKSIZE);
486
487 /* compare */
488 for(ii = 0; ii < HPI_TEST_CHUNKSIZE; ii++) {
489 debugX(3, "hpi_test_autoinc: @ 0x%x, written=0x%x, read=0x%x", i+ii, test_data[ii], read_data[ii]);
490 if(read_data[ii] != test_data[ii]) {
491 debugX(0, "hpi_test: autoinc test @ 0x%x, written=0x%x, read=0x%x *** FAILED ***\n", i+ii, test_data[ii], read_data[ii]);
492 return -1;
493 }
494 }
495 }
496 debugX(1, "hpi_test: autoinc test OK\n");
497
498 return 0;
499}
500#else /* HPI_TEST_OSZI */
501int hpi_test(void)
502{
503 int i;
504 u32 read_data[TINY_AUTOINC_DATA_SIZE];
505
506 unsigned int dummy_data[TINY_AUTOINC_DATA_SIZE] = {
507 0x11112222, 0x33334444, 0x55556666, 0x77778888,
508 0x9999aaaa, 0xbbbbcccc, 0xddddeeee, 0xffff1111,
509 0x00010002, 0x00030004, 0x00050006, 0x00070008,
510 0x0009000a, 0x000b000c, 0x000d000e, 0x000f0001
511 };
512
513 debugX(0, "hpi_test: activating hpi...");
514 hpi_activate();
515 debugX(0, "OK.\n");
516
517 while(1) {
518 led9(1);
519 debugX(0, " writing to autoinc...\n");
520 hpi_write_inc(TINY_AUTOINC_BASE_ADDR,
521 dummy_data, TINY_AUTOINC_DATA_SIZE);
522
523 debugX(0, " reading from autoinc...\n");
524 hpi_read_inc(TINY_AUTOINC_BASE_ADDR,
525 read_data, TINY_AUTOINC_DATA_SIZE);
526
527 for(i=0; i < (TINY_AUTOINC_DATA_SIZE); i++) {
528 debugX(0, " written=0x%x, read(inc)=0x%x\n",
529 dummy_data[i], read_data[i]);
530 }
531 led9(0);
532 udelay(2000000);
533 }
534 return 0;
535}
536#endif
537
538/* test if Host Port Address Register can be written correctly */
539static int hpi_write_addr_test(u32 addr)
540{
541 u32 read_back;
542 /* write address */
543 HPI_HPIA_1 = ((u16) (addr >> 16)); /* First HW is most significant */
544 HPI_HPIA_2 = ((u16) addr);
545
546 read_back = (((u32) HPI_HPIA_1)<<16) | ((u32) HPI_HPIA_2);
547
548 if(read_back == addr) {
549 debugX(2, " hpi_write_addr_test OK: written=0x%x, read=0x%x\n",
550 addr, read_back);
551 return 0;
552 } else {
553 debugX(0, " hpi_write_addr_test *** FAILED ***: written=0x%x, read=0x%x\n",
554 addr, read_back);
555 return -1;
556 }
557
558 return 0;
559}
560
561/* test if a simple read/write sequence succeeds */
562static int hpi_read_write_test(u32 addr, u32 data)
563{
564 u32 read_back;
565
566 hpi_write_noinc(addr, data);
567 read_back = hpi_read_noinc(addr);
568
569 if(read_back == data) {
570 debugX(2, " hpi_read_write_test: OK, addr=0x%x written=0x%x, read=0x%x\n", addr, data, read_back);
571 return 0;
572 } else {
573 debugX(0, " hpi_read_write_test: *** FAILED ***, addr=0x%x written=0x%x, read=0x%x\n", addr, data, read_back);
574 return -1;
575 }
576
577 return 0;
578}
579
Wolfgang Denkcdd917a2007-08-02 00:48:45 +0200580#ifdef DO_TINY_TEST
Markus Klotzbuecherd28707d2007-01-09 14:57:10 +0100581static int hpi_tiny_autoinc_test(void)
582{
583 int i;
584 u32 read_data[TINY_AUTOINC_DATA_SIZE];
585 u32 read_data_noinc[TINY_AUTOINC_DATA_SIZE];
586
587 unsigned int dummy_data[TINY_AUTOINC_DATA_SIZE] = {
588 0x11112222, 0x33334444, 0x55556666, 0x77778888,
589 0x9999aaaa, 0xbbbbcccc, 0xddddeeee, 0xffff1111,
590 0x00010002, 0x00030004, 0x00050006, 0x00070008,
591 0x0009000a, 0x000b000c, 0x000d000e, 0x000f0001
592 };
593
594 printf(" writing to autoinc...\n");
595 hpi_write_inc(TINY_AUTOINC_BASE_ADDR, dummy_data, TINY_AUTOINC_DATA_SIZE);
596
597 printf(" reading from autoinc...\n");
598 hpi_read_inc(TINY_AUTOINC_BASE_ADDR, read_data, TINY_AUTOINC_DATA_SIZE);
599
600 printf(" reading from noinc for comparison...\n");
601 for(i=0; i < (TINY_AUTOINC_DATA_SIZE); i++)
602 read_data_noinc[i] = hpi_read_noinc(TINY_AUTOINC_BASE_ADDR+i*4);
603
604 for(i=0; i < (TINY_AUTOINC_DATA_SIZE); i++) {
605 printf(" written=0x%x, read(inc)=0x%x, read(noinc)=0x%x\n",
606 dummy_data[i], read_data[i], read_data_noinc[i]);
607 }
608 return 0;
609}
Wolfgang Denkcdd917a2007-08-02 00:48:45 +0200610#endif /* DO_TINY_TEST */
Markus Klotzbuecherd28707d2007-01-09 14:57:10 +0100611
612#endif /* CONFIG_SPC1920_HPI_TEST */