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Ley Foon Tan0bc28b72018-05-24 00:17:30 +08001/* SPDX-License-Identifier: GPL-2.0
2 *
3 * Copyright (C) 2017-2018 Intel Corporation <www.intel.com>
4 *
5 */
6
7#ifndef _SDRAM_S10_H_
8#define _SDRAM_S10_H_
9
Ley Foon Tan0bc28b72018-05-24 00:17:30 +080010#define DDR_TWR 15
11#define DDR_READ_LATENCY_DELAY 40
12#define DDR_ACTIVATE_FAWBANK 0x1
13
Ley Foon Tan0bc28b72018-05-24 00:17:30 +080014/* NOC DDR scheduler */
15#define DDR_SCH_ID_COREID 0
16#define DDR_SCH_ID_REVID 0x4
17#define DDR_SCH_DDRCONF 0x8
18#define DDR_SCH_DDRTIMING 0xc
19#define DDR_SCH_DDRMODE 0x10
20#define DDR_SCH_READ_LATENCY 0x14
21#define DDR_SCH_ACTIVATE 0x38
22#define DDR_SCH_DEVTODEV 0x3c
23#define DDR_SCH_DDR4TIMING 0x40
24
25#define DDR_SCH_DDRTIMING_ACTTOACT_OFF 0
26#define DDR_SCH_DDRTIMING_RDTOMISS_OFF 6
27#define DDR_SCH_DDRTIMING_WRTOMISS_OFF 12
28#define DDR_SCH_DDRTIMING_BURSTLEN_OFF 18
29#define DDR_SCH_DDRTIMING_RDTOWR_OFF 21
30#define DDR_SCH_DDRTIMING_WRTORD_OFF 26
31#define DDR_SCH_DDRTIMING_BWRATIO_OFF 31
32#define DDR_SCH_DDRMOD_BWRATIOEXTENDED_OFF 1
33#define DDR_SCH_ACTIVATE_RRD_OFF 0
34#define DDR_SCH_ACTIVATE_FAW_OFF 4
35#define DDR_SCH_ACTIVATE_FAWBANK_OFF 10
36#define DDR_SCH_DEVTODEV_BUSRDTORD_OFF 0
37#define DDR_SCH_DEVTODEV_BUSRDTOWR_OFF 2
38#define DDR_SCH_DEVTODEV_BUSWRTORD_OFF 4
39
Ley Foon Tan733cc6c2019-11-27 15:55:26 +080040#include "sdram_soc64.h"
Ley Foon Tan456d4522019-03-22 01:24:05 +080041
Ley Foon Tan0bc28b72018-05-24 00:17:30 +080042#endif /* _SDRAM_S10_H_ */