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wdenkc6097192002-11-03 00:24:07 +00001#
Wolfgang Denkeca3aeb2013-06-21 10:22:36 +02002# (C) Copyright 2000 - 2013
wdenkc6097192002-11-03 00:24:07 +00003# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
4#
Wolfgang Denkeca3aeb2013-06-21 10:22:36 +02005# SPDX-License-Identifier: GPL-2.0+
wdenkc6097192002-11-03 00:24:07 +00006#
7
8Summary:
9========
10
wdenk24ee89b2002-11-03 17:56:27 +000011This directory contains the source code for U-Boot, a boot loader for
wdenke86e5a02004-10-17 21:12:06 +000012Embedded boards based on PowerPC, ARM, MIPS and several other
13processors, which can be installed in a boot ROM and used to
14initialize and test the hardware or to download and run application
15code.
wdenkc6097192002-11-03 00:24:07 +000016
17The development of U-Boot is closely related to Linux: some parts of
wdenk24ee89b2002-11-03 17:56:27 +000018the source code originate in the Linux source tree, we have some
19header files in common, and special provision has been made to
wdenkc6097192002-11-03 00:24:07 +000020support booting of Linux images.
21
22Some attention has been paid to make this software easily
23configurable and extendable. For instance, all monitor commands are
24implemented with the same call interface, so that it's very easy to
25add new commands. Also, instead of permanently adding rarely used
26code (for instance hardware test utilities) to the monitor, you can
27load and run it dynamically.
28
29
30Status:
31=======
32
33In general, all boards for which a configuration option exists in the
wdenk24ee89b2002-11-03 17:56:27 +000034Makefile have been tested to some extent and can be considered
wdenkc6097192002-11-03 00:24:07 +000035"working". In fact, many of them are used in production systems.
36
Robert P. J. Day7207b362015-12-19 07:16:10 -050037In case of problems see the CHANGELOG file to find out who contributed
38the specific port. In addition, there are various MAINTAINERS files
39scattered throughout the U-Boot source identifying the people or
40companies responsible for various boards and subsystems.
wdenkc6097192002-11-03 00:24:07 +000041
Robert P. J. Day7207b362015-12-19 07:16:10 -050042Note: As of August, 2010, there is no longer a CHANGELOG file in the
43actual U-Boot source tree; however, it can be created dynamically
44from the Git log using:
Robert P. J. Dayadb9d852012-11-14 02:03:20 +000045
46 make CHANGELOG
47
wdenkc6097192002-11-03 00:24:07 +000048
49Where to get help:
50==================
51
wdenk24ee89b2002-11-03 17:56:27 +000052In case you have questions about, problems with or contributions for
Robert P. J. Day7207b362015-12-19 07:16:10 -050053U-Boot, you should send a message to the U-Boot mailing list at
Peter Tyser0c325652008-09-10 09:18:34 -050054<u-boot@lists.denx.de>. There is also an archive of previous traffic
55on the mailing list - please search the archive before asking FAQ's.
56Please see http://lists.denx.de/pipermail/u-boot and
57http://dir.gmane.org/gmane.comp.boot-loaders.u-boot
wdenkc6097192002-11-03 00:24:07 +000058
59
Wolfgang Denk218ca722008-03-26 10:40:12 +010060Where to get source code:
61=========================
62
Robert P. J. Day7207b362015-12-19 07:16:10 -050063The U-Boot source code is maintained in the Git repository at
Wolfgang Denk218ca722008-03-26 10:40:12 +010064git://www.denx.de/git/u-boot.git ; you can browse it online at
65http://www.denx.de/cgi-bin/gitweb.cgi?p=u-boot.git;a=summary
66
67The "snapshot" links on this page allow you to download tarballs of
Marcel Ziswiler11ccc332008-07-09 08:17:15 +020068any version you might be interested in. Official releases are also
Wolfgang Denk218ca722008-03-26 10:40:12 +010069available for FTP download from the ftp://ftp.denx.de/pub/u-boot/
70directory.
71
Anatolij Gustschind4ee7112008-03-26 18:13:33 +010072Pre-built (and tested) images are available from
Wolfgang Denk218ca722008-03-26 10:40:12 +010073ftp://ftp.denx.de/pub/u-boot/images/
74
75
wdenkc6097192002-11-03 00:24:07 +000076Where we come from:
77===================
78
79- start from 8xxrom sources
wdenk24ee89b2002-11-03 17:56:27 +000080- create PPCBoot project (http://sourceforge.net/projects/ppcboot)
wdenkc6097192002-11-03 00:24:07 +000081- clean up code
82- make it easier to add custom boards
83- make it possible to add other [PowerPC] CPUs
84- extend functions, especially:
85 * Provide extended interface to Linux boot loader
86 * S-Record download
87 * network boot
Marcel Ziswiler11ccc332008-07-09 08:17:15 +020088 * PCMCIA / CompactFlash / ATA disk / SCSI ... boot
wdenk24ee89b2002-11-03 17:56:27 +000089- create ARMBoot project (http://sourceforge.net/projects/armboot)
wdenkc6097192002-11-03 00:24:07 +000090- add other CPU families (starting with ARM)
wdenk24ee89b2002-11-03 17:56:27 +000091- create U-Boot project (http://sourceforge.net/projects/u-boot)
Magnus Lilja0d28f342008-08-06 19:32:33 +020092- current project page: see http://www.denx.de/wiki/U-Boot
wdenk24ee89b2002-11-03 17:56:27 +000093
94
95Names and Spelling:
96===================
97
98The "official" name of this project is "Das U-Boot". The spelling
99"U-Boot" shall be used in all written text (documentation, comments
100in source files etc.). Example:
101
102 This is the README file for the U-Boot project.
103
104File names etc. shall be based on the string "u-boot". Examples:
105
106 include/asm-ppc/u-boot.h
107
108 #include <asm/u-boot.h>
109
110Variable names, preprocessor constants etc. shall be either based on
111the string "u_boot" or on "U_BOOT". Example:
112
113 U_BOOT_VERSION u_boot_logo
114 IH_OS_U_BOOT u_boot_hush_start
wdenkc6097192002-11-03 00:24:07 +0000115
116
wdenk93f19cc2002-12-17 17:55:09 +0000117Versioning:
118===========
119
Thomas Weber360d8832010-09-28 08:06:25 +0200120Starting with the release in October 2008, the names of the releases
121were changed from numerical release numbers without deeper meaning
122into a time stamp based numbering. Regular releases are identified by
123names consisting of the calendar year and month of the release date.
124Additional fields (if present) indicate release candidates or bug fix
125releases in "stable" maintenance trees.
wdenk93f19cc2002-12-17 17:55:09 +0000126
Thomas Weber360d8832010-09-28 08:06:25 +0200127Examples:
Wolfgang Denkc0f40852011-10-26 10:21:21 +0000128 U-Boot v2009.11 - Release November 2009
Thomas Weber360d8832010-09-28 08:06:25 +0200129 U-Boot v2009.11.1 - Release 1 in version November 2009 stable tree
Jelle van der Waa0de21ec2016-10-30 17:30:30 +0100130 U-Boot v2010.09-rc1 - Release candidate 1 for September 2010 release
wdenk93f19cc2002-12-17 17:55:09 +0000131
132
wdenkc6097192002-11-03 00:24:07 +0000133Directory Hierarchy:
134====================
135
Peter Tyser8d321b82010-04-12 22:28:21 -0500136/arch Architecture specific files
Masahiro Yamada6eae68e2014-03-07 18:02:02 +0900137 /arc Files generic to ARC architecture
Peter Tyser8d321b82010-04-12 22:28:21 -0500138 /arm Files generic to ARM architecture
Peter Tyser8d321b82010-04-12 22:28:21 -0500139 /avr32 Files generic to AVR32 architecture
Peter Tyser8d321b82010-04-12 22:28:21 -0500140 /blackfin Files generic to Analog Devices Blackfin architecture
Peter Tyser8d321b82010-04-12 22:28:21 -0500141 /m68k Files generic to m68k architecture
Peter Tyser8d321b82010-04-12 22:28:21 -0500142 /microblaze Files generic to microblaze architecture
Peter Tyser8d321b82010-04-12 22:28:21 -0500143 /mips Files generic to MIPS architecture
Macpaul Linafc1ce82011-10-19 20:41:11 +0000144 /nds32 Files generic to NDS32 architecture
Peter Tyser8d321b82010-04-12 22:28:21 -0500145 /nios2 Files generic to Altera NIOS2 architecture
Robert P. J. Day33c77312013-09-15 18:34:15 -0400146 /openrisc Files generic to OpenRISC architecture
Stefan Roesea47a12b2010-04-15 16:07:28 +0200147 /powerpc Files generic to PowerPC architecture
Robert P. J. Day7207b362015-12-19 07:16:10 -0500148 /sandbox Files generic to HW-independent "sandbox"
Peter Tyser8d321b82010-04-12 22:28:21 -0500149 /sh Files generic to SH architecture
Peter Tyser8d321b82010-04-12 22:28:21 -0500150 /sparc Files generic to SPARC architecture
Robert P. J. Day33c77312013-09-15 18:34:15 -0400151 /x86 Files generic to x86 architecture
Peter Tyser8d321b82010-04-12 22:28:21 -0500152/api Machine/arch independent API for external apps
153/board Board dependent files
Xu Ziyuan740f7e52016-08-26 19:54:49 +0800154/cmd U-Boot commands functions
Peter Tyser8d321b82010-04-12 22:28:21 -0500155/common Misc architecture independent functions
Robert P. J. Day7207b362015-12-19 07:16:10 -0500156/configs Board default configuration files
Peter Tyser8d321b82010-04-12 22:28:21 -0500157/disk Code for disk drive partition handling
158/doc Documentation (don't expect too much)
159/drivers Commonly used device drivers
Robert P. J. Day33c77312013-09-15 18:34:15 -0400160/dts Contains Makefile for building internal U-Boot fdt.
Peter Tyser8d321b82010-04-12 22:28:21 -0500161/examples Example code for standalone applications, etc.
162/fs Filesystem code (cramfs, ext2, jffs2, etc.)
163/include Header Files
Robert P. J. Day7207b362015-12-19 07:16:10 -0500164/lib Library routines generic to all architectures
165/Licenses Various license files
Peter Tyser8d321b82010-04-12 22:28:21 -0500166/net Networking code
167/post Power On Self Test
Robert P. J. Day7207b362015-12-19 07:16:10 -0500168/scripts Various build scripts and Makefiles
169/test Various unit test files
Peter Tyser8d321b82010-04-12 22:28:21 -0500170/tools Tools to build S-Record or U-Boot images, etc.
wdenkc6097192002-11-03 00:24:07 +0000171
wdenkc6097192002-11-03 00:24:07 +0000172Software Configuration:
173=======================
174
175Configuration is usually done using C preprocessor defines; the
176rationale behind that is to avoid dead code whenever possible.
177
178There are two classes of configuration variables:
179
180* Configuration _OPTIONS_:
181 These are selectable by the user and have names beginning with
182 "CONFIG_".
183
184* Configuration _SETTINGS_:
185 These depend on the hardware etc. and should not be meddled with if
186 you don't know what you're doing; they have names beginning with
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200187 "CONFIG_SYS_".
wdenkc6097192002-11-03 00:24:07 +0000188
Robert P. J. Day7207b362015-12-19 07:16:10 -0500189Previously, all configuration was done by hand, which involved creating
190symbolic links and editing configuration files manually. More recently,
191U-Boot has added the Kbuild infrastructure used by the Linux kernel,
192allowing you to use the "make menuconfig" command to configure your
193build.
wdenkc6097192002-11-03 00:24:07 +0000194
195
196Selection of Processor Architecture and Board Type:
197---------------------------------------------------
198
199For all supported boards there are ready-to-use default
Holger Freytherab584d62014-08-04 09:26:05 +0200200configurations available; just type "make <board_name>_defconfig".
wdenkc6097192002-11-03 00:24:07 +0000201
202Example: For a TQM823L module type:
203
204 cd u-boot
Holger Freytherab584d62014-08-04 09:26:05 +0200205 make TQM823L_defconfig
wdenkc6097192002-11-03 00:24:07 +0000206
Robert P. J. Day7207b362015-12-19 07:16:10 -0500207Note: If you're looking for the default configuration file for a board
208you're sure used to be there but is now missing, check the file
209doc/README.scrapyard for a list of no longer supported boards.
wdenkc6097192002-11-03 00:24:07 +0000210
Simon Glass75b3c3a2014-03-22 17:12:59 -0600211Sandbox Environment:
212--------------------
213
214U-Boot can be built natively to run on a Linux host using the 'sandbox'
215board. This allows feature development which is not board- or architecture-
216specific to be undertaken on a native platform. The sandbox is also used to
217run some of U-Boot's tests.
218
Jagannadha Sutradharudu Teki6b1978f2014-08-31 21:19:43 +0530219See board/sandbox/README.sandbox for more details.
Simon Glass75b3c3a2014-03-22 17:12:59 -0600220
221
Simon Glassdb910352015-03-03 08:03:00 -0700222Board Initialisation Flow:
223--------------------------
224
225This is the intended start-up flow for boards. This should apply for both
Robert P. J. Day7207b362015-12-19 07:16:10 -0500226SPL and U-Boot proper (i.e. they both follow the same rules).
Simon Glassdb910352015-03-03 08:03:00 -0700227
Robert P. J. Day7207b362015-12-19 07:16:10 -0500228Note: "SPL" stands for "Secondary Program Loader," which is explained in
229more detail later in this file.
230
231At present, SPL mostly uses a separate code path, but the function names
232and roles of each function are the same. Some boards or architectures
233may not conform to this. At least most ARM boards which use
234CONFIG_SPL_FRAMEWORK conform to this.
235
236Execution typically starts with an architecture-specific (and possibly
237CPU-specific) start.S file, such as:
238
239 - arch/arm/cpu/armv7/start.S
240 - arch/powerpc/cpu/mpc83xx/start.S
241 - arch/mips/cpu/start.S
242
243and so on. From there, three functions are called; the purpose and
244limitations of each of these functions are described below.
Simon Glassdb910352015-03-03 08:03:00 -0700245
246lowlevel_init():
247 - purpose: essential init to permit execution to reach board_init_f()
248 - no global_data or BSS
249 - there is no stack (ARMv7 may have one but it will soon be removed)
250 - must not set up SDRAM or use console
251 - must only do the bare minimum to allow execution to continue to
252 board_init_f()
253 - this is almost never needed
254 - return normally from this function
255
256board_init_f():
257 - purpose: set up the machine ready for running board_init_r():
258 i.e. SDRAM and serial UART
259 - global_data is available
260 - stack is in SRAM
261 - BSS is not available, so you cannot use global/static variables,
262 only stack variables and global_data
263
264 Non-SPL-specific notes:
265 - dram_init() is called to set up DRAM. If already done in SPL this
266 can do nothing
267
268 SPL-specific notes:
269 - you can override the entire board_init_f() function with your own
270 version as needed.
271 - preloader_console_init() can be called here in extremis
272 - should set up SDRAM, and anything needed to make the UART work
273 - these is no need to clear BSS, it will be done by crt0.S
274 - must return normally from this function (don't call board_init_r()
275 directly)
276
277Here the BSS is cleared. For SPL, if CONFIG_SPL_STACK_R is defined, then at
278this point the stack and global_data are relocated to below
279CONFIG_SPL_STACK_R_ADDR. For non-SPL, U-Boot is relocated to run at the top of
280memory.
281
282board_init_r():
283 - purpose: main execution, common code
284 - global_data is available
285 - SDRAM is available
286 - BSS is available, all static/global variables can be used
287 - execution eventually continues to main_loop()
288
289 Non-SPL-specific notes:
290 - U-Boot is relocated to the top of memory and is now running from
291 there.
292
293 SPL-specific notes:
294 - stack is optionally in SDRAM, if CONFIG_SPL_STACK_R is defined and
295 CONFIG_SPL_STACK_R_ADDR points into SDRAM
296 - preloader_console_init() can be called here - typically this is
297 done by defining CONFIG_SPL_BOARD_INIT and then supplying a
298 spl_board_init() function containing this call
299 - loads U-Boot or (in falcon mode) Linux
300
301
302
wdenkc6097192002-11-03 00:24:07 +0000303Configuration Options:
304----------------------
305
306Configuration depends on the combination of board and CPU type; all
307such information is kept in a configuration file
308"include/configs/<board_name>.h".
309
310Example: For a TQM823L module, all configuration settings are in
311"include/configs/TQM823L.h".
312
313
wdenk7f6c2cb2002-11-10 22:06:23 +0000314Many of the options are named exactly as the corresponding Linux
315kernel configuration options. The intention is to make it easier to
316build a config tool - later.
317
318
wdenkc6097192002-11-03 00:24:07 +0000319The following options need to be configured:
320
Kim Phillips26281142007-08-10 13:28:25 -0500321- CPU Type: Define exactly one, e.g. CONFIG_MPC85XX.
wdenkc6097192002-11-03 00:24:07 +0000322
Kim Phillips26281142007-08-10 13:28:25 -0500323- Board Type: Define exactly one, e.g. CONFIG_MPC8540ADS.
Wolfgang Denk6ccec442006-10-24 14:42:37 +0200324
325- CPU Daughterboard Type: (if CONFIG_ATSTK1000 is defined)
Haavard Skinnemoen09ea0de2007-11-01 12:44:20 +0100326 Define exactly one, e.g. CONFIG_ATSTK1002
wdenkc6097192002-11-03 00:24:07 +0000327
Lei Wencf946c62011-02-09 18:06:58 +0530328- Marvell Family Member
329 CONFIG_SYS_MVFS - define it if you want to enable
330 multiple fs option at one time
331 for marvell soc family
332
Marcel Ziswiler11ccc332008-07-09 08:17:15 +0200333- 8xx CPU Options: (if using an MPC8xx CPU)
wdenk66ca92a2004-09-28 17:59:53 +0000334 CONFIG_8xx_GCLK_FREQ - deprecated: CPU clock if
335 get_gclk_freq() cannot work
wdenk5da627a2003-10-09 20:09:04 +0000336 e.g. if there is no 32KHz
337 reference PIT/RTC clock
wdenk66ca92a2004-09-28 17:59:53 +0000338 CONFIG_8xx_OSCLK - PLL input clock (either EXTCLK
339 or XTAL/EXTAL)
wdenkc6097192002-11-03 00:24:07 +0000340
wdenk66ca92a2004-09-28 17:59:53 +0000341- 859/866/885 CPU options: (if using a MPC859 or MPC866 or MPC885 CPU):
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200342 CONFIG_SYS_8xx_CPUCLK_MIN
343 CONFIG_SYS_8xx_CPUCLK_MAX
wdenk66ca92a2004-09-28 17:59:53 +0000344 CONFIG_8xx_CPUCLK_DEFAULT
wdenk75d1ea72004-01-31 20:06:54 +0000345 See doc/README.MPC866
346
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200347 CONFIG_SYS_MEASURE_CPUCLK
wdenk75d1ea72004-01-31 20:06:54 +0000348
wdenkba56f622004-02-06 23:19:44 +0000349 Define this to measure the actual CPU clock instead
350 of relying on the correctness of the configured
351 values. Mostly useful for board bringup to make sure
352 the PLL is locked at the intended frequency. Note
353 that this requires a (stable) reference clock (32 kHz
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200354 RTC clock or CONFIG_SYS_8XX_XIN)
wdenk75d1ea72004-01-31 20:06:54 +0000355
Heiko Schocher506f3912009-03-12 07:37:15 +0100356 CONFIG_SYS_DELAYED_ICACHE
357
358 Define this option if you want to enable the
359 ICache only when Code runs from RAM.
360
Kumar Gala66412c62011-02-18 05:40:54 -0600361- 85xx CPU Options:
York Sunffd06e02012-10-08 07:44:30 +0000362 CONFIG_SYS_PPC64
363
364 Specifies that the core is a 64-bit PowerPC implementation (implements
365 the "64" category of the Power ISA). This is necessary for ePAPR
366 compliance, among other possible reasons.
367
Kumar Gala66412c62011-02-18 05:40:54 -0600368 CONFIG_SYS_FSL_TBCLK_DIV
369
370 Defines the core time base clock divider ratio compared to the
371 system clock. On most PQ3 devices this is 8, on newer QorIQ
372 devices it can be 16 or 32. The ratio varies from SoC to Soc.
373
Kumar Gala8f290842011-05-20 00:39:21 -0500374 CONFIG_SYS_FSL_PCIE_COMPAT
375
376 Defines the string to utilize when trying to match PCIe device
377 tree nodes for the given platform.
378
Scott Wood33eee332012-08-14 10:14:53 +0000379 CONFIG_SYS_FSL_ERRATUM_A004510
380
381 Enables a workaround for erratum A004510. If set,
382 then CONFIG_SYS_FSL_ERRATUM_A004510_SVR_REV and
383 CONFIG_SYS_FSL_CORENET_SNOOPVEC_COREONLY must be set.
384
385 CONFIG_SYS_FSL_ERRATUM_A004510_SVR_REV
386 CONFIG_SYS_FSL_ERRATUM_A004510_SVR_REV2 (optional)
387
388 Defines one or two SoC revisions (low 8 bits of SVR)
389 for which the A004510 workaround should be applied.
390
391 The rest of SVR is either not relevant to the decision
392 of whether the erratum is present (e.g. p2040 versus
393 p2041) or is implied by the build target, which controls
394 whether CONFIG_SYS_FSL_ERRATUM_A004510 is set.
395
396 See Freescale App Note 4493 for more information about
397 this erratum.
398
Prabhakar Kushwaha74fa22e2013-04-16 13:27:44 +0530399 CONFIG_A003399_NOR_WORKAROUND
400 Enables a workaround for IFC erratum A003399. It is only
Jeremiah Mahlerb445bbb2015-01-04 18:56:50 -0800401 required during NOR boot.
Prabhakar Kushwaha74fa22e2013-04-16 13:27:44 +0530402
Prabhakar Kushwaha9f074e62014-10-29 22:33:09 +0530403 CONFIG_A008044_WORKAROUND
404 Enables a workaround for T1040/T1042 erratum A008044. It is only
Jeremiah Mahlerb445bbb2015-01-04 18:56:50 -0800405 required during NAND boot and valid for Rev 1.0 SoC revision
Prabhakar Kushwaha9f074e62014-10-29 22:33:09 +0530406
Scott Wood33eee332012-08-14 10:14:53 +0000407 CONFIG_SYS_FSL_CORENET_SNOOPVEC_COREONLY
408
409 This is the value to write into CCSR offset 0x18600
410 according to the A004510 workaround.
411
Priyanka Jain64501c62013-07-02 09:21:04 +0530412 CONFIG_SYS_FSL_DSP_DDR_ADDR
413 This value denotes start offset of DDR memory which is
414 connected exclusively to the DSP cores.
415
Priyanka Jain765b0bd2013-04-04 09:31:54 +0530416 CONFIG_SYS_FSL_DSP_M2_RAM_ADDR
417 This value denotes start offset of M2 memory
418 which is directly connected to the DSP core.
419
Priyanka Jain64501c62013-07-02 09:21:04 +0530420 CONFIG_SYS_FSL_DSP_M3_RAM_ADDR
421 This value denotes start offset of M3 memory which is directly
422 connected to the DSP core.
423
Priyanka Jain765b0bd2013-04-04 09:31:54 +0530424 CONFIG_SYS_FSL_DSP_CCSRBAR_DEFAULT
425 This value denotes start offset of DSP CCSR space.
426
Priyanka Jainb1359912013-12-17 14:25:52 +0530427 CONFIG_SYS_FSL_SINGLE_SOURCE_CLK
428 Single Source Clock is clocking mode present in some of FSL SoC's.
429 In this mode, a single differential clock is used to supply
430 clocks to the sysclock, ddrclock and usbclock.
431
Aneesh Bansalfb4a2402014-03-18 23:40:26 +0530432 CONFIG_SYS_CPC_REINIT_F
433 This CONFIG is defined when the CPC is configured as SRAM at the
Bin Menga1875592016-02-05 19:30:11 -0800434 time of U-Boot entry and is required to be re-initialized.
Aneesh Bansalfb4a2402014-03-18 23:40:26 +0530435
Tang Yuantianaade2002014-04-17 15:33:46 +0800436 CONFIG_DEEP_SLEEP
Jeremiah Mahlerb445bbb2015-01-04 18:56:50 -0800437 Indicates this SoC supports deep sleep feature. If deep sleep is
Tang Yuantianaade2002014-04-17 15:33:46 +0800438 supported, core will start to execute uboot when wakes up.
439
Daniel Schwierzeck6cb461b2012-04-02 02:57:56 +0000440- Generic CPU options:
York Sun2a1680e2014-05-02 17:28:04 -0700441 CONFIG_SYS_GENERIC_GLOBAL_DATA
442 Defines global data is initialized in generic board board_init_f().
443 If this macro is defined, global data is created and cleared in
444 generic board board_init_f(). Without this macro, architecture/board
445 should initialize global data before calling board_init_f().
446
Daniel Schwierzeck6cb461b2012-04-02 02:57:56 +0000447 CONFIG_SYS_BIG_ENDIAN, CONFIG_SYS_LITTLE_ENDIAN
448
449 Defines the endianess of the CPU. Implementation of those
450 values is arch specific.
451
York Sun5614e712013-09-30 09:22:09 -0700452 CONFIG_SYS_FSL_DDR
453 Freescale DDR driver in use. This type of DDR controller is
454 found in mpc83xx, mpc85xx, mpc86xx as well as some ARM core
455 SoCs.
456
457 CONFIG_SYS_FSL_DDR_ADDR
458 Freescale DDR memory-mapped register base.
459
460 CONFIG_SYS_FSL_DDR_EMU
461 Specify emulator support for DDR. Some DDR features such as
462 deskew training are not available.
463
464 CONFIG_SYS_FSL_DDRC_GEN1
465 Freescale DDR1 controller.
466
467 CONFIG_SYS_FSL_DDRC_GEN2
468 Freescale DDR2 controller.
469
470 CONFIG_SYS_FSL_DDRC_GEN3
471 Freescale DDR3 controller.
472
York Sun34e026f2014-03-27 17:54:47 -0700473 CONFIG_SYS_FSL_DDRC_GEN4
474 Freescale DDR4 controller.
475
York Sun9ac4ffb2013-09-30 14:20:51 -0700476 CONFIG_SYS_FSL_DDRC_ARM_GEN3
477 Freescale DDR3 controller for ARM-based SoCs.
478
York Sun5614e712013-09-30 09:22:09 -0700479 CONFIG_SYS_FSL_DDR1
480 Board config to use DDR1. It can be enabled for SoCs with
481 Freescale DDR1 or DDR2 controllers, depending on the board
482 implemetation.
483
484 CONFIG_SYS_FSL_DDR2
Robert P. J. Day62a3b7d2016-07-15 13:44:45 -0400485 Board config to use DDR2. It can be enabled for SoCs with
York Sun5614e712013-09-30 09:22:09 -0700486 Freescale DDR2 or DDR3 controllers, depending on the board
487 implementation.
488
489 CONFIG_SYS_FSL_DDR3
490 Board config to use DDR3. It can be enabled for SoCs with
York Sun34e026f2014-03-27 17:54:47 -0700491 Freescale DDR3 or DDR3L controllers.
492
493 CONFIG_SYS_FSL_DDR3L
494 Board config to use DDR3L. It can be enabled for SoCs with
495 DDR3L controllers.
496
497 CONFIG_SYS_FSL_DDR4
498 Board config to use DDR4. It can be enabled for SoCs with
499 DDR4 controllers.
York Sun5614e712013-09-30 09:22:09 -0700500
Prabhakar Kushwaha1b4175d2014-01-18 12:28:30 +0530501 CONFIG_SYS_FSL_IFC_BE
502 Defines the IFC controller register space as Big Endian
503
504 CONFIG_SYS_FSL_IFC_LE
505 Defines the IFC controller register space as Little Endian
506
Prabhakar Kushwaha1c407072017-02-02 15:01:26 +0530507 CONFIG_SYS_FSL_IFC_CLK_DIV
508 Defines divider of platform clock(clock input to IFC controller).
509
Prabhakar Kushwahaadd63f92017-02-02 15:02:00 +0530510 CONFIG_SYS_FSL_LBC_CLK_DIV
511 Defines divider of platform clock(clock input to eLBC controller).
512
Prabhakar Kushwaha690e4252014-01-13 11:28:04 +0530513 CONFIG_SYS_FSL_PBL_PBI
514 It enables addition of RCW (Power on reset configuration) in built image.
515 Please refer doc/README.pblimage for more details
516
517 CONFIG_SYS_FSL_PBL_RCW
518 It adds PBI(pre-boot instructions) commands in u-boot build image.
519 PBI commands can be used to configure SoC before it starts the execution.
520 Please refer doc/README.pblimage for more details
521
Prabhakar Kushwaha89ad7be2014-04-08 19:13:34 +0530522 CONFIG_SPL_FSL_PBL
523 It adds a target to create boot binary having SPL binary in PBI format
524 concatenated with u-boot binary.
525
York Sun4e5b1bd2014-02-10 13:59:42 -0800526 CONFIG_SYS_FSL_DDR_BE
527 Defines the DDR controller register space as Big Endian
528
529 CONFIG_SYS_FSL_DDR_LE
530 Defines the DDR controller register space as Little Endian
531
York Sun6b9e3092014-02-10 13:59:43 -0800532 CONFIG_SYS_FSL_DDR_SDRAM_BASE_PHY
533 Physical address from the view of DDR controllers. It is the
534 same as CONFIG_SYS_DDR_SDRAM_BASE for all Power SoCs. But
535 it could be different for ARM SoCs.
536
York Sun6b1e1252014-02-10 13:59:44 -0800537 CONFIG_SYS_FSL_DDR_INTLV_256B
538 DDR controller interleaving on 256-byte. This is a special
539 interleaving mode, handled by Dickens for Freescale layerscape
540 SoCs with ARM core.
541
York Sun1d71efb2014-08-01 15:51:00 -0700542 CONFIG_SYS_FSL_DDR_MAIN_NUM_CTRLS
543 Number of controllers used as main memory.
544
545 CONFIG_SYS_FSL_OTHER_DDR_NUM_CTRLS
546 Number of controllers used for other than main memory.
547
Prabhakar Kushwaha44937212015-11-09 16:42:07 +0530548 CONFIG_SYS_FSL_HAS_DP_DDR
549 Defines the SoC has DP-DDR used for DPAA.
550
Ruchika Gupta028dbb82014-09-09 11:50:31 +0530551 CONFIG_SYS_FSL_SEC_BE
552 Defines the SEC controller register space as Big Endian
553
554 CONFIG_SYS_FSL_SEC_LE
555 Defines the SEC controller register space as Little Endian
556
Daniel Schwierzeck92bbd642011-07-27 13:22:39 +0200557- MIPS CPU options:
558 CONFIG_SYS_INIT_SP_OFFSET
559
560 Offset relative to CONFIG_SYS_SDRAM_BASE for initial stack
561 pointer. This is needed for the temporary stack before
562 relocation.
563
564 CONFIG_SYS_MIPS_CACHE_MODE
565
566 Cache operation mode for the MIPS CPU.
567 See also arch/mips/include/asm/mipsregs.h.
568 Possible values are:
569 CONF_CM_CACHABLE_NO_WA
570 CONF_CM_CACHABLE_WA
571 CONF_CM_UNCACHED
572 CONF_CM_CACHABLE_NONCOHERENT
573 CONF_CM_CACHABLE_CE
574 CONF_CM_CACHABLE_COW
575 CONF_CM_CACHABLE_CUW
576 CONF_CM_CACHABLE_ACCELERATED
577
578 CONFIG_SYS_XWAY_EBU_BOOTCFG
579
580 Special option for Lantiq XWAY SoCs for booting from NOR flash.
581 See also arch/mips/cpu/mips32/start.S.
582
583 CONFIG_XWAY_SWAP_BYTES
584
585 Enable compilation of tools/xway-swap-bytes needed for Lantiq
586 XWAY SoCs for booting from NOR flash. The U-Boot image needs to
587 be swapped if a flash programmer is used.
588
Christian Rieschb67d8812012-02-02 00:44:39 +0000589- ARM options:
590 CONFIG_SYS_EXCEPTION_VECTORS_HIGH
591
592 Select high exception vectors of the ARM core, e.g., do not
593 clear the V bit of the c1 register of CP15.
594
Aneesh V5356f542012-03-08 07:20:19 +0000595 CONFIG_SYS_THUMB_BUILD
596
597 Use this flag to build U-Boot using the Thumb instruction
598 set for ARM architectures. Thumb instruction set provides
599 better code density. For ARM architectures that support
600 Thumb2 this flag will result in Thumb2 code generated by
601 GCC.
602
Stephen Warrenc5d47522013-03-04 13:29:40 +0000603 CONFIG_ARM_ERRATA_716044
Stephen Warren06785872013-02-26 12:28:27 +0000604 CONFIG_ARM_ERRATA_742230
605 CONFIG_ARM_ERRATA_743622
606 CONFIG_ARM_ERRATA_751472
Nitin Gargb7588e32014-04-02 08:55:02 -0500607 CONFIG_ARM_ERRATA_761320
Ian Campbelle392b922015-09-29 10:27:09 +0100608 CONFIG_ARM_ERRATA_773022
609 CONFIG_ARM_ERRATA_774769
610 CONFIG_ARM_ERRATA_794072
Stephen Warren06785872013-02-26 12:28:27 +0000611
612 If set, the workarounds for these ARM errata are applied early
613 during U-Boot startup. Note that these options force the
614 workarounds to be applied; no CPU-type/version detection
615 exists, unlike the similar options in the Linux kernel. Do not
616 set these options unless they apply!
617
York Sun207774b2015-03-20 19:28:08 -0700618 COUNTER_FREQUENCY
619 Generic timer clock source frequency.
620
621 COUNTER_FREQUENCY_REAL
622 Generic timer clock source frequency if the real clock is
623 different from COUNTER_FREQUENCY, and can only be determined
624 at run time.
625
Nishanth Menonc616a0d2015-03-09 17:11:59 -0500626 NOTE: The following can be machine specific errata. These
627 do have ability to provide rudimentary version and machine
628 specific checks, but expect no product checks.
Nishanth Menon5902f4c2015-03-09 17:12:01 -0500629 CONFIG_ARM_ERRATA_430973
Nishanth Menonb45c48a2015-03-09 17:12:00 -0500630 CONFIG_ARM_ERRATA_454179
Nishanth Menon9b4d65f2015-03-09 17:12:02 -0500631 CONFIG_ARM_ERRATA_621766
Nishanth Menonc616a0d2015-03-09 17:11:59 -0500632 CONFIG_ARM_ERRATA_798870
Nishanth Menona615d0b2015-07-27 16:26:05 -0500633 CONFIG_ARM_ERRATA_801819
Nishanth Menonc616a0d2015-03-09 17:11:59 -0500634
Stephen Warren73c38932015-01-19 16:25:52 -0700635- Tegra SoC options:
636 CONFIG_TEGRA_SUPPORT_NON_SECURE
637
638 Support executing U-Boot in non-secure (NS) mode. Certain
639 impossible actions will be skipped if the CPU is in NS mode,
640 such as ARM architectural timer initialization.
641
wdenk5da627a2003-10-09 20:09:04 +0000642- Linux Kernel Interface:
wdenkc6097192002-11-03 00:24:07 +0000643 CONFIG_CLOCKS_IN_MHZ
644
645 U-Boot stores all clock information in Hz
646 internally. For binary compatibility with older Linux
647 kernels (which expect the clocks passed in the
648 bd_info data to be in MHz) the environment variable
649 "clocks_in_mhz" can be defined so that U-Boot
650 converts clock data to MHZ before passing it to the
651 Linux kernel.
wdenkc6097192002-11-03 00:24:07 +0000652 When CONFIG_CLOCKS_IN_MHZ is defined, a definition of
Wolfgang Denk218ca722008-03-26 10:40:12 +0100653 "clocks_in_mhz=1" is automatically included in the
wdenkc6097192002-11-03 00:24:07 +0000654 default environment.
655
wdenk5da627a2003-10-09 20:09:04 +0000656 CONFIG_MEMSIZE_IN_BYTES [relevant for MIPS only]
657
Jeremiah Mahlerb445bbb2015-01-04 18:56:50 -0800658 When transferring memsize parameter to Linux, some versions
wdenk5da627a2003-10-09 20:09:04 +0000659 expect it to be in bytes, others in MB.
660 Define CONFIG_MEMSIZE_IN_BYTES to make it in bytes.
661
Gerald Van Barenfec6d9e2008-06-03 20:34:45 -0400662 CONFIG_OF_LIBFDT
Wolfgang Denkf57f70a2005-10-13 01:45:54 +0200663
664 New kernel versions are expecting firmware settings to be
Gerald Van Baren213bf8c2007-03-31 12:23:51 -0400665 passed using flattened device trees (based on open firmware
666 concepts).
667
668 CONFIG_OF_LIBFDT
669 * New libfdt-based support
670 * Adds the "fdt" command
Kim Phillips3bb342f2007-08-10 14:34:14 -0500671 * The bootm command automatically updates the fdt
Gerald Van Baren213bf8c2007-03-31 12:23:51 -0400672
Marcel Ziswilerb55ae402009-09-09 21:18:41 +0200673 OF_CPU - The proper name of the cpus node (only required for
674 MPC512X and MPC5xxx based boards).
675 OF_SOC - The proper name of the soc node (only required for
676 MPC512X and MPC5xxx based boards).
Wolfgang Denkf57f70a2005-10-13 01:45:54 +0200677 OF_TBCLK - The timebase frequency.
Kumar Galac2871f02006-01-11 13:59:02 -0600678 OF_STDOUT_PATH - The path to the console device
Wolfgang Denkf57f70a2005-10-13 01:45:54 +0200679
Marcel Ziswiler11ccc332008-07-09 08:17:15 +0200680 boards with QUICC Engines require OF_QE to set UCC MAC
681 addresses
Kim Phillips3bb342f2007-08-10 14:34:14 -0500682
Kumar Gala4e253132006-01-11 13:54:17 -0600683 CONFIG_OF_BOARD_SETUP
684
685 Board code has addition modification that it wants to make
686 to the flat device tree before handing it off to the kernel
wdenk6705d812004-08-02 23:22:59 +0000687
Simon Glassc654b512014-10-23 18:58:54 -0600688 CONFIG_OF_SYSTEM_SETUP
689
690 Other code has addition modification that it wants to make
691 to the flat device tree before handing it off to the kernel.
692 This causes ft_system_setup() to be called before booting
693 the kernel.
694
Heiko Schocher3887c3f2009-09-23 07:56:08 +0200695 CONFIG_OF_IDE_FIXUP
696
697 U-Boot can detect if an IDE device is present or not.
698 If not, and this new config option is activated, U-Boot
699 removes the ATA node from the DTS before booting Linux,
700 so the Linux IDE driver does not probe the device and
701 crash. This is needed for buggy hardware (uc101) where
702 no pull down resistor is connected to the signal IDE5V_DD7.
703
Igor Grinberg7eb29392011-07-14 05:45:07 +0000704 CONFIG_MACH_TYPE [relevant for ARM only][mandatory]
705
706 This setting is mandatory for all boards that have only one
707 machine type and must be used to specify the machine type
708 number as it appears in the ARM machine registry
709 (see http://www.arm.linux.org.uk/developer/machines/).
710 Only boards that have multiple machine types supported
711 in a single configuration file and the machine type is
712 runtime discoverable, do not have to use this setting.
713
Niklaus Giger0b2f4ec2008-11-03 22:13:47 +0100714- vxWorks boot parameters:
715
716 bootvx constructs a valid bootline using the following
Bin Meng9e98b7e2015-10-07 20:19:17 -0700717 environments variables: bootdev, bootfile, ipaddr, netmask,
718 serverip, gatewayip, hostname, othbootargs.
Niklaus Giger0b2f4ec2008-11-03 22:13:47 +0100719 It loads the vxWorks image pointed bootfile.
720
Niklaus Giger0b2f4ec2008-11-03 22:13:47 +0100721 Note: If a "bootargs" environment is defined, it will overwride
722 the defaults discussed just above.
723
Aneesh V2c451f72011-06-16 23:30:47 +0000724- Cache Configuration:
725 CONFIG_SYS_ICACHE_OFF - Do not enable instruction cache in U-Boot
726 CONFIG_SYS_DCACHE_OFF - Do not enable data cache in U-Boot
727 CONFIG_SYS_L2CACHE_OFF- Do not enable L2 cache in U-Boot
728
Aneesh V93bc2192011-06-16 23:30:51 +0000729- Cache Configuration for ARM:
730 CONFIG_SYS_L2_PL310 - Enable support for ARM PL310 L2 cache
731 controller
732 CONFIG_SYS_PL310_BASE - Physical base address of PL310
733 controller register space
734
wdenk6705d812004-08-02 23:22:59 +0000735- Serial Ports:
Andreas Engel48d01922008-09-08 14:30:53 +0200736 CONFIG_PL010_SERIAL
wdenk6705d812004-08-02 23:22:59 +0000737
738 Define this if you want support for Amba PrimeCell PL010 UARTs.
739
Andreas Engel48d01922008-09-08 14:30:53 +0200740 CONFIG_PL011_SERIAL
wdenk6705d812004-08-02 23:22:59 +0000741
742 Define this if you want support for Amba PrimeCell PL011 UARTs.
743
744 CONFIG_PL011_CLOCK
745
746 If you have Amba PrimeCell PL011 UARTs, set this variable to
747 the clock speed of the UARTs.
748
749 CONFIG_PL01x_PORTS
750
751 If you have Amba PrimeCell PL010 or PL011 UARTs on your board,
752 define this to a list of base addresses for each (supported)
753 port. See e.g. include/configs/versatile.h
754
Karicheri, Muralidharand57dee52014-04-09 15:38:46 -0400755 CONFIG_SERIAL_HW_FLOW_CONTROL
756
757 Define this variable to enable hw flow control in serial driver.
758 Current user of this option is drivers/serial/nsl16550.c driver
wdenk6705d812004-08-02 23:22:59 +0000759
wdenkc6097192002-11-03 00:24:07 +0000760- Console Interface:
wdenk43d96162003-03-06 00:02:04 +0000761 Depending on board, define exactly one serial port
762 (like CONFIG_8xx_CONS_SMC1, CONFIG_8xx_CONS_SMC2,
763 CONFIG_8xx_CONS_SCC1, ...), or switch off the serial
764 console by defining CONFIG_8xx_CONS_NONE
wdenkc6097192002-11-03 00:24:07 +0000765
766 Note: if CONFIG_8xx_CONS_NONE is defined, the serial
767 port routines must be defined elsewhere
768 (i.e. serial_init(), serial_getc(), ...)
769
wdenkc6097192002-11-03 00:24:07 +0000770- Console Baudrate:
771 CONFIG_BAUDRATE - in bps
772 Select one of the baudrates listed in
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200773 CONFIG_SYS_BAUDRATE_TABLE, see below.
774 CONFIG_SYS_BRGCLK_PRESCALE, baudrate prescale
wdenkc6097192002-11-03 00:24:07 +0000775
Heiko Schocherc92fac92009-01-30 12:55:38 +0100776- Console Rx buffer length
777 With CONFIG_SYS_SMC_RXBUFLEN it is possible to define
778 the maximum receive buffer length for the SMC.
Heiko Schocher2b3f12c2009-02-10 09:31:47 +0100779 This option is actual only for 82xx and 8xx possible.
Heiko Schocherc92fac92009-01-30 12:55:38 +0100780 If using CONFIG_SYS_SMC_RXBUFLEN also CONFIG_SYS_MAXIDLE
781 must be defined, to setup the maximum idle timeout for
782 the SMC.
783
wdenkc6097192002-11-03 00:24:07 +0000784- Autoboot Command:
785 CONFIG_BOOTCOMMAND
786 Only needed when CONFIG_BOOTDELAY is enabled;
787 define a command string that is automatically executed
788 when no character is read on the console interface
789 within "Boot Delay" after reset.
790
791 CONFIG_BOOTARGS
wdenk43d96162003-03-06 00:02:04 +0000792 This can be used to pass arguments to the bootm
793 command. The value of CONFIG_BOOTARGS goes into the
794 environment value "bootargs".
wdenkc6097192002-11-03 00:24:07 +0000795
796 CONFIG_RAMBOOT and CONFIG_NFSBOOT
wdenk43d96162003-03-06 00:02:04 +0000797 The value of these goes into the environment as
798 "ramboot" and "nfsboot" respectively, and can be used
799 as a convenience, when switching between booting from
Marcel Ziswiler11ccc332008-07-09 08:17:15 +0200800 RAM and NFS.
wdenkc6097192002-11-03 00:24:07 +0000801
Heiko Schochereda0ba32013-11-04 14:04:59 +0100802- Bootcount:
803 CONFIG_BOOTCOUNT_LIMIT
804 Implements a mechanism for detecting a repeating reboot
805 cycle, see:
806 http://www.denx.de/wiki/view/DULG/UBootBootCountLimit
807
808 CONFIG_BOOTCOUNT_ENV
809 If no softreset save registers are found on the hardware
810 "bootcount" is stored in the environment. To prevent a
811 saveenv on all reboots, the environment variable
812 "upgrade_available" is used. If "upgrade_available" is
813 0, "bootcount" is always 0, if "upgrade_available" is
814 1 "bootcount" is incremented in the environment.
815 So the Userspace Applikation must set the "upgrade_available"
816 and "bootcount" variable to 0, if a boot was successfully.
817
wdenkc6097192002-11-03 00:24:07 +0000818- Pre-Boot Commands:
819 CONFIG_PREBOOT
820
821 When this option is #defined, the existence of the
822 environment variable "preboot" will be checked
823 immediately before starting the CONFIG_BOOTDELAY
824 countdown and/or running the auto-boot command resp.
825 entering interactive mode.
826
827 This feature is especially useful when "preboot" is
828 automatically generated or modified. For an example
829 see the LWMON board specific code: here "preboot" is
830 modified when the user holds down a certain
831 combination of keys on the (special) keyboard when
832 booting the systems
833
834- Serial Download Echo Mode:
835 CONFIG_LOADS_ECHO
836 If defined to 1, all characters received during a
837 serial download (using the "loads" command) are
838 echoed back. This might be needed by some terminal
839 emulations (like "cu"), but may as well just take
840 time on others. This setting #define's the initial
841 value of the "loads_echo" environment variable.
842
Jon Loeliger602ad3b2007-06-11 19:03:39 -0500843- Kgdb Serial Baudrate: (if CONFIG_CMD_KGDB is defined)
wdenkc6097192002-11-03 00:24:07 +0000844 CONFIG_KGDB_BAUDRATE
845 Select one of the baudrates listed in
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200846 CONFIG_SYS_BAUDRATE_TABLE, see below.
wdenkc6097192002-11-03 00:24:07 +0000847
848- Monitor Functions:
Jon Loeliger602ad3b2007-06-11 19:03:39 -0500849 Monitor commands can be included or excluded
850 from the build by using the #include files
Stephen Warrenc6c621b2012-08-05 16:07:19 +0000851 <config_cmd_all.h> and #undef'ing unwanted
Joe Hershbergeref0f2f52015-06-22 16:15:30 -0500852 commands, or adding #define's for wanted commands.
wdenkc6097192002-11-03 00:24:07 +0000853
Jon Loeliger602ad3b2007-06-11 19:03:39 -0500854 The default command configuration includes all commands
855 except those marked below with a "*".
wdenkc6097192002-11-03 00:24:07 +0000856
Marek Vasutb401b732014-03-05 19:58:39 +0100857 CONFIG_CMD_AES AES 128 CBC encrypt/decrypt
Jon Loeliger602ad3b2007-06-11 19:03:39 -0500858 CONFIG_CMD_ASKENV * ask for env variable
Jon Loeliger602ad3b2007-06-11 19:03:39 -0500859 CONFIG_CMD_BDI bdinfo
860 CONFIG_CMD_BEDBUG * Include BedBug Debugger
861 CONFIG_CMD_BMP * BMP support
862 CONFIG_CMD_BSP * Board specific commands
863 CONFIG_CMD_BOOTD bootd
Tom Rinid2b2ffe2014-08-14 06:42:36 -0400864 CONFIG_CMD_BOOTI * ARM64 Linux kernel Image support
Jon Loeliger602ad3b2007-06-11 19:03:39 -0500865 CONFIG_CMD_CACHE * icache, dcache
Michal Simek08d0d6f2013-11-21 13:39:02 -0800866 CONFIG_CMD_CLK * clock command support
Jon Loeliger602ad3b2007-06-11 19:03:39 -0500867 CONFIG_CMD_CONSOLE coninfo
Mike Frysinger710b9932010-12-21 14:19:51 -0500868 CONFIG_CMD_CRC32 * crc32
Jon Loeliger602ad3b2007-06-11 19:03:39 -0500869 CONFIG_CMD_DATE * support for RTC, date/time...
870 CONFIG_CMD_DHCP * DHCP support
871 CONFIG_CMD_DIAG * Diagnostics
Peter Tysera7c93102008-12-17 16:36:22 -0600872 CONFIG_CMD_DS4510 * ds4510 I2C gpio commands
873 CONFIG_CMD_DS4510_INFO * ds4510 I2C info command
874 CONFIG_CMD_DS4510_MEM * ds4510 I2C eeprom/sram commansd
875 CONFIG_CMD_DS4510_RST * ds4510 I2C rst command
Jon Loeliger602ad3b2007-06-11 19:03:39 -0500876 CONFIG_CMD_DTT * Digital Therm and Thermostat
877 CONFIG_CMD_ECHO echo arguments
Peter Tyser246c6922009-10-25 15:12:56 -0500878 CONFIG_CMD_EDITENV edit env variable
Jon Loeliger602ad3b2007-06-11 19:03:39 -0500879 CONFIG_CMD_EEPROM * EEPROM read/write support
Nikita Kiryanovaa9e6042016-04-16 17:55:03 +0300880 CONFIG_CMD_EEPROM_LAYOUT* EEPROM layout aware commands
Jon Loeliger602ad3b2007-06-11 19:03:39 -0500881 CONFIG_CMD_ELF * bootelf, bootvx
Joe Hershberger5e2b3e02012-12-11 22:16:25 -0600882 CONFIG_CMD_ENV_CALLBACK * display details about env callbacks
Joe Hershbergerfffad712012-12-11 22:16:33 -0600883 CONFIG_CMD_ENV_FLAGS * display details about env flags
Andrew Ruder88733e22013-10-22 19:07:34 -0500884 CONFIG_CMD_ENV_EXISTS * check existence of env variable
Mike Frysinger0c79cda2010-12-26 23:09:45 -0500885 CONFIG_CMD_EXPORTENV * export the environment
Stephen Warren03e2ecf2012-10-22 06:43:50 +0000886 CONFIG_CMD_EXT2 * ext2 command support
887 CONFIG_CMD_EXT4 * ext4 command support
Stephen Warren16f4d932014-01-24 20:46:37 -0700888 CONFIG_CMD_FS_GENERIC * filesystem commands (e.g. load, ls)
889 that work for multiple fs types
Christian Gmeiner59e890e2014-11-12 14:35:04 +0100890 CONFIG_CMD_FS_UUID * Look up a filesystem UUID
Mike Frysingerbdab39d2009-01-28 19:08:14 -0500891 CONFIG_CMD_SAVEENV saveenv
Jon Loeliger602ad3b2007-06-11 19:03:39 -0500892 CONFIG_CMD_FDC * Floppy Disk Support
Stephen Warren03e2ecf2012-10-22 06:43:50 +0000893 CONFIG_CMD_FAT * FAT command support
Jon Loeliger602ad3b2007-06-11 19:03:39 -0500894 CONFIG_CMD_FLASH flinfo, erase, protect
895 CONFIG_CMD_FPGA FPGA device initialization support
Vincent Stehlé4d98b5c2013-06-20 18:14:22 +0200896 CONFIG_CMD_FUSE * Device fuse support
Anton Staaf53fdc7e2012-12-05 14:46:29 +0000897 CONFIG_CMD_GETTIME * Get time since boot
Mike Frysingera641b972010-12-26 23:32:22 -0500898 CONFIG_CMD_GO * the 'go' command (exec code)
Kim Phillipsa000b792011-04-05 07:15:14 +0000899 CONFIG_CMD_GREPENV * search environment
Simon Glassbf36c5d2012-12-05 14:46:38 +0000900 CONFIG_CMD_HASH * calculate hash / digest
Jon Loeliger602ad3b2007-06-11 19:03:39 -0500901 CONFIG_CMD_I2C * I2C serial bus support
902 CONFIG_CMD_IDE * IDE harddisk support
903 CONFIG_CMD_IMI iminfo
Vipin Kumar8fdf1e02012-12-16 22:32:48 +0000904 CONFIG_CMD_IMLS List all images found in NOR flash
Vincent Stehlé4d98b5c2013-06-20 18:14:22 +0200905 CONFIG_CMD_IMLS_NAND * List all images found in NAND flash
Jon Loeliger602ad3b2007-06-11 19:03:39 -0500906 CONFIG_CMD_IMMAP * IMMR dump support
Simon Glassaa532332014-06-11 23:29:41 -0600907 CONFIG_CMD_IOTRACE * I/O tracing for debugging
Mike Frysinger0c79cda2010-12-26 23:09:45 -0500908 CONFIG_CMD_IMPORTENV * import an environment
Joe Hershbergerc167cc02012-10-03 11:15:51 +0000909 CONFIG_CMD_INI * import data from an ini file into the env
Jon Loeliger602ad3b2007-06-11 19:03:39 -0500910 CONFIG_CMD_IRQ * irqinfo
911 CONFIG_CMD_ITEST Integer/string test of 2 values
912 CONFIG_CMD_JFFS2 * JFFS2 Support
913 CONFIG_CMD_KGDB * kgdb
Vincent Stehlé4d98b5c2013-06-20 18:14:22 +0200914 CONFIG_CMD_LDRINFO * ldrinfo (display Blackfin loader)
Joe Hershbergerd22c3382012-05-23 08:00:12 +0000915 CONFIG_CMD_LINK_LOCAL * link-local IP address auto-configuration
916 (169.254.*.*)
Jon Loeliger602ad3b2007-06-11 19:03:39 -0500917 CONFIG_CMD_LOADB loadb
918 CONFIG_CMD_LOADS loads
Vincent Stehlé4d98b5c2013-06-20 18:14:22 +0200919 CONFIG_CMD_MD5SUM * print md5 message digest
Robin Getz02c9aa12009-07-27 00:07:59 -0400920 (requires CONFIG_CMD_MEMORY and CONFIG_MD5)
Simon Glass15a33e42012-11-30 13:01:20 +0000921 CONFIG_CMD_MEMINFO * Display detailed memory information
Jon Loeliger602ad3b2007-06-11 19:03:39 -0500922 CONFIG_CMD_MEMORY md, mm, nm, mw, cp, cmp, crc, base,
Wolfgang Denka2681702013-03-08 10:51:32 +0000923 loop, loopw
Vincent Stehlé4d98b5c2013-06-20 18:14:22 +0200924 CONFIG_CMD_MEMTEST * mtest
Jon Loeliger602ad3b2007-06-11 19:03:39 -0500925 CONFIG_CMD_MISC Misc functions like sleep etc
926 CONFIG_CMD_MMC * MMC memory mapped support
927 CONFIG_CMD_MII * MII utility commands
Stefan Roese68d7d652009-03-19 13:30:36 +0100928 CONFIG_CMD_MTDPARTS * MTD partition support
Jon Loeliger602ad3b2007-06-11 19:03:39 -0500929 CONFIG_CMD_NAND * NAND support
930 CONFIG_CMD_NET bootp, tftpboot, rarpboot
Vincent Stehlé4d98b5c2013-06-20 18:14:22 +0200931 CONFIG_CMD_NFS NFS support
Peter Tysere92739d2008-12-17 16:36:21 -0600932 CONFIG_CMD_PCA953X * PCA953x I2C gpio commands
Wolfgang Denkc0f40852011-10-26 10:21:21 +0000933 CONFIG_CMD_PCA953X_INFO * PCA953x I2C gpio info command
Jon Loeliger602ad3b2007-06-11 19:03:39 -0500934 CONFIG_CMD_PCI * pciinfo
935 CONFIG_CMD_PCMCIA * PCMCIA support
936 CONFIG_CMD_PING * send ICMP ECHO_REQUEST to network
937 host
938 CONFIG_CMD_PORTIO * Port I/O
Kenneth Watersff048ea2012-12-05 14:46:30 +0000939 CONFIG_CMD_READ * Read raw data from partition
Jon Loeliger602ad3b2007-06-11 19:03:39 -0500940 CONFIG_CMD_REGINFO * Register dump
941 CONFIG_CMD_RUN run command in env variable
Simon Glassd3049312012-12-26 09:53:36 +0000942 CONFIG_CMD_SANDBOX * sb command to access sandbox features
Jon Loeliger602ad3b2007-06-11 19:03:39 -0500943 CONFIG_CMD_SAVES * save S record dump
Simon Glassc649e3c2016-05-01 11:36:02 -0600944 CONFIG_SCSI * SCSI Support
Jon Loeliger602ad3b2007-06-11 19:03:39 -0500945 CONFIG_CMD_SDRAM * print SDRAM configuration information
946 (requires CONFIG_CMD_I2C)
947 CONFIG_CMD_SETGETDCR Support for DCR Register access
948 (4xx only)
Eric Nelsonf61ec452012-01-31 10:52:08 -0700949 CONFIG_CMD_SF * Read/write/erase SPI NOR flash
Vincent Stehlé4d98b5c2013-06-20 18:14:22 +0200950 CONFIG_CMD_SHA1SUM * print sha1 memory digest
Robin Getz02c9aa12009-07-27 00:07:59 -0400951 (requires CONFIG_CMD_MEMORY)
Bob Liu7d861d92013-02-05 19:05:41 +0800952 CONFIG_CMD_SOFTSWITCH * Soft switch setting command for BF60x
Wolfgang Denk74de7ae2009-04-01 23:34:12 +0200953 CONFIG_CMD_SOURCE "source" command Support
Jon Loeliger602ad3b2007-06-11 19:03:39 -0500954 CONFIG_CMD_SPI * SPI serial bus support
Luca Ceresoli7a83af02011-05-17 00:03:40 +0000955 CONFIG_CMD_TFTPSRV * TFTP transfer in server mode
Simon Glass1fb7cd42011-10-24 18:00:07 +0000956 CONFIG_CMD_TFTPPUT * TFTP put command (upload)
Joe Hershbergerda83bcd2012-10-03 12:14:57 +0000957 CONFIG_CMD_TIME * run command and report execution time (ARM specific)
958 CONFIG_CMD_TIMER * access to the system tick timer
Jon Loeliger602ad3b2007-06-11 19:03:39 -0500959 CONFIG_CMD_USB * USB support
Jon Loeliger602ad3b2007-06-11 19:03:39 -0500960 CONFIG_CMD_CDP * Cisco Discover Protocol support
Marek Vasutc8339f52012-03-31 07:47:16 +0000961 CONFIG_CMD_MFSL * Microblaze FSL support
Vincent Stehlé4d98b5c2013-06-20 18:14:22 +0200962 CONFIG_CMD_XIMG Load part of Multi Image
Przemyslaw Marczak89c82302014-04-02 10:20:05 +0200963 CONFIG_CMD_UUID * Generate random UUID or GUID string
wdenkc6097192002-11-03 00:24:07 +0000964
965 EXAMPLE: If you want all functions except of network
966 support you can write:
967
Jon Loeliger602ad3b2007-06-11 19:03:39 -0500968 #include "config_cmd_all.h"
969 #undef CONFIG_CMD_NET
wdenkc6097192002-11-03 00:24:07 +0000970
Gerald Van Baren213bf8c2007-03-31 12:23:51 -0400971 Other Commands:
972 fdt (flattened device tree) command: CONFIG_OF_LIBFDT
wdenkc6097192002-11-03 00:24:07 +0000973
974 Note: Don't enable the "icache" and "dcache" commands
Jon Loeliger602ad3b2007-06-11 19:03:39 -0500975 (configuration option CONFIG_CMD_CACHE) unless you know
wdenk43d96162003-03-06 00:02:04 +0000976 what you (and your U-Boot users) are doing. Data
977 cache cannot be enabled on systems like the 8xx or
978 8260 (where accesses to the IMMR region must be
979 uncached), and it cannot be disabled on all other
980 systems where we (mis-) use the data cache to hold an
981 initial stack and some data.
wdenkc6097192002-11-03 00:24:07 +0000982
983
984 XXX - this list needs to get updated!
985
Simon Glass302a6482016-03-13 19:07:28 -0600986- Removal of commands
987 If no commands are needed to boot, you can disable
988 CONFIG_CMDLINE to remove them. In this case, the command line
989 will not be available, and when U-Boot wants to execute the
990 boot command (on start-up) it will call board_run_command()
991 instead. This can reduce image size significantly for very
992 simple boot procedures.
993
Wolfgang Denka5ecbe62013-03-23 23:50:31 +0000994- Regular expression support:
995 CONFIG_REGEX
Wolfgang Denk93e14592013-10-04 17:43:24 +0200996 If this variable is defined, U-Boot is linked against
997 the SLRE (Super Light Regular Expression) library,
998 which adds regex support to some commands, as for
999 example "env grep" and "setexpr".
Wolfgang Denka5ecbe62013-03-23 23:50:31 +00001000
Simon Glass45ba8072011-10-15 05:48:20 +00001001- Device tree:
1002 CONFIG_OF_CONTROL
1003 If this variable is defined, U-Boot will use a device tree
1004 to configure its devices, instead of relying on statically
1005 compiled #defines in the board file. This option is
1006 experimental and only available on a few boards. The device
1007 tree is available in the global data as gd->fdt_blob.
1008
Simon Glass2c0f79e2011-10-24 19:15:31 +00001009 U-Boot needs to get its device tree from somewhere. This can
1010 be done using one of the two options below:
Simon Glassbbb0b122011-10-15 05:48:21 +00001011
1012 CONFIG_OF_EMBED
1013 If this variable is defined, U-Boot will embed a device tree
1014 binary in its image. This device tree file should be in the
1015 board directory and called <soc>-<board>.dts. The binary file
1016 is then picked up in board_init_f() and made available through
1017 the global data structure as gd->blob.
Simon Glass45ba8072011-10-15 05:48:20 +00001018
Simon Glass2c0f79e2011-10-24 19:15:31 +00001019 CONFIG_OF_SEPARATE
1020 If this variable is defined, U-Boot will build a device tree
1021 binary. It will be called u-boot.dtb. Architecture-specific
1022 code will locate it at run-time. Generally this works by:
1023
1024 cat u-boot.bin u-boot.dtb >image.bin
1025
1026 and in fact, U-Boot does this for you, creating a file called
1027 u-boot-dtb.bin which is useful in the common case. You can
1028 still use the individual files if you need something more
1029 exotic.
1030
wdenkc6097192002-11-03 00:24:07 +00001031- Watchdog:
1032 CONFIG_WATCHDOG
1033 If this variable is defined, it enables watchdog
Detlev Zundel6abe6fb2011-04-27 05:25:59 +00001034 support for the SoC. There must be support in the SoC
1035 specific code for a watchdog. For the 8xx and 8260
1036 CPUs, the SIU Watchdog feature is enabled in the SYPCR
1037 register. When supported for a specific SoC is
1038 available, then no further board specific code should
1039 be needed to use it.
1040
1041 CONFIG_HW_WATCHDOG
1042 When using a watchdog circuitry external to the used
1043 SoC, then define this variable and provide board
1044 specific code for the "hw_watchdog_reset" function.
wdenkc6097192002-11-03 00:24:07 +00001045
Heiko Schocher7bae0d62015-01-21 08:38:22 +01001046 CONFIG_AT91_HW_WDT_TIMEOUT
1047 specify the timeout in seconds. default 2 seconds.
1048
stroesec1551ea2003-04-04 15:53:41 +00001049- U-Boot Version:
1050 CONFIG_VERSION_VARIABLE
1051 If this variable is defined, an environment variable
1052 named "ver" is created by U-Boot showing the U-Boot
1053 version as printed by the "version" command.
Benoît Thébaudeaua1ea8e52012-08-13 15:01:14 +02001054 Any change to this variable will be reverted at the
1055 next reset.
stroesec1551ea2003-04-04 15:53:41 +00001056
wdenkc6097192002-11-03 00:24:07 +00001057- Real-Time Clock:
1058
Jon Loeliger602ad3b2007-06-11 19:03:39 -05001059 When CONFIG_CMD_DATE is selected, the type of the RTC
wdenkc6097192002-11-03 00:24:07 +00001060 has to be selected, too. Define exactly one of the
1061 following options:
1062
1063 CONFIG_RTC_MPC8xx - use internal RTC of MPC8xx
1064 CONFIG_RTC_PCF8563 - use Philips PCF8563 RTC
Fabio Estevam4e8b7542011-10-24 06:44:15 +00001065 CONFIG_RTC_MC13XXX - use MC13783 or MC13892 RTC
wdenkc6097192002-11-03 00:24:07 +00001066 CONFIG_RTC_MC146818 - use MC146818 RTC
wdenk1cb8e982003-03-06 21:55:29 +00001067 CONFIG_RTC_DS1307 - use Maxim, Inc. DS1307 RTC
wdenkc6097192002-11-03 00:24:07 +00001068 CONFIG_RTC_DS1337 - use Maxim, Inc. DS1337 RTC
wdenk7f70e852003-05-20 14:25:27 +00001069 CONFIG_RTC_DS1338 - use Maxim, Inc. DS1338 RTC
Markus Niebel412921d2014-07-21 11:06:16 +02001070 CONFIG_RTC_DS1339 - use Maxim, Inc. DS1339 RTC
wdenk3bac3512003-03-12 10:41:04 +00001071 CONFIG_RTC_DS164x - use Dallas DS164x RTC
Tor Krill9536dfc2008-03-15 15:40:26 +01001072 CONFIG_RTC_ISL1208 - use Intersil ISL1208 RTC
wdenk4c0d4c32004-06-09 17:34:58 +00001073 CONFIG_RTC_MAX6900 - use Maxim, Inc. MAX6900 RTC
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +02001074 CONFIG_SYS_RTC_DS1337_NOOSC - Turn off the OSC output for DS1337
Heiko Schocher71d19f32011-03-28 09:24:22 +02001075 CONFIG_SYS_RV3029_TCR - enable trickle charger on
1076 RV3029 RTC.
wdenkc6097192002-11-03 00:24:07 +00001077
wdenkb37c7e52003-06-30 16:24:52 +00001078 Note that if the RTC uses I2C, then the I2C interface
1079 must also be configured. See I2C Support, below.
1080
Peter Tysere92739d2008-12-17 16:36:21 -06001081- GPIO Support:
1082 CONFIG_PCA953X - use NXP's PCA953X series I2C GPIO
Peter Tysere92739d2008-12-17 16:36:21 -06001083
Chris Packham5dec49c2010-12-19 10:12:13 +00001084 The CONFIG_SYS_I2C_PCA953X_WIDTH option specifies a list of
1085 chip-ngpio pairs that tell the PCA953X driver the number of
1086 pins supported by a particular chip.
1087
Peter Tysere92739d2008-12-17 16:36:21 -06001088 Note that if the GPIO device uses I2C, then the I2C interface
1089 must also be configured. See I2C Support, below.
1090
Simon Glassaa532332014-06-11 23:29:41 -06001091- I/O tracing:
1092 When CONFIG_IO_TRACE is selected, U-Boot intercepts all I/O
1093 accesses and can checksum them or write a list of them out
1094 to memory. See the 'iotrace' command for details. This is
1095 useful for testing device drivers since it can confirm that
1096 the driver behaves the same way before and after a code
1097 change. Currently this is supported on sandbox and arm. To
1098 add support for your architecture, add '#include <iotrace.h>'
1099 to the bottom of arch/<arch>/include/asm/io.h and test.
1100
1101 Example output from the 'iotrace stats' command is below.
1102 Note that if the trace buffer is exhausted, the checksum will
1103 still continue to operate.
1104
1105 iotrace is enabled
1106 Start: 10000000 (buffer start address)
1107 Size: 00010000 (buffer size)
1108 Offset: 00000120 (current buffer offset)
1109 Output: 10000120 (start + offset)
1110 Count: 00000018 (number of trace records)
1111 CRC32: 9526fb66 (CRC32 of all trace records)
1112
wdenkc6097192002-11-03 00:24:07 +00001113- Timestamp Support:
1114
wdenk43d96162003-03-06 00:02:04 +00001115 When CONFIG_TIMESTAMP is selected, the timestamp
1116 (date and time) of an image is printed by image
1117 commands like bootm or iminfo. This option is
Jon Loeliger602ad3b2007-06-11 19:03:39 -05001118 automatically enabled when you select CONFIG_CMD_DATE .
wdenkc6097192002-11-03 00:24:07 +00001119
Karl O. Pinc923c46f2012-08-16 06:20:15 +00001120- Partition Labels (disklabels) Supported:
1121 Zero or more of the following:
1122 CONFIG_MAC_PARTITION Apple's MacOS partition table.
1123 CONFIG_DOS_PARTITION MS Dos partition table, traditional on the
1124 Intel architecture, USB sticks, etc.
1125 CONFIG_ISO_PARTITION ISO partition table, used on CDROM etc.
1126 CONFIG_EFI_PARTITION GPT partition table, common when EFI is the
1127 bootloader. Note 2TB partition limit; see
1128 disk/part_efi.c
1129 CONFIG_MTD_PARTITIONS Memory Technology Device partition table.
wdenkc6097192002-11-03 00:24:07 +00001130
Wolfgang Denk218ca722008-03-26 10:40:12 +01001131 If IDE or SCSI support is enabled (CONFIG_CMD_IDE or
Simon Glassc649e3c2016-05-01 11:36:02 -06001132 CONFIG_SCSI) you must configure support for at
Karl O. Pinc923c46f2012-08-16 06:20:15 +00001133 least one non-MTD partition type as well.
wdenkc6097192002-11-03 00:24:07 +00001134
1135- IDE Reset method:
wdenk4d13cba2004-03-14 14:09:05 +00001136 CONFIG_IDE_RESET_ROUTINE - this is defined in several
1137 board configurations files but used nowhere!
wdenkc6097192002-11-03 00:24:07 +00001138
wdenk4d13cba2004-03-14 14:09:05 +00001139 CONFIG_IDE_RESET - is this is defined, IDE Reset will
1140 be performed by calling the function
1141 ide_set_reset(int reset)
1142 which has to be defined in a board specific file
wdenkc6097192002-11-03 00:24:07 +00001143
1144- ATAPI Support:
1145 CONFIG_ATAPI
1146
1147 Set this to enable ATAPI support.
1148
wdenkc40b2952004-03-13 23:29:43 +00001149- LBA48 Support
1150 CONFIG_LBA48
1151
1152 Set this to enable support for disks larger than 137GB
Heiko Schocher4b142fe2009-12-03 11:21:21 +01001153 Also look at CONFIG_SYS_64BIT_LBA.
wdenkc40b2952004-03-13 23:29:43 +00001154 Whithout these , LBA48 support uses 32bit variables and will 'only'
1155 support disks up to 2.1TB.
1156
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +02001157 CONFIG_SYS_64BIT_LBA:
wdenkc40b2952004-03-13 23:29:43 +00001158 When enabled, makes the IDE subsystem use 64bit sector addresses.
1159 Default is 32bit.
1160
wdenkc6097192002-11-03 00:24:07 +00001161- SCSI Support:
1162 At the moment only there is only support for the
1163 SYM53C8XX SCSI controller; define
1164 CONFIG_SCSI_SYM53C8XX to enable it.
1165
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +02001166 CONFIG_SYS_SCSI_MAX_LUN [8], CONFIG_SYS_SCSI_MAX_SCSI_ID [7] and
1167 CONFIG_SYS_SCSI_MAX_DEVICE [CONFIG_SYS_SCSI_MAX_SCSI_ID *
1168 CONFIG_SYS_SCSI_MAX_LUN] can be adjusted to define the
wdenkc6097192002-11-03 00:24:07 +00001169 maximum numbers of LUNs, SCSI ID's and target
1170 devices.
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +02001171 CONFIG_SYS_SCSI_SYM53C8XX_CCF to fix clock timing (80Mhz)
wdenkc6097192002-11-03 00:24:07 +00001172
Wolfgang Denk93e14592013-10-04 17:43:24 +02001173 The environment variable 'scsidevs' is set to the number of
1174 SCSI devices found during the last scan.
Stefan Reinauer447c0312012-10-29 05:23:48 +00001175
wdenkc6097192002-11-03 00:24:07 +00001176- NETWORK Support (PCI):
wdenk682011f2003-06-03 23:54:09 +00001177 CONFIG_E1000
Kyle Moffettce5207e2011-10-18 11:05:29 +00001178 Support for Intel 8254x/8257x gigabit chips.
1179
1180 CONFIG_E1000_SPI
1181 Utility code for direct access to the SPI bus on Intel 8257x.
1182 This does not do anything useful unless you set at least one
1183 of CONFIG_CMD_E1000 or CONFIG_E1000_SPI_GENERIC.
1184
1185 CONFIG_E1000_SPI_GENERIC
1186 Allow generic access to the SPI bus on the Intel 8257x, for
1187 example with the "sspi" command.
1188
1189 CONFIG_CMD_E1000
1190 Management command for E1000 devices. When used on devices
1191 with SPI support you can reprogram the EEPROM from U-Boot.
stroese53cf9432003-06-05 15:39:44 +00001192
wdenkc6097192002-11-03 00:24:07 +00001193 CONFIG_EEPRO100
1194 Support for Intel 82557/82559/82559ER chips.
Marcel Ziswiler11ccc332008-07-09 08:17:15 +02001195 Optional CONFIG_EEPRO100_SROM_WRITE enables EEPROM
wdenkc6097192002-11-03 00:24:07 +00001196 write routine for first time initialisation.
1197
1198 CONFIG_TULIP
1199 Support for Digital 2114x chips.
1200 Optional CONFIG_TULIP_SELECT_MEDIA for board specific
1201 modem chip initialisation (KS8761/QS6611).
1202
1203 CONFIG_NATSEMI
1204 Support for National dp83815 chips.
1205
1206 CONFIG_NS8382X
1207 Support for National dp8382[01] gigabit chips.
1208
wdenk45219c42003-05-12 21:50:16 +00001209- NETWORK Support (other):
1210
Jens Scharsigc041e9d2010-01-23 12:03:45 +01001211 CONFIG_DRIVER_AT91EMAC
1212 Support for AT91RM9200 EMAC.
1213
1214 CONFIG_RMII
1215 Define this to use reduced MII inteface
1216
1217 CONFIG_DRIVER_AT91EMAC_QUIET
1218 If this defined, the driver is quiet.
1219 The driver doen't show link status messages.
1220
Rob Herringefdd7312011-12-15 11:15:49 +00001221 CONFIG_CALXEDA_XGMAC
1222 Support for the Calxeda XGMAC device
1223
Ashok3bb46d22012-10-15 06:20:47 +00001224 CONFIG_LAN91C96
wdenk45219c42003-05-12 21:50:16 +00001225 Support for SMSC's LAN91C96 chips.
1226
wdenk45219c42003-05-12 21:50:16 +00001227 CONFIG_LAN91C96_USE_32_BIT
1228 Define this to enable 32 bit addressing
1229
Ashok3bb46d22012-10-15 06:20:47 +00001230 CONFIG_SMC91111
wdenkf39748a2004-06-09 13:37:52 +00001231 Support for SMSC's LAN91C111 chip
1232
1233 CONFIG_SMC91111_BASE
1234 Define this to hold the physical address
1235 of the device (I/O space)
1236
1237 CONFIG_SMC_USE_32_BIT
1238 Define this if data bus is 32 bits
1239
1240 CONFIG_SMC_USE_IOFUNCS
1241 Define this to use i/o functions instead of macros
1242 (some hardware wont work with macros)
1243
Heiko Schocherdc02bad2011-11-15 10:00:04 -05001244 CONFIG_DRIVER_TI_EMAC
1245 Support for davinci emac
1246
1247 CONFIG_SYS_DAVINCI_EMAC_PHY_COUNT
1248 Define this if you have more then 3 PHYs.
1249
Macpaul Linb3dbf4a52010-12-21 16:59:46 +08001250 CONFIG_FTGMAC100
1251 Support for Faraday's FTGMAC100 Gigabit SoC Ethernet
1252
1253 CONFIG_FTGMAC100_EGIGA
1254 Define this to use GE link update with gigabit PHY.
1255 Define this if FTGMAC100 is connected to gigabit PHY.
1256 If your system has 10/100 PHY only, it might not occur
1257 wrong behavior. Because PHY usually return timeout or
1258 useless data when polling gigabit status and gigabit
1259 control registers. This behavior won't affect the
1260 correctnessof 10/100 link speed update.
1261
Mike Rapoportc2fff332009-11-11 10:03:03 +02001262 CONFIG_SMC911X
Jens Gehrlein557b3772008-05-05 14:06:11 +02001263 Support for SMSC's LAN911x and LAN921x chips
1264
Mike Rapoportc2fff332009-11-11 10:03:03 +02001265 CONFIG_SMC911X_BASE
Jens Gehrlein557b3772008-05-05 14:06:11 +02001266 Define this to hold the physical address
1267 of the device (I/O space)
1268
Mike Rapoportc2fff332009-11-11 10:03:03 +02001269 CONFIG_SMC911X_32_BIT
Jens Gehrlein557b3772008-05-05 14:06:11 +02001270 Define this if data bus is 32 bits
1271
Mike Rapoportc2fff332009-11-11 10:03:03 +02001272 CONFIG_SMC911X_16_BIT
Jens Gehrlein557b3772008-05-05 14:06:11 +02001273 Define this if data bus is 16 bits. If your processor
1274 automatically converts one 32 bit word to two 16 bit
Mike Rapoportc2fff332009-11-11 10:03:03 +02001275 words you may also try CONFIG_SMC911X_32_BIT.
Jens Gehrlein557b3772008-05-05 14:06:11 +02001276
Yoshihiro Shimoda3d0075f2011-01-27 10:06:03 +09001277 CONFIG_SH_ETHER
1278 Support for Renesas on-chip Ethernet controller
1279
1280 CONFIG_SH_ETHER_USE_PORT
1281 Define the number of ports to be used
1282
1283 CONFIG_SH_ETHER_PHY_ADDR
1284 Define the ETH PHY's address
1285
Yoshihiro Shimoda68260aa2011-01-27 10:06:08 +09001286 CONFIG_SH_ETHER_CACHE_WRITEBACK
1287 If this option is set, the driver enables cache flush.
1288
Heiko Schocherb2f97cf2014-07-18 06:07:19 +02001289- PWM Support:
1290 CONFIG_PWM_IMX
Robert P. J. Day5052e812016-09-13 08:35:18 -04001291 Support for PWM module on the imx6.
Heiko Schocherb2f97cf2014-07-18 06:07:19 +02001292
Vadim Bendebury5e124722011-10-17 08:36:14 +00001293- TPM Support:
Che-liang Chiou90899cc2013-04-12 11:04:34 +00001294 CONFIG_TPM
1295 Support TPM devices.
1296
Christophe Ricard0766ad22015-10-06 22:54:41 +02001297 CONFIG_TPM_TIS_INFINEON
1298 Support for Infineon i2c bus TPM devices. Only one device
Tom Wai-Hong Tam1b393db2013-04-12 11:04:37 +00001299 per system is supported at this time.
1300
Tom Wai-Hong Tam1b393db2013-04-12 11:04:37 +00001301 CONFIG_TPM_TIS_I2C_BURST_LIMITATION
1302 Define the burst count bytes upper limit
1303
Christophe Ricard3aa74082016-01-21 23:27:13 +01001304 CONFIG_TPM_ST33ZP24
1305 Support for STMicroelectronics TPM devices. Requires DM_TPM support.
1306
1307 CONFIG_TPM_ST33ZP24_I2C
1308 Support for STMicroelectronics ST33ZP24 I2C devices.
1309 Requires TPM_ST33ZP24 and I2C.
1310
Christophe Ricardb75fdc12016-01-21 23:27:14 +01001311 CONFIG_TPM_ST33ZP24_SPI
1312 Support for STMicroelectronics ST33ZP24 SPI devices.
1313 Requires TPM_ST33ZP24 and SPI.
1314
Dirk Eibachc01939c2013-06-26 15:55:15 +02001315 CONFIG_TPM_ATMEL_TWI
1316 Support for Atmel TWI TPM device. Requires I2C support.
1317
Che-liang Chiou90899cc2013-04-12 11:04:34 +00001318 CONFIG_TPM_TIS_LPC
Vadim Bendebury5e124722011-10-17 08:36:14 +00001319 Support for generic parallel port TPM devices. Only one device
1320 per system is supported at this time.
1321
1322 CONFIG_TPM_TIS_BASE_ADDRESS
1323 Base address where the generic TPM device is mapped
1324 to. Contemporary x86 systems usually map it at
1325 0xfed40000.
1326
Reinhard Pfaube6c1522013-06-26 15:55:13 +02001327 CONFIG_CMD_TPM
1328 Add tpm monitor functions.
1329 Requires CONFIG_TPM. If CONFIG_TPM_AUTH_SESSIONS is set, also
1330 provides monitor access to authorized functions.
1331
1332 CONFIG_TPM
1333 Define this to enable the TPM support library which provides
1334 functional interfaces to some TPM commands.
1335 Requires support for a TPM device.
1336
1337 CONFIG_TPM_AUTH_SESSIONS
1338 Define this to enable authorized functions in the TPM library.
1339 Requires CONFIG_TPM and CONFIG_SHA1.
1340
wdenkc6097192002-11-03 00:24:07 +00001341- USB Support:
1342 At the moment only the UHCI host controller is
wdenk4d13cba2004-03-14 14:09:05 +00001343 supported (PIP405, MIP405, MPC5200); define
wdenkc6097192002-11-03 00:24:07 +00001344 CONFIG_USB_UHCI to enable it.
1345 define CONFIG_USB_KEYBOARD to enable the USB Keyboard
wdenk30d56fa2004-10-09 22:44:59 +00001346 and define CONFIG_USB_STORAGE to enable the USB
wdenkc6097192002-11-03 00:24:07 +00001347 storage devices.
1348 Note:
1349 Supported are USB Keyboards and USB Floppy drives
1350 (TEAC FD-05PUB).
wdenk4d13cba2004-03-14 14:09:05 +00001351 MPC5200 USB requires additional defines:
1352 CONFIG_USB_CLOCK
1353 for 528 MHz Clock: 0x0001bbbb
Eric Millbrandt307ecb62009-08-13 08:32:37 -05001354 CONFIG_PSC3_USB
1355 for USB on PSC3
wdenk4d13cba2004-03-14 14:09:05 +00001356 CONFIG_USB_CONFIG
1357 for differential drivers: 0x00001000
1358 for single ended drivers: 0x00005000
Eric Millbrandt307ecb62009-08-13 08:32:37 -05001359 for differential drivers on PSC3: 0x00000100
1360 for single ended drivers on PSC3: 0x00004100
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +02001361 CONFIG_SYS_USB_EVENT_POLL
Zhang Weifdcfaa12007-06-06 10:08:13 +02001362 May be defined to allow interrupt polling
1363 instead of using asynchronous interrupts
wdenk4d13cba2004-03-14 14:09:05 +00001364
Simon Glass9ab4ce22012-02-27 10:52:47 +00001365 CONFIG_USB_EHCI_TXFIFO_THRESH enables setting of the
1366 txfilltuning field in the EHCI controller on reset.
1367
Oleksandr Tymoshenko6e9e0622014-02-01 21:51:25 -07001368 CONFIG_USB_DWC2_REG_ADDR the physical CPU address of the DWC2
1369 HW module registers.
1370
Wolfgang Denk16c8d5e2006-06-14 17:45:53 +02001371- USB Device:
1372 Define the below if you wish to use the USB console.
1373 Once firmware is rebuilt from a serial console issue the
1374 command "setenv stdin usbtty; setenv stdout usbtty" and
Marcel Ziswiler11ccc332008-07-09 08:17:15 +02001375 attach your USB cable. The Unix command "dmesg" should print
Wolfgang Denk16c8d5e2006-06-14 17:45:53 +02001376 it has found a new device. The environment variable usbtty
1377 can be set to gserial or cdc_acm to enable your device to
Wolfgang Denk386eda02006-06-14 18:14:56 +02001378 appear to a USB host as a Linux gserial device or a
Wolfgang Denk16c8d5e2006-06-14 17:45:53 +02001379 Common Device Class Abstract Control Model serial device.
1380 If you select usbtty = gserial you should be able to enumerate
1381 a Linux host by
1382 # modprobe usbserial vendor=0xVendorID product=0xProductID
1383 else if using cdc_acm, simply setting the environment
1384 variable usbtty to be cdc_acm should suffice. The following
1385 might be defined in YourBoardName.h
Wolfgang Denk386eda02006-06-14 18:14:56 +02001386
Wolfgang Denk16c8d5e2006-06-14 17:45:53 +02001387 CONFIG_USB_DEVICE
1388 Define this to build a UDC device
wdenkc6097192002-11-03 00:24:07 +00001389
Wolfgang Denk16c8d5e2006-06-14 17:45:53 +02001390 CONFIG_USB_TTY
1391 Define this to have a tty type of device available to
1392 talk to the UDC device
Wolfgang Denk386eda02006-06-14 18:14:56 +02001393
Vipin KUMARf9da0f82012-03-26 15:38:06 +05301394 CONFIG_USBD_HS
1395 Define this to enable the high speed support for usb
1396 device and usbtty. If this feature is enabled, a routine
1397 int is_usbd_high_speed(void)
1398 also needs to be defined by the driver to dynamically poll
1399 whether the enumeration has succeded at high speed or full
1400 speed.
1401
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +02001402 CONFIG_SYS_CONSOLE_IS_IN_ENV
Wolfgang Denk16c8d5e2006-06-14 17:45:53 +02001403 Define this if you want stdin, stdout &/or stderr to
1404 be set to usbtty.
1405
1406 mpc8xx:
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +02001407 CONFIG_SYS_USB_EXTC_CLK 0xBLAH
Wolfgang Denk16c8d5e2006-06-14 17:45:53 +02001408 Derive USB clock from external clock "blah"
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +02001409 - CONFIG_SYS_USB_EXTC_CLK 0x02
Wolfgang Denk386eda02006-06-14 18:14:56 +02001410
Wolfgang Denk386eda02006-06-14 18:14:56 +02001411 If you have a USB-IF assigned VendorID then you may wish to
Wolfgang Denk16c8d5e2006-06-14 17:45:53 +02001412 define your own vendor specific values either in BoardName.h
Wolfgang Denk386eda02006-06-14 18:14:56 +02001413 or directly in usbd_vendor_info.h. If you don't define
Wolfgang Denk16c8d5e2006-06-14 17:45:53 +02001414 CONFIG_USBD_MANUFACTURER, CONFIG_USBD_PRODUCT_NAME,
1415 CONFIG_USBD_VENDORID and CONFIG_USBD_PRODUCTID, then U-Boot
1416 should pretend to be a Linux device to it's target host.
1417
1418 CONFIG_USBD_MANUFACTURER
1419 Define this string as the name of your company for
1420 - CONFIG_USBD_MANUFACTURER "my company"
Wolfgang Denk386eda02006-06-14 18:14:56 +02001421
Wolfgang Denk16c8d5e2006-06-14 17:45:53 +02001422 CONFIG_USBD_PRODUCT_NAME
1423 Define this string as the name of your product
1424 - CONFIG_USBD_PRODUCT_NAME "acme usb device"
1425
1426 CONFIG_USBD_VENDORID
1427 Define this as your assigned Vendor ID from the USB
1428 Implementors Forum. This *must* be a genuine Vendor ID
1429 to avoid polluting the USB namespace.
1430 - CONFIG_USBD_VENDORID 0xFFFF
Wolfgang Denk386eda02006-06-14 18:14:56 +02001431
Wolfgang Denk16c8d5e2006-06-14 17:45:53 +02001432 CONFIG_USBD_PRODUCTID
1433 Define this as the unique Product ID
1434 for your device
1435 - CONFIG_USBD_PRODUCTID 0xFFFF
wdenkc6097192002-11-03 00:24:07 +00001436
Igor Grinbergd70a5602011-12-12 12:08:35 +02001437- ULPI Layer Support:
1438 The ULPI (UTMI Low Pin (count) Interface) PHYs are supported via
1439 the generic ULPI layer. The generic layer accesses the ULPI PHY
1440 via the platform viewport, so you need both the genric layer and
1441 the viewport enabled. Currently only Chipidea/ARC based
1442 viewport is supported.
1443 To enable the ULPI layer support, define CONFIG_USB_ULPI and
1444 CONFIG_USB_ULPI_VIEWPORT in your board configuration file.
Lucas Stach6d365ea2012-10-01 00:44:35 +02001445 If your ULPI phy needs a different reference clock than the
1446 standard 24 MHz then you have to define CONFIG_ULPI_REF_CLK to
1447 the appropriate value in Hz.
wdenkc6097192002-11-03 00:24:07 +00001448
1449- MMC Support:
1450 The MMC controller on the Intel PXA is supported. To
1451 enable this define CONFIG_MMC. The MMC can be
1452 accessed from the boot prompt by mapping the device
1453 to physical memory similar to flash. Command line is
Jon Loeliger602ad3b2007-06-11 19:03:39 -05001454 enabled with CONFIG_CMD_MMC. The MMC driver also works with
1455 the FAT fs. This is enabled with CONFIG_CMD_FAT.
wdenkc6097192002-11-03 00:24:07 +00001456
Yoshihiro Shimodaafb35662011-07-04 22:21:22 +00001457 CONFIG_SH_MMCIF
1458 Support for Renesas on-chip MMCIF controller
1459
1460 CONFIG_SH_MMCIF_ADDR
1461 Define the base address of MMCIF registers
1462
1463 CONFIG_SH_MMCIF_CLK
1464 Define the clock frequency for MMCIF
1465
Pierre Aubert1fd93c62014-04-24 10:30:08 +02001466 CONFIG_SUPPORT_EMMC_BOOT
1467 Enable some additional features of the eMMC boot partitions.
1468
1469 CONFIG_SUPPORT_EMMC_RPMB
1470 Enable the commands for reading, writing and programming the
1471 key for the Replay Protection Memory Block partition in eMMC.
1472
Tom Rinib3ba6e92013-03-14 05:32:47 +00001473- USB Device Firmware Update (DFU) class support:
Paul Kocialkowski01acd6a2015-06-12 19:56:58 +02001474 CONFIG_USB_FUNCTION_DFU
Tom Rinib3ba6e92013-03-14 05:32:47 +00001475 This enables the USB portion of the DFU USB class
1476
1477 CONFIG_CMD_DFU
1478 This enables the command "dfu" which is used to have
1479 U-Boot create a DFU class device via USB. This command
1480 requires that the "dfu_alt_info" environment variable be
1481 set and define the alt settings to expose to the host.
1482
1483 CONFIG_DFU_MMC
1484 This enables support for exposing (e)MMC devices via DFU.
1485
Pantelis Antoniouc6631762013-03-14 05:32:52 +00001486 CONFIG_DFU_NAND
1487 This enables support for exposing NAND devices via DFU.
1488
Afzal Mohammeda9479f02013-09-18 01:15:24 +05301489 CONFIG_DFU_RAM
1490 This enables support for exposing RAM via DFU.
1491 Note: DFU spec refer to non-volatile memory usage, but
1492 allow usages beyond the scope of spec - here RAM usage,
1493 one that would help mostly the developer.
1494
Heiko Schochere7e75c72013-06-12 06:05:51 +02001495 CONFIG_SYS_DFU_DATA_BUF_SIZE
1496 Dfu transfer uses a buffer before writing data to the
1497 raw storage device. Make the size (in bytes) of this buffer
1498 configurable. The size of this buffer is also configurable
1499 through the "dfu_bufsiz" environment variable.
1500
Pantelis Antoniouea2453d2013-03-14 05:32:48 +00001501 CONFIG_SYS_DFU_MAX_FILE_SIZE
1502 When updating files rather than the raw storage device,
1503 we use a static buffer to copy the file into and then write
1504 the buffer once we've been given the whole file. Define
1505 this to the maximum filesize (in bytes) for the buffer.
1506 Default is 4 MiB if undefined.
1507
Heiko Schocher001a8312014-03-18 08:09:56 +01001508 DFU_DEFAULT_POLL_TIMEOUT
1509 Poll timeout [ms], is the timeout a device can send to the
1510 host. The host must wait for this timeout before sending
1511 a subsequent DFU_GET_STATUS request to the device.
1512
1513 DFU_MANIFEST_POLL_TIMEOUT
1514 Poll timeout [ms], which the device sends to the host when
1515 entering dfuMANIFEST state. Host waits this timeout, before
1516 sending again an USB request to the device.
1517
Sebastian Siewior3aab70a2014-05-05 15:08:10 -05001518- USB Device Android Fastboot support:
Paul Kocialkowski17da3c02015-06-12 19:56:59 +02001519 CONFIG_USB_FUNCTION_FASTBOOT
1520 This enables the USB part of the fastboot gadget
1521
Sebastian Siewior3aab70a2014-05-05 15:08:10 -05001522 CONFIG_CMD_FASTBOOT
1523 This enables the command "fastboot" which enables the Android
1524 fastboot mode for the platform's USB device. Fastboot is a USB
1525 protocol for downloading images, flashing and device control
1526 used on Android devices.
1527 See doc/README.android-fastboot for more information.
1528
1529 CONFIG_ANDROID_BOOT_IMAGE
1530 This enables support for booting images which use the Android
1531 image format header.
1532
Paul Kocialkowskia588d992015-07-20 12:38:22 +02001533 CONFIG_FASTBOOT_BUF_ADDR
Sebastian Siewior3aab70a2014-05-05 15:08:10 -05001534 The fastboot protocol requires a large memory buffer for
1535 downloads. Define this to the starting RAM address to use for
1536 downloaded images.
1537
Paul Kocialkowskia588d992015-07-20 12:38:22 +02001538 CONFIG_FASTBOOT_BUF_SIZE
Sebastian Siewior3aab70a2014-05-05 15:08:10 -05001539 The fastboot protocol requires a large memory buffer for
1540 downloads. This buffer should be as large as possible for a
1541 platform. Define this to the size available RAM for fastboot.
1542
Steve Raed1b5ed02014-08-26 11:47:28 -07001543 CONFIG_FASTBOOT_FLASH
1544 The fastboot protocol includes a "flash" command for writing
1545 the downloaded image to a non-volatile storage device. Define
1546 this to enable the "fastboot flash" command.
1547
1548 CONFIG_FASTBOOT_FLASH_MMC_DEV
1549 The fastboot "flash" command requires additional information
1550 regarding the non-volatile storage device. Define this to
1551 the eMMC device that fastboot should use to store the image.
1552
Steve Rae0ff7e582014-12-12 15:51:54 -08001553 CONFIG_FASTBOOT_GPT_NAME
1554 The fastboot "flash" command supports writing the downloaded
1555 image to the Protective MBR and the Primary GUID Partition
1556 Table. (Additionally, this downloaded image is post-processed
1557 to generate and write the Backup GUID Partition Table.)
1558 This occurs when the specified "partition name" on the
1559 "fastboot flash" command line matches this value.
Petr Kulhavy6f6c8632016-09-09 10:27:18 +02001560 The default is "gpt" if undefined.
Steve Rae0ff7e582014-12-12 15:51:54 -08001561
Petr Kulhavyb6dd69a2016-09-09 10:27:16 +02001562 CONFIG_FASTBOOT_MBR_NAME
1563 The fastboot "flash" command supports writing the downloaded
1564 image to DOS MBR.
1565 This occurs when the "partition name" specified on the
1566 "fastboot flash" command line matches this value.
1567 If not defined the default value "mbr" is used.
1568
wdenk6705d812004-08-02 23:22:59 +00001569- Journaling Flash filesystem support:
Simon Glassb2482df2016-10-02 18:00:59 -06001570 CONFIG_JFFS2_NAND
wdenk6705d812004-08-02 23:22:59 +00001571 Define these for a default partition on a NAND device
1572
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +02001573 CONFIG_SYS_JFFS2_FIRST_SECTOR,
1574 CONFIG_SYS_JFFS2_FIRST_BANK, CONFIG_SYS_JFFS2_NUM_BANKS
wdenk6705d812004-08-02 23:22:59 +00001575 Define these for a default partition on a NOR device
1576
Donggeun Kimc30a15e2011-10-24 21:15:28 +00001577- FAT(File Allocation Table) filesystem write function support:
1578 CONFIG_FAT_WRITE
Donggeun Kim656f4c62012-03-22 04:38:56 +00001579
1580 Define this to enable support for saving memory data as a
1581 file in FAT formatted partition.
1582
1583 This will also enable the command "fatwrite" enabling the
1584 user to write files to FAT.
Donggeun Kimc30a15e2011-10-24 21:15:28 +00001585
Alexander von Gernleredb42db2016-10-07 19:44:14 +02001586- CBFS (Coreboot Filesystem) support:
Gabe Black84cd9322012-10-12 14:26:11 +00001587 CONFIG_CMD_CBFS
1588
1589 Define this to enable support for reading from a Coreboot
1590 filesystem. Available commands are cbfsinit, cbfsinfo, cbfsls
1591 and cbfsload.
1592
Siva Durga Prasad Paladugu4f0d1a22014-05-26 19:18:37 +05301593- FAT(File Allocation Table) filesystem cluster size:
1594 CONFIG_FS_FAT_MAX_CLUSTSIZE
1595
1596 Define the max cluster size for fat operations else
1597 a default value of 65536 will be defined.
1598
wdenkc6097192002-11-03 00:24:07 +00001599- Keyboard Support:
Simon Glass39f615e2015-11-11 10:05:47 -07001600 See Kconfig help for available keyboard drivers.
1601
1602 CONFIG_KEYBOARD
1603
1604 Define this to enable a custom keyboard support.
1605 This simply calls drv_keyboard_init() which must be
1606 defined in your board-specific files. This option is deprecated
1607 and is only used by novena. For new boards, use driver model
1608 instead.
wdenkc6097192002-11-03 00:24:07 +00001609
1610- Video support:
Timur Tabi7d3053f2011-02-15 17:09:19 -06001611 CONFIG_FSL_DIU_FB
Wolfgang Denk04e5ae72011-09-11 21:24:09 +02001612 Enable the Freescale DIU video driver. Reference boards for
Timur Tabi7d3053f2011-02-15 17:09:19 -06001613 SOCs that have a DIU should define this macro to enable DIU
1614 support, and should also define these other macros:
1615
1616 CONFIG_SYS_DIU_ADDR
1617 CONFIG_VIDEO
1618 CONFIG_CMD_BMP
1619 CONFIG_CFB_CONSOLE
1620 CONFIG_VIDEO_SW_CURSOR
1621 CONFIG_VGA_AS_SINGLE_DEVICE
1622 CONFIG_VIDEO_LOGO
1623 CONFIG_VIDEO_BMP_LOGO
1624
Timur Tabiba8e76b2011-04-11 14:18:22 -05001625 The DIU driver will look for the 'video-mode' environment
1626 variable, and if defined, enable the DIU as a console during
Fabio Estevam8eca9432016-04-02 11:53:18 -03001627 boot. See the documentation file doc/README.video for a
Timur Tabiba8e76b2011-04-11 14:18:22 -05001628 description of this variable.
Timur Tabi7d3053f2011-02-15 17:09:19 -06001629
wdenkc6097192002-11-03 00:24:07 +00001630- LCD Support: CONFIG_LCD
1631
1632 Define this to enable LCD support (for output to LCD
1633 display); also select one of the supported displays
1634 by defining one of these:
1635
Stelian Pop39cf4802008-05-09 21:57:18 +02001636 CONFIG_ATMEL_LCD:
1637
1638 HITACHI TX09D70VM1CCA, 3.5", 240x320.
1639
wdenkfd3103b2003-11-25 16:55:19 +00001640 CONFIG_NEC_NL6448AC33:
wdenkc6097192002-11-03 00:24:07 +00001641
wdenkfd3103b2003-11-25 16:55:19 +00001642 NEC NL6448AC33-18. Active, color, single scan.
wdenkc6097192002-11-03 00:24:07 +00001643
wdenkfd3103b2003-11-25 16:55:19 +00001644 CONFIG_NEC_NL6448BC20
wdenkc6097192002-11-03 00:24:07 +00001645
wdenkfd3103b2003-11-25 16:55:19 +00001646 NEC NL6448BC20-08. 6.5", 640x480.
1647 Active, color, single scan.
1648
1649 CONFIG_NEC_NL6448BC33_54
1650
1651 NEC NL6448BC33-54. 10.4", 640x480.
wdenkc6097192002-11-03 00:24:07 +00001652 Active, color, single scan.
1653
1654 CONFIG_SHARP_16x9
1655
1656 Sharp 320x240. Active, color, single scan.
1657 It isn't 16x9, and I am not sure what it is.
1658
1659 CONFIG_SHARP_LQ64D341
1660
1661 Sharp LQ64D341 display, 640x480.
1662 Active, color, single scan.
1663
1664 CONFIG_HLD1045
1665
1666 HLD1045 display, 640x480.
1667 Active, color, single scan.
1668
1669 CONFIG_OPTREX_BW
1670
1671 Optrex CBL50840-2 NF-FW 99 22 M5
1672 or
1673 Hitachi LMG6912RPFC-00T
1674 or
1675 Hitachi SP14Q002
1676
1677 320x240. Black & white.
1678
1679 Normally display is black on white background; define
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +02001680 CONFIG_SYS_WHITE_ON_BLACK to get it inverted.
wdenkc6097192002-11-03 00:24:07 +00001681
Simon Glass676d3192012-10-17 13:24:54 +00001682 CONFIG_LCD_ALIGNMENT
1683
Jeremiah Mahlerb445bbb2015-01-04 18:56:50 -08001684 Normally the LCD is page-aligned (typically 4KB). If this is
Simon Glass676d3192012-10-17 13:24:54 +00001685 defined then the LCD will be aligned to this value instead.
1686 For ARM it is sometimes useful to use MMU_SECTION_SIZE
1687 here, since it is cheaper to change data cache settings on
1688 a per-section basis.
1689
1690
Hannes Petermaier604c7d42015-03-27 08:01:38 +01001691 CONFIG_LCD_ROTATION
1692
1693 Sometimes, for example if the display is mounted in portrait
1694 mode or even if it's mounted landscape but rotated by 180degree,
1695 we need to rotate our content of the display relative to the
1696 framebuffer, so that user can read the messages which are
1697 printed out.
1698 Once CONFIG_LCD_ROTATION is defined, the lcd_console will be
1699 initialized with a given rotation from "vl_rot" out of
1700 "vidinfo_t" which is provided by the board specific code.
1701 The value for vl_rot is coded as following (matching to
1702 fbcon=rotate:<n> linux-kernel commandline):
1703 0 = no rotation respectively 0 degree
1704 1 = 90 degree rotation
1705 2 = 180 degree rotation
1706 3 = 270 degree rotation
1707
1708 If CONFIG_LCD_ROTATION is not defined, the console will be
1709 initialized with 0degree rotation.
1710
Tom Wai-Hong Tam45d7f522012-09-28 15:11:16 +00001711 CONFIG_LCD_BMP_RLE8
1712
1713 Support drawing of RLE8-compressed bitmaps on the LCD.
1714
Tom Wai-Hong Tam735987c2012-12-05 14:46:40 +00001715 CONFIG_I2C_EDID
1716
1717 Enables an 'i2c edid' command which can read EDID
1718 information over I2C from an attached LCD display.
1719
wdenk7152b1d2003-09-05 23:19:14 +00001720- Splash Screen Support: CONFIG_SPLASH_SCREEN
wdenkd791b1d2003-04-20 14:04:18 +00001721
wdenk8bde7f72003-06-27 21:31:46 +00001722 If this option is set, the environment is checked for
1723 a variable "splashimage". If found, the usual display
1724 of logo, copyright and system information on the LCD
wdenke94d2cd2004-06-30 22:59:18 +00001725 is suppressed and the BMP image at the address
wdenk8bde7f72003-06-27 21:31:46 +00001726 specified in "splashimage" is loaded instead. The
1727 console is redirected to the "nulldev", too. This
1728 allows for a "silent" boot where a splash screen is
1729 loaded very quickly after power-on.
wdenkd791b1d2003-04-20 14:04:18 +00001730
Nikita Kiryanovc0880482013-02-24 21:28:43 +00001731 CONFIG_SPLASHIMAGE_GUARD
1732
1733 If this option is set, then U-Boot will prevent the environment
1734 variable "splashimage" from being set to a problematic address
Fabio Estevamab5645f2016-03-23 12:46:12 -03001735 (see doc/README.displaying-bmps).
Nikita Kiryanovc0880482013-02-24 21:28:43 +00001736 This option is useful for targets where, due to alignment
1737 restrictions, an improperly aligned BMP image will cause a data
1738 abort. If you think you will not have problems with unaligned
1739 accesses (for example because your toolchain prevents them)
1740 there is no need to set this option.
1741
Matthias Weisser1ca298c2009-07-09 16:07:30 +02001742 CONFIG_SPLASH_SCREEN_ALIGN
1743
1744 If this option is set the splash image can be freely positioned
1745 on the screen. Environment variable "splashpos" specifies the
1746 position as "x,y". If a positive number is given it is used as
1747 number of pixel from left/top. If a negative number is given it
1748 is used as number of pixel from right/bottom. You can also
1749 specify 'm' for centering the image.
1750
1751 Example:
1752 setenv splashpos m,m
1753 => image at center of screen
1754
1755 setenv splashpos 30,20
1756 => image at x = 30 and y = 20
1757
1758 setenv splashpos -10,m
1759 => vertically centered image
1760 at x = dspWidth - bmpWidth - 9
1761
Stefan Roese98f4a3d2005-09-22 09:04:17 +02001762- Gzip compressed BMP image support: CONFIG_VIDEO_BMP_GZIP
1763
1764 If this option is set, additionally to standard BMP
1765 images, gzipped BMP images can be displayed via the
1766 splashscreen support or the bmp command.
1767
Anatolij Gustschind5011762010-03-15 14:50:25 +01001768- Run length encoded BMP image (RLE8) support: CONFIG_VIDEO_BMP_RLE8
1769
1770 If this option is set, 8-bit RLE compressed BMP images
1771 can be displayed via the splashscreen support or the
1772 bmp command.
1773
Jeremiah Mahlerb445bbb2015-01-04 18:56:50 -08001774- Do compressing for memory range:
Lei Wenf2b96df2012-09-28 04:26:47 +00001775 CONFIG_CMD_ZIP
1776
1777 If this option is set, it would use zlib deflate method
1778 to compress the specified memory at its best effort.
1779
wdenkc29fdfc2003-08-29 20:57:53 +00001780- Compression support:
Kees Cook8ef70472013-08-16 07:59:12 -07001781 CONFIG_GZIP
1782
1783 Enabled by default to support gzip compressed images.
1784
wdenkc29fdfc2003-08-29 20:57:53 +00001785 CONFIG_BZIP2
1786
1787 If this option is set, support for bzip2 compressed
1788 images is included. If not, only uncompressed and gzip
1789 compressed images are supported.
1790
wdenk42d1f032003-10-15 23:53:47 +00001791 NOTE: the bzip2 algorithm requires a lot of RAM, so
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +02001792 the malloc area (as defined by CONFIG_SYS_MALLOC_LEN) should
wdenk42d1f032003-10-15 23:53:47 +00001793 be at least 4MB.
wdenkd791b1d2003-04-20 14:04:18 +00001794
Luigi 'Comio' Mantellinifc9c1722008-09-08 02:46:13 +02001795 CONFIG_LZMA
1796
1797 If this option is set, support for lzma compressed
1798 images is included.
1799
1800 Note: The LZMA algorithm adds between 2 and 4KB of code and it
1801 requires an amount of dynamic memory that is given by the
1802 formula:
1803
1804 (1846 + 768 << (lc + lp)) * sizeof(uint16)
1805
1806 Where lc and lp stand for, respectively, Literal context bits
1807 and Literal pos bits.
1808
1809 This value is upper-bounded by 14MB in the worst case. Anyway,
1810 for a ~4MB large kernel image, we have lc=3 and lp=0 for a
1811 total amount of (1846 + 768 << (3 + 0)) * 2 = ~41KB... that is
1812 a very small buffer.
1813
1814 Use the lzmainfo tool to determinate the lc and lp values and
1815 then calculate the amount of needed dynamic memory (ensuring
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +02001816 the appropriate CONFIG_SYS_MALLOC_LEN value).
Luigi 'Comio' Mantellinifc9c1722008-09-08 02:46:13 +02001817
Kees Cook8ef70472013-08-16 07:59:12 -07001818 CONFIG_LZO
1819
1820 If this option is set, support for LZO compressed images
1821 is included.
1822
wdenk17ea1172004-06-06 21:51:03 +00001823- MII/PHY support:
1824 CONFIG_PHY_ADDR
1825
1826 The address of PHY on MII bus.
1827
1828 CONFIG_PHY_CLOCK_FREQ (ppc4xx)
1829
1830 The clock frequency of the MII bus
1831
1832 CONFIG_PHY_GIGE
1833
1834 If this option is set, support for speed/duplex
Marcel Ziswiler11ccc332008-07-09 08:17:15 +02001835 detection of gigabit PHY is included.
wdenk17ea1172004-06-06 21:51:03 +00001836
1837 CONFIG_PHY_RESET_DELAY
1838
1839 Some PHY like Intel LXT971A need extra delay after
1840 reset before any MII register access is possible.
1841 For such PHY, set this option to the usec delay
1842 required. (minimum 300usec for LXT971A)
1843
1844 CONFIG_PHY_CMD_DELAY (ppc4xx)
1845
1846 Some PHY like Intel LXT971A need extra delay after
1847 command issued before MII status register can be read
1848
wdenkc6097192002-11-03 00:24:07 +00001849- IP address:
1850 CONFIG_IPADDR
1851
1852 Define a default value for the IP address to use for
Marcel Ziswiler11ccc332008-07-09 08:17:15 +02001853 the default Ethernet interface, in case this is not
wdenkc6097192002-11-03 00:24:07 +00001854 determined through e.g. bootp.
Wolfgang Denk1ebcd652011-10-26 10:21:22 +00001855 (Environment variable "ipaddr")
wdenkc6097192002-11-03 00:24:07 +00001856
1857- Server IP address:
1858 CONFIG_SERVERIP
1859
Marcel Ziswiler11ccc332008-07-09 08:17:15 +02001860 Defines a default value for the IP address of a TFTP
wdenkc6097192002-11-03 00:24:07 +00001861 server to contact when using the "tftboot" command.
Wolfgang Denk1ebcd652011-10-26 10:21:22 +00001862 (Environment variable "serverip")
wdenkc6097192002-11-03 00:24:07 +00001863
Robin Getz97cfe862009-07-21 12:15:28 -04001864 CONFIG_KEEP_SERVERADDR
1865
1866 Keeps the server's MAC address, in the env 'serveraddr'
1867 for passing to bootargs (like Linux's netconsole option)
1868
Wolfgang Denk1ebcd652011-10-26 10:21:22 +00001869- Gateway IP address:
1870 CONFIG_GATEWAYIP
1871
1872 Defines a default value for the IP address of the
1873 default router where packets to other networks are
1874 sent to.
1875 (Environment variable "gatewayip")
1876
1877- Subnet mask:
1878 CONFIG_NETMASK
1879
1880 Defines a default value for the subnet mask (or
1881 routing prefix) which is used to determine if an IP
1882 address belongs to the local subnet or needs to be
1883 forwarded through a router.
1884 (Environment variable "netmask")
1885
David Updegraff53a5c422007-06-11 10:41:07 -05001886- Multicast TFTP Mode:
1887 CONFIG_MCAST_TFTP
1888
1889 Defines whether you want to support multicast TFTP as per
1890 rfc-2090; for example to work with atftp. Lets lots of targets
Marcel Ziswiler11ccc332008-07-09 08:17:15 +02001891 tftp down the same boot image concurrently. Note: the Ethernet
David Updegraff53a5c422007-06-11 10:41:07 -05001892 driver in use must provide a function: mcast() to join/leave a
1893 multicast group.
1894
wdenkc6097192002-11-03 00:24:07 +00001895- BOOTP Recovery Mode:
1896 CONFIG_BOOTP_RANDOM_DELAY
1897
1898 If you have many targets in a network that try to
1899 boot using BOOTP, you may want to avoid that all
1900 systems send out BOOTP requests at precisely the same
1901 moment (which would happen for instance at recovery
1902 from a power failure, when all systems will try to
1903 boot, thus flooding the BOOTP server. Defining
1904 CONFIG_BOOTP_RANDOM_DELAY causes a random delay to be
1905 inserted before sending out BOOTP requests. The
Wolfgang Denk6c33c782007-08-06 23:21:05 +02001906 following delays are inserted then:
wdenkc6097192002-11-03 00:24:07 +00001907
1908 1st BOOTP request: delay 0 ... 1 sec
1909 2nd BOOTP request: delay 0 ... 2 sec
1910 3rd BOOTP request: delay 0 ... 4 sec
1911 4th and following
1912 BOOTP requests: delay 0 ... 8 sec
1913
Thierry Reding92ac8ac2014-08-19 10:21:24 +02001914 CONFIG_BOOTP_ID_CACHE_SIZE
1915
1916 BOOTP packets are uniquely identified using a 32-bit ID. The
1917 server will copy the ID from client requests to responses and
1918 U-Boot will use this to determine if it is the destination of
1919 an incoming response. Some servers will check that addresses
1920 aren't in use before handing them out (usually using an ARP
1921 ping) and therefore take up to a few hundred milliseconds to
1922 respond. Network congestion may also influence the time it
1923 takes for a response to make it back to the client. If that
1924 time is too long, U-Boot will retransmit requests. In order
1925 to allow earlier responses to still be accepted after these
1926 retransmissions, U-Boot's BOOTP client keeps a small cache of
1927 IDs. The CONFIG_BOOTP_ID_CACHE_SIZE controls the size of this
1928 cache. The default is to keep IDs for up to four outstanding
1929 requests. Increasing this will allow U-Boot to accept offers
1930 from a BOOTP client in networks with unusually high latency.
1931
stroesefe389a82003-08-28 14:17:32 +00001932- DHCP Advanced Options:
Jon Loeliger1fe80d72007-07-09 22:08:34 -05001933 You can fine tune the DHCP functionality by defining
1934 CONFIG_BOOTP_* symbols:
stroesefe389a82003-08-28 14:17:32 +00001935
Jon Loeliger1fe80d72007-07-09 22:08:34 -05001936 CONFIG_BOOTP_SUBNETMASK
1937 CONFIG_BOOTP_GATEWAY
1938 CONFIG_BOOTP_HOSTNAME
1939 CONFIG_BOOTP_NISDOMAIN
1940 CONFIG_BOOTP_BOOTPATH
1941 CONFIG_BOOTP_BOOTFILESIZE
1942 CONFIG_BOOTP_DNS
1943 CONFIG_BOOTP_DNS2
1944 CONFIG_BOOTP_SEND_HOSTNAME
1945 CONFIG_BOOTP_NTPSERVER
1946 CONFIG_BOOTP_TIMEOFFSET
1947 CONFIG_BOOTP_VENDOREX
Joe Hershberger2c00e092012-05-23 07:59:19 +00001948 CONFIG_BOOTP_MAY_FAIL
stroesefe389a82003-08-28 14:17:32 +00001949
Wilson Callan5d110f02007-07-28 10:56:13 -04001950 CONFIG_BOOTP_SERVERIP - TFTP server will be the serverip
1951 environment variable, not the BOOTP server.
stroesefe389a82003-08-28 14:17:32 +00001952
Joe Hershberger2c00e092012-05-23 07:59:19 +00001953 CONFIG_BOOTP_MAY_FAIL - If the DHCP server is not found
1954 after the configured retry count, the call will fail
1955 instead of starting over. This can be used to fail over
1956 to Link-local IP address configuration if the DHCP server
1957 is not available.
1958
stroesefe389a82003-08-28 14:17:32 +00001959 CONFIG_BOOTP_DNS2 - If a DHCP client requests the DNS
1960 serverip from a DHCP server, it is possible that more
1961 than one DNS serverip is offered to the client.
1962 If CONFIG_BOOTP_DNS2 is enabled, the secondary DNS
1963 serverip will be stored in the additional environment
1964 variable "dnsip2". The first DNS serverip is always
1965 stored in the variable "dnsip", when CONFIG_BOOTP_DNS
Jon Loeliger1fe80d72007-07-09 22:08:34 -05001966 is defined.
stroesefe389a82003-08-28 14:17:32 +00001967
1968 CONFIG_BOOTP_SEND_HOSTNAME - Some DHCP servers are capable
1969 to do a dynamic update of a DNS server. To do this, they
1970 need the hostname of the DHCP requester.
Wilson Callan5d110f02007-07-28 10:56:13 -04001971 If CONFIG_BOOTP_SEND_HOSTNAME is defined, the content
Jon Loeliger1fe80d72007-07-09 22:08:34 -05001972 of the "hostname" environment variable is passed as
1973 option 12 to the DHCP server.
stroesefe389a82003-08-28 14:17:32 +00001974
Aras Vaichasd9a2f412008-03-26 09:43:57 +11001975 CONFIG_BOOTP_DHCP_REQUEST_DELAY
1976
1977 A 32bit value in microseconds for a delay between
1978 receiving a "DHCP Offer" and sending the "DHCP Request".
1979 This fixes a problem with certain DHCP servers that don't
1980 respond 100% of the time to a "DHCP request". E.g. On an
1981 AT91RM9200 processor running at 180MHz, this delay needed
1982 to be *at least* 15,000 usec before a Windows Server 2003
1983 DHCP server would reply 100% of the time. I recommend at
1984 least 50,000 usec to be safe. The alternative is to hope
1985 that one of the retries will be successful but note that
1986 the DHCP timeout and retry process takes a longer than
1987 this delay.
1988
Joe Hershbergerd22c3382012-05-23 08:00:12 +00001989 - Link-local IP address negotiation:
1990 Negotiate with other link-local clients on the local network
1991 for an address that doesn't require explicit configuration.
1992 This is especially useful if a DHCP server cannot be guaranteed
1993 to exist in all environments that the device must operate.
1994
1995 See doc/README.link-local for more information.
1996
wdenka3d991b2004-04-15 21:48:45 +00001997 - CDP Options:
wdenk6e592382004-04-18 17:39:38 +00001998 CONFIG_CDP_DEVICE_ID
wdenka3d991b2004-04-15 21:48:45 +00001999
2000 The device id used in CDP trigger frames.
2001
2002 CONFIG_CDP_DEVICE_ID_PREFIX
2003
2004 A two character string which is prefixed to the MAC address
2005 of the device.
2006
2007 CONFIG_CDP_PORT_ID
2008
2009 A printf format string which contains the ascii name of
2010 the port. Normally is set to "eth%d" which sets
Marcel Ziswiler11ccc332008-07-09 08:17:15 +02002011 eth0 for the first Ethernet, eth1 for the second etc.
wdenka3d991b2004-04-15 21:48:45 +00002012
2013 CONFIG_CDP_CAPABILITIES
2014
2015 A 32bit integer which indicates the device capabilities;
2016 0x00000010 for a normal host which does not forwards.
2017
2018 CONFIG_CDP_VERSION
2019
2020 An ascii string containing the version of the software.
2021
2022 CONFIG_CDP_PLATFORM
2023
2024 An ascii string containing the name of the platform.
2025
2026 CONFIG_CDP_TRIGGER
2027
2028 A 32bit integer sent on the trigger.
2029
2030 CONFIG_CDP_POWER_CONSUMPTION
2031
2032 A 16bit integer containing the power consumption of the
2033 device in .1 of milliwatts.
2034
2035 CONFIG_CDP_APPLIANCE_VLAN_TYPE
2036
2037 A byte containing the id of the VLAN.
2038
Uri Mashiach79267ed2017-01-19 10:51:05 +02002039- Status LED: CONFIG_LED_STATUS
wdenkc6097192002-11-03 00:24:07 +00002040
2041 Several configurations allow to display the current
2042 status using a LED. For instance, the LED will blink
2043 fast while running U-Boot code, stop blinking as
2044 soon as a reply to a BOOTP request was received, and
2045 start blinking slow once the Linux kernel is running
2046 (supported by a status LED driver in the Linux
Uri Mashiach79267ed2017-01-19 10:51:05 +02002047 kernel). Defining CONFIG_LED_STATUS enables this
wdenkc6097192002-11-03 00:24:07 +00002048 feature in U-Boot.
2049
Igor Grinberg1df7bbb2013-11-08 01:03:50 +02002050 Additional options:
2051
Uri Mashiach79267ed2017-01-19 10:51:05 +02002052 CONFIG_LED_STATUS_GPIO
Igor Grinberg1df7bbb2013-11-08 01:03:50 +02002053 The status LED can be connected to a GPIO pin.
2054 In such cases, the gpio_led driver can be used as a
Uri Mashiach79267ed2017-01-19 10:51:05 +02002055 status LED backend implementation. Define CONFIG_LED_STATUS_GPIO
Igor Grinberg1df7bbb2013-11-08 01:03:50 +02002056 to include the gpio_led driver in the U-Boot binary.
2057
Igor Grinberg9dfdcdf2013-11-08 01:03:52 +02002058 CONFIG_GPIO_LED_INVERTED_TABLE
2059 Some GPIO connected LEDs may have inverted polarity in which
2060 case the GPIO high value corresponds to LED off state and
2061 GPIO low value corresponds to LED on state.
2062 In such cases CONFIG_GPIO_LED_INVERTED_TABLE may be defined
2063 with a list of GPIO LEDs that have inverted polarity.
2064
wdenkc6097192002-11-03 00:24:07 +00002065- CAN Support: CONFIG_CAN_DRIVER
2066
2067 Defining CONFIG_CAN_DRIVER enables CAN driver support
2068 on those systems that support this (optional)
2069 feature, like the TQM8xxL modules.
2070
Heiko Schocher3f4978c2012-01-16 21:12:24 +00002071- I2C Support: CONFIG_SYS_I2C
wdenkc6097192002-11-03 00:24:07 +00002072
Heiko Schocher3f4978c2012-01-16 21:12:24 +00002073 This enable the NEW i2c subsystem, and will allow you to use
2074 i2c commands at the u-boot command line (as long as you set
2075 CONFIG_CMD_I2C in CONFIG_COMMANDS) and communicate with i2c
2076 based realtime clock chips or other i2c devices. See
2077 common/cmd_i2c.c for a description of the command line
2078 interface.
2079
2080 ported i2c driver to the new framework:
Heiko Schocherea818db2013-01-29 08:53:15 +01002081 - drivers/i2c/soft_i2c.c:
2082 - activate first bus with CONFIG_SYS_I2C_SOFT define
2083 CONFIG_SYS_I2C_SOFT_SPEED and CONFIG_SYS_I2C_SOFT_SLAVE
2084 for defining speed and slave address
2085 - activate second bus with I2C_SOFT_DECLARATIONS2 define
2086 CONFIG_SYS_I2C_SOFT_SPEED_2 and CONFIG_SYS_I2C_SOFT_SLAVE_2
2087 for defining speed and slave address
2088 - activate third bus with I2C_SOFT_DECLARATIONS3 define
2089 CONFIG_SYS_I2C_SOFT_SPEED_3 and CONFIG_SYS_I2C_SOFT_SLAVE_3
2090 for defining speed and slave address
2091 - activate fourth bus with I2C_SOFT_DECLARATIONS4 define
2092 CONFIG_SYS_I2C_SOFT_SPEED_4 and CONFIG_SYS_I2C_SOFT_SLAVE_4
2093 for defining speed and slave address
Heiko Schocher3f4978c2012-01-16 21:12:24 +00002094
Heiko Schocher00f792e2012-10-24 13:48:22 +02002095 - drivers/i2c/fsl_i2c.c:
2096 - activate i2c driver with CONFIG_SYS_I2C_FSL
2097 define CONFIG_SYS_FSL_I2C_OFFSET for setting the register
2098 offset CONFIG_SYS_FSL_I2C_SPEED for the i2c speed and
2099 CONFIG_SYS_FSL_I2C_SLAVE for the slave addr of the first
2100 bus.
Wolfgang Denk93e14592013-10-04 17:43:24 +02002101 - If your board supports a second fsl i2c bus, define
Heiko Schocher00f792e2012-10-24 13:48:22 +02002102 CONFIG_SYS_FSL_I2C2_OFFSET for the register offset
2103 CONFIG_SYS_FSL_I2C2_SPEED for the speed and
2104 CONFIG_SYS_FSL_I2C2_SLAVE for the slave address of the
2105 second bus.
2106
Simon Glass1f2ba722012-10-30 07:28:53 +00002107 - drivers/i2c/tegra_i2c.c:
Nobuhiro Iwamatsu10cee512013-10-11 16:23:53 +09002108 - activate this driver with CONFIG_SYS_I2C_TEGRA
2109 - This driver adds 4 i2c buses with a fix speed from
2110 100000 and the slave addr 0!
Simon Glass1f2ba722012-10-30 07:28:53 +00002111
Dirk Eibach880540d2013-04-25 02:40:01 +00002112 - drivers/i2c/ppc4xx_i2c.c
2113 - activate this driver with CONFIG_SYS_I2C_PPC4XX
2114 - CONFIG_SYS_I2C_PPC4XX_CH0 activate hardware channel 0
2115 - CONFIG_SYS_I2C_PPC4XX_CH1 activate hardware channel 1
2116
tremfac96402013-09-21 18:13:35 +02002117 - drivers/i2c/i2c_mxc.c
2118 - activate this driver with CONFIG_SYS_I2C_MXC
Albert ARIBAUD \\(3ADEV\\)03544c62015-09-21 22:43:38 +02002119 - enable bus 1 with CONFIG_SYS_I2C_MXC_I2C1
2120 - enable bus 2 with CONFIG_SYS_I2C_MXC_I2C2
2121 - enable bus 3 with CONFIG_SYS_I2C_MXC_I2C3
2122 - enable bus 4 with CONFIG_SYS_I2C_MXC_I2C4
tremfac96402013-09-21 18:13:35 +02002123 - define speed for bus 1 with CONFIG_SYS_MXC_I2C1_SPEED
2124 - define slave for bus 1 with CONFIG_SYS_MXC_I2C1_SLAVE
2125 - define speed for bus 2 with CONFIG_SYS_MXC_I2C2_SPEED
2126 - define slave for bus 2 with CONFIG_SYS_MXC_I2C2_SLAVE
2127 - define speed for bus 3 with CONFIG_SYS_MXC_I2C3_SPEED
2128 - define slave for bus 3 with CONFIG_SYS_MXC_I2C3_SLAVE
Albert ARIBAUD \\(3ADEV\\)03544c62015-09-21 22:43:38 +02002129 - define speed for bus 4 with CONFIG_SYS_MXC_I2C4_SPEED
2130 - define slave for bus 4 with CONFIG_SYS_MXC_I2C4_SLAVE
Jeremiah Mahlerb445bbb2015-01-04 18:56:50 -08002131 If those defines are not set, default value is 100000
tremfac96402013-09-21 18:13:35 +02002132 for speed, and 0 for slave.
2133
Nobuhiro Iwamatsu1086bfa2013-09-27 16:58:30 +09002134 - drivers/i2c/rcar_i2c.c:
2135 - activate this driver with CONFIG_SYS_I2C_RCAR
2136 - This driver adds 4 i2c buses
2137
2138 - CONFIG_SYS_RCAR_I2C0_BASE for setting the register channel 0
2139 - CONFIG_SYS_RCAR_I2C0_SPEED for for the speed channel 0
2140 - CONFIG_SYS_RCAR_I2C1_BASE for setting the register channel 1
2141 - CONFIG_SYS_RCAR_I2C1_SPEED for for the speed channel 1
2142 - CONFIG_SYS_RCAR_I2C2_BASE for setting the register channel 2
2143 - CONFIG_SYS_RCAR_I2C2_SPEED for for the speed channel 2
2144 - CONFIG_SYS_RCAR_I2C3_BASE for setting the register channel 3
2145 - CONFIG_SYS_RCAR_I2C3_SPEED for for the speed channel 3
2146 - CONFIF_SYS_RCAR_I2C_NUM_CONTROLLERS for number of i2c buses
2147
Nobuhiro Iwamatsu2035d772013-10-29 13:33:51 +09002148 - drivers/i2c/sh_i2c.c:
2149 - activate this driver with CONFIG_SYS_I2C_SH
2150 - This driver adds from 2 to 5 i2c buses
2151
2152 - CONFIG_SYS_I2C_SH_BASE0 for setting the register channel 0
2153 - CONFIG_SYS_I2C_SH_SPEED0 for for the speed channel 0
2154 - CONFIG_SYS_I2C_SH_BASE1 for setting the register channel 1
2155 - CONFIG_SYS_I2C_SH_SPEED1 for for the speed channel 1
2156 - CONFIG_SYS_I2C_SH_BASE2 for setting the register channel 2
2157 - CONFIG_SYS_I2C_SH_SPEED2 for for the speed channel 2
2158 - CONFIG_SYS_I2C_SH_BASE3 for setting the register channel 3
2159 - CONFIG_SYS_I2C_SH_SPEED3 for for the speed channel 3
2160 - CONFIG_SYS_I2C_SH_BASE4 for setting the register channel 4
2161 - CONFIG_SYS_I2C_SH_SPEED4 for for the speed channel 4
Jeremiah Mahlerb445bbb2015-01-04 18:56:50 -08002162 - CONFIG_SYS_I2C_SH_NUM_CONTROLLERS for number of i2c buses
Nobuhiro Iwamatsu2035d772013-10-29 13:33:51 +09002163
Heiko Schocher6789e842013-10-22 11:03:18 +02002164 - drivers/i2c/omap24xx_i2c.c
2165 - activate this driver with CONFIG_SYS_I2C_OMAP24XX
2166 - CONFIG_SYS_OMAP24_I2C_SPEED speed channel 0
2167 - CONFIG_SYS_OMAP24_I2C_SLAVE slave addr channel 0
2168 - CONFIG_SYS_OMAP24_I2C_SPEED1 speed channel 1
2169 - CONFIG_SYS_OMAP24_I2C_SLAVE1 slave addr channel 1
2170 - CONFIG_SYS_OMAP24_I2C_SPEED2 speed channel 2
2171 - CONFIG_SYS_OMAP24_I2C_SLAVE2 slave addr channel 2
2172 - CONFIG_SYS_OMAP24_I2C_SPEED3 speed channel 3
2173 - CONFIG_SYS_OMAP24_I2C_SLAVE3 slave addr channel 3
2174 - CONFIG_SYS_OMAP24_I2C_SPEED4 speed channel 4
2175 - CONFIG_SYS_OMAP24_I2C_SLAVE4 slave addr channel 4
2176
Heiko Schocher0bdffe72013-11-08 07:30:53 +01002177 - drivers/i2c/zynq_i2c.c
2178 - activate this driver with CONFIG_SYS_I2C_ZYNQ
2179 - set CONFIG_SYS_I2C_ZYNQ_SPEED for speed setting
2180 - set CONFIG_SYS_I2C_ZYNQ_SLAVE for slave addr
2181
Naveen Krishna Che717fc62013-12-06 12:12:38 +05302182 - drivers/i2c/s3c24x0_i2c.c:
2183 - activate this driver with CONFIG_SYS_I2C_S3C24X0
2184 - This driver adds i2c buses (11 for Exynos5250, Exynos5420
2185 9 i2c buses for Exynos4 and 1 for S3C24X0 SoCs from Samsung)
2186 with a fix speed from 100000 and the slave addr 0!
2187
Dirk Eibachb46226b2014-07-03 09:28:18 +02002188 - drivers/i2c/ihs_i2c.c
2189 - activate this driver with CONFIG_SYS_I2C_IHS
2190 - CONFIG_SYS_I2C_IHS_CH0 activate hardware channel 0
2191 - CONFIG_SYS_I2C_IHS_SPEED_0 speed channel 0
2192 - CONFIG_SYS_I2C_IHS_SLAVE_0 slave addr channel 0
2193 - CONFIG_SYS_I2C_IHS_CH1 activate hardware channel 1
2194 - CONFIG_SYS_I2C_IHS_SPEED_1 speed channel 1
2195 - CONFIG_SYS_I2C_IHS_SLAVE_1 slave addr channel 1
2196 - CONFIG_SYS_I2C_IHS_CH2 activate hardware channel 2
2197 - CONFIG_SYS_I2C_IHS_SPEED_2 speed channel 2
2198 - CONFIG_SYS_I2C_IHS_SLAVE_2 slave addr channel 2
2199 - CONFIG_SYS_I2C_IHS_CH3 activate hardware channel 3
2200 - CONFIG_SYS_I2C_IHS_SPEED_3 speed channel 3
2201 - CONFIG_SYS_I2C_IHS_SLAVE_3 slave addr channel 3
Dirk Eibach071be892015-10-28 11:46:22 +01002202 - activate dual channel with CONFIG_SYS_I2C_IHS_DUAL
2203 - CONFIG_SYS_I2C_IHS_SPEED_0_1 speed channel 0_1
2204 - CONFIG_SYS_I2C_IHS_SLAVE_0_1 slave addr channel 0_1
2205 - CONFIG_SYS_I2C_IHS_SPEED_1_1 speed channel 1_1
2206 - CONFIG_SYS_I2C_IHS_SLAVE_1_1 slave addr channel 1_1
2207 - CONFIG_SYS_I2C_IHS_SPEED_2_1 speed channel 2_1
2208 - CONFIG_SYS_I2C_IHS_SLAVE_2_1 slave addr channel 2_1
2209 - CONFIG_SYS_I2C_IHS_SPEED_3_1 speed channel 3_1
2210 - CONFIG_SYS_I2C_IHS_SLAVE_3_1 slave addr channel 3_1
Dirk Eibachb46226b2014-07-03 09:28:18 +02002211
Heiko Schocher3f4978c2012-01-16 21:12:24 +00002212 additional defines:
2213
2214 CONFIG_SYS_NUM_I2C_BUSES
Simon Glass945a18e2016-10-02 18:01:05 -06002215 Hold the number of i2c buses you want to use.
Heiko Schocher3f4978c2012-01-16 21:12:24 +00002216
2217 CONFIG_SYS_I2C_DIRECT_BUS
2218 define this, if you don't use i2c muxes on your hardware.
2219 if CONFIG_SYS_I2C_MAX_HOPS is not defined or == 0 you can
2220 omit this define.
2221
2222 CONFIG_SYS_I2C_MAX_HOPS
2223 define how many muxes are maximal consecutively connected
2224 on one i2c bus. If you not use i2c muxes, omit this
2225 define.
2226
2227 CONFIG_SYS_I2C_BUSES
Jeremiah Mahlerb445bbb2015-01-04 18:56:50 -08002228 hold a list of buses you want to use, only used if
Heiko Schocher3f4978c2012-01-16 21:12:24 +00002229 CONFIG_SYS_I2C_DIRECT_BUS is not defined, for example
2230 a board with CONFIG_SYS_I2C_MAX_HOPS = 1 and
2231 CONFIG_SYS_NUM_I2C_BUSES = 9:
2232
2233 CONFIG_SYS_I2C_BUSES {{0, {I2C_NULL_HOP}}, \
2234 {0, {{I2C_MUX_PCA9547, 0x70, 1}}}, \
2235 {0, {{I2C_MUX_PCA9547, 0x70, 2}}}, \
2236 {0, {{I2C_MUX_PCA9547, 0x70, 3}}}, \
2237 {0, {{I2C_MUX_PCA9547, 0x70, 4}}}, \
2238 {0, {{I2C_MUX_PCA9547, 0x70, 5}}}, \
2239 {1, {I2C_NULL_HOP}}, \
2240 {1, {{I2C_MUX_PCA9544, 0x72, 1}}}, \
2241 {1, {{I2C_MUX_PCA9544, 0x72, 2}}}, \
2242 }
2243
2244 which defines
2245 bus 0 on adapter 0 without a mux
Heiko Schocherea818db2013-01-29 08:53:15 +01002246 bus 1 on adapter 0 with a PCA9547 on address 0x70 port 1
2247 bus 2 on adapter 0 with a PCA9547 on address 0x70 port 2
2248 bus 3 on adapter 0 with a PCA9547 on address 0x70 port 3
2249 bus 4 on adapter 0 with a PCA9547 on address 0x70 port 4
2250 bus 5 on adapter 0 with a PCA9547 on address 0x70 port 5
Heiko Schocher3f4978c2012-01-16 21:12:24 +00002251 bus 6 on adapter 1 without a mux
Heiko Schocherea818db2013-01-29 08:53:15 +01002252 bus 7 on adapter 1 with a PCA9544 on address 0x72 port 1
2253 bus 8 on adapter 1 with a PCA9544 on address 0x72 port 2
Heiko Schocher3f4978c2012-01-16 21:12:24 +00002254
2255 If you do not have i2c muxes on your board, omit this define.
2256
Heiko Schocherea818db2013-01-29 08:53:15 +01002257- Legacy I2C Support: CONFIG_HARD_I2C
Heiko Schocher3f4978c2012-01-16 21:12:24 +00002258
2259 NOTE: It is intended to move drivers to CONFIG_SYS_I2C which
2260 provides the following compelling advantages:
2261
2262 - more than one i2c adapter is usable
2263 - approved multibus support
2264 - better i2c mux support
2265
2266 ** Please consider updating your I2C driver now. **
2267
Heiko Schocherea818db2013-01-29 08:53:15 +01002268 These enable legacy I2C serial bus commands. Defining
2269 CONFIG_HARD_I2C will include the appropriate I2C driver
2270 for the selected CPU.
wdenkc6097192002-11-03 00:24:07 +00002271
wdenk945af8d2003-07-16 21:53:01 +00002272 This will allow you to use i2c commands at the u-boot
Jon Loeliger602ad3b2007-06-11 19:03:39 -05002273 command line (as long as you set CONFIG_CMD_I2C in
wdenkb37c7e52003-06-30 16:24:52 +00002274 CONFIG_COMMANDS) and communicate with i2c based realtime
2275 clock chips. See common/cmd_i2c.c for a description of the
wdenk43d96162003-03-06 00:02:04 +00002276 command line interface.
wdenkc6097192002-11-03 00:24:07 +00002277
Ben Warrenbb99ad62006-09-07 16:50:54 -04002278 CONFIG_HARD_I2C selects a hardware I2C controller.
wdenkc6097192002-11-03 00:24:07 +00002279
wdenk945af8d2003-07-16 21:53:01 +00002280 There are several other quantities that must also be
Heiko Schocherea818db2013-01-29 08:53:15 +01002281 defined when you define CONFIG_HARD_I2C.
wdenkc6097192002-11-03 00:24:07 +00002282
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +02002283 In both cases you will need to define CONFIG_SYS_I2C_SPEED
wdenk945af8d2003-07-16 21:53:01 +00002284 to be the frequency (in Hz) at which you wish your i2c bus
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +02002285 to run and CONFIG_SYS_I2C_SLAVE to be the address of this node (ie
Marcel Ziswiler11ccc332008-07-09 08:17:15 +02002286 the CPU's i2c node address).
wdenk945af8d2003-07-16 21:53:01 +00002287
Peter Tyser8d321b82010-04-12 22:28:21 -05002288 Now, the u-boot i2c code for the mpc8xx
Stefan Roesea47a12b2010-04-15 16:07:28 +02002289 (arch/powerpc/cpu/mpc8xx/i2c.c) sets the CPU up as a master node
Peter Tyser8d321b82010-04-12 22:28:21 -05002290 and so its address should therefore be cleared to 0 (See,
2291 eg, MPC823e User's Manual p.16-473). So, set
2292 CONFIG_SYS_I2C_SLAVE to 0.
wdenkc6097192002-11-03 00:24:07 +00002293
Eric Millbrandt5da71ef2009-09-03 08:09:44 -05002294 CONFIG_SYS_I2C_INIT_MPC5XXX
2295
2296 When a board is reset during an i2c bus transfer
2297 chips might think that the current transfer is still
2298 in progress. Reset the slave devices by sending start
2299 commands until the slave device responds.
2300
wdenk945af8d2003-07-16 21:53:01 +00002301 That's all that's required for CONFIG_HARD_I2C.
wdenkb37c7e52003-06-30 16:24:52 +00002302
Heiko Schocherea818db2013-01-29 08:53:15 +01002303 If you use the software i2c interface (CONFIG_SYS_I2C_SOFT)
wdenkb37c7e52003-06-30 16:24:52 +00002304 then the following macros need to be defined (examples are
2305 from include/configs/lwmon.h):
wdenkc6097192002-11-03 00:24:07 +00002306
2307 I2C_INIT
2308
wdenkb37c7e52003-06-30 16:24:52 +00002309 (Optional). Any commands necessary to enable the I2C
wdenk43d96162003-03-06 00:02:04 +00002310 controller or configure ports.
wdenkc6097192002-11-03 00:24:07 +00002311
wdenkba56f622004-02-06 23:19:44 +00002312 eg: #define I2C_INIT (immr->im_cpm.cp_pbdir |= PB_SCL)
wdenkb37c7e52003-06-30 16:24:52 +00002313
wdenkc6097192002-11-03 00:24:07 +00002314 I2C_PORT
2315
wdenk43d96162003-03-06 00:02:04 +00002316 (Only for MPC8260 CPU). The I/O port to use (the code
2317 assumes both bits are on the same port). Valid values
2318 are 0..3 for ports A..D.
wdenkc6097192002-11-03 00:24:07 +00002319
2320 I2C_ACTIVE
2321
2322 The code necessary to make the I2C data line active
2323 (driven). If the data line is open collector, this
2324 define can be null.
2325
wdenkb37c7e52003-06-30 16:24:52 +00002326 eg: #define I2C_ACTIVE (immr->im_cpm.cp_pbdir |= PB_SDA)
2327
wdenkc6097192002-11-03 00:24:07 +00002328 I2C_TRISTATE
2329
2330 The code necessary to make the I2C data line tri-stated
2331 (inactive). If the data line is open collector, this
2332 define can be null.
2333
wdenkb37c7e52003-06-30 16:24:52 +00002334 eg: #define I2C_TRISTATE (immr->im_cpm.cp_pbdir &= ~PB_SDA)
2335
wdenkc6097192002-11-03 00:24:07 +00002336 I2C_READ
2337
York Sun472d5462013-04-01 11:29:11 -07002338 Code that returns true if the I2C data line is high,
2339 false if it is low.
wdenkc6097192002-11-03 00:24:07 +00002340
wdenkb37c7e52003-06-30 16:24:52 +00002341 eg: #define I2C_READ ((immr->im_cpm.cp_pbdat & PB_SDA) != 0)
2342
wdenkc6097192002-11-03 00:24:07 +00002343 I2C_SDA(bit)
2344
York Sun472d5462013-04-01 11:29:11 -07002345 If <bit> is true, sets the I2C data line high. If it
2346 is false, it clears it (low).
wdenkc6097192002-11-03 00:24:07 +00002347
wdenkb37c7e52003-06-30 16:24:52 +00002348 eg: #define I2C_SDA(bit) \
wdenk2535d602003-07-17 23:16:40 +00002349 if(bit) immr->im_cpm.cp_pbdat |= PB_SDA; \
wdenkba56f622004-02-06 23:19:44 +00002350 else immr->im_cpm.cp_pbdat &= ~PB_SDA
wdenkb37c7e52003-06-30 16:24:52 +00002351
wdenkc6097192002-11-03 00:24:07 +00002352 I2C_SCL(bit)
2353
York Sun472d5462013-04-01 11:29:11 -07002354 If <bit> is true, sets the I2C clock line high. If it
2355 is false, it clears it (low).
wdenkc6097192002-11-03 00:24:07 +00002356
wdenkb37c7e52003-06-30 16:24:52 +00002357 eg: #define I2C_SCL(bit) \
wdenk2535d602003-07-17 23:16:40 +00002358 if(bit) immr->im_cpm.cp_pbdat |= PB_SCL; \
wdenkba56f622004-02-06 23:19:44 +00002359 else immr->im_cpm.cp_pbdat &= ~PB_SCL
wdenkb37c7e52003-06-30 16:24:52 +00002360
wdenkc6097192002-11-03 00:24:07 +00002361 I2C_DELAY
2362
2363 This delay is invoked four times per clock cycle so this
2364 controls the rate of data transfer. The data rate thus
wdenkb37c7e52003-06-30 16:24:52 +00002365 is 1 / (I2C_DELAY * 4). Often defined to be something
wdenk945af8d2003-07-16 21:53:01 +00002366 like:
2367
wdenkb37c7e52003-06-30 16:24:52 +00002368 #define I2C_DELAY udelay(2)
wdenkc6097192002-11-03 00:24:07 +00002369
Mike Frysinger793b5722010-07-21 13:38:02 -04002370 CONFIG_SOFT_I2C_GPIO_SCL / CONFIG_SOFT_I2C_GPIO_SDA
2371
2372 If your arch supports the generic GPIO framework (asm/gpio.h),
2373 then you may alternatively define the two GPIOs that are to be
2374 used as SCL / SDA. Any of the previous I2C_xxx macros will
2375 have GPIO-based defaults assigned to them as appropriate.
2376
2377 You should define these to the GPIO value as given directly to
2378 the generic GPIO functions.
2379
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +02002380 CONFIG_SYS_I2C_INIT_BOARD
wdenk47cd00f2003-03-06 13:39:27 +00002381
wdenk8bde7f72003-06-27 21:31:46 +00002382 When a board is reset during an i2c bus transfer
2383 chips might think that the current transfer is still
2384 in progress. On some boards it is possible to access
2385 the i2c SCLK line directly, either by using the
2386 processor pin as a GPIO or by having a second pin
2387 connected to the bus. If this option is defined a
2388 custom i2c_init_board() routine in boards/xxx/board.c
2389 is run early in the boot sequence.
wdenk47cd00f2003-03-06 13:39:27 +00002390
Richard Retanubun26a33502010-04-12 15:08:17 -04002391 CONFIG_SYS_I2C_BOARD_LATE_INIT
2392
2393 An alternative to CONFIG_SYS_I2C_INIT_BOARD. If this option is
2394 defined a custom i2c_board_late_init() routine in
2395 boards/xxx/board.c is run AFTER the operations in i2c_init()
2396 is completed. This callpoint can be used to unreset i2c bus
2397 using CPU i2c controller register accesses for CPUs whose i2c
2398 controller provide such a method. It is called at the end of
2399 i2c_init() to allow i2c_init operations to setup the i2c bus
2400 controller on the CPU (e.g. setting bus speed & slave address).
2401
wdenk17ea1172004-06-06 21:51:03 +00002402 CONFIG_I2CFAST (PPC405GP|PPC405EP only)
2403
2404 This option enables configuration of bi_iic_fast[] flags
2405 in u-boot bd_info structure based on u-boot environment
2406 variable "i2cfast". (see also i2cfast)
2407
Ben Warrenbb99ad62006-09-07 16:50:54 -04002408 CONFIG_I2C_MULTI_BUS
2409
2410 This option allows the use of multiple I2C buses, each of which
Wolfgang Denkc0f40852011-10-26 10:21:21 +00002411 must have a controller. At any point in time, only one bus is
2412 active. To switch to a different bus, use the 'i2c dev' command.
Ben Warrenbb99ad62006-09-07 16:50:54 -04002413 Note that bus numbering is zero-based.
2414
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +02002415 CONFIG_SYS_I2C_NOPROBES
Ben Warrenbb99ad62006-09-07 16:50:54 -04002416
2417 This option specifies a list of I2C devices that will be skipped
Wolfgang Denkc0f40852011-10-26 10:21:21 +00002418 when the 'i2c probe' command is issued. If CONFIG_I2C_MULTI_BUS
Peter Tyser0f89c542009-04-18 22:34:03 -05002419 is set, specify a list of bus-device pairs. Otherwise, specify
2420 a 1D array of device addresses
Ben Warrenbb99ad62006-09-07 16:50:54 -04002421
2422 e.g.
2423 #undef CONFIG_I2C_MULTI_BUS
Wolfgang Denkc0f40852011-10-26 10:21:21 +00002424 #define CONFIG_SYS_I2C_NOPROBES {0x50,0x68}
Ben Warrenbb99ad62006-09-07 16:50:54 -04002425
2426 will skip addresses 0x50 and 0x68 on a board with one I2C bus
2427
Wolfgang Denkc0f40852011-10-26 10:21:21 +00002428 #define CONFIG_I2C_MULTI_BUS
Simon Glass945a18e2016-10-02 18:01:05 -06002429 #define CONFIG_SYS_I2C_NOPROBES {{0,0x50},{0,0x68},{1,0x54}}
Ben Warrenbb99ad62006-09-07 16:50:54 -04002430
2431 will skip addresses 0x50 and 0x68 on bus 0 and address 0x54 on bus 1
2432
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +02002433 CONFIG_SYS_SPD_BUS_NUM
Timur Tabibe5e6182006-11-03 19:15:00 -06002434
2435 If defined, then this indicates the I2C bus number for DDR SPD.
2436 If not defined, then U-Boot assumes that SPD is on I2C bus 0.
2437
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +02002438 CONFIG_SYS_RTC_BUS_NUM
Stefan Roese0dc018e2007-02-20 10:51:26 +01002439
2440 If defined, then this indicates the I2C bus number for the RTC.
2441 If not defined, then U-Boot assumes that RTC is on I2C bus 0.
2442
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +02002443 CONFIG_SYS_DTT_BUS_NUM<