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Mike Frysinger8a9bab02008-10-12 21:41:06 -04001/*
Bin Menga1875592016-02-05 19:30:11 -08002 * U-Boot - Configuration file for CM-BF537E board
Mike Frysinger8a9bab02008-10-12 21:41:06 -04003 */
4
5#ifndef __CONFIG_CM_BF537E_H__
6#define __CONFIG_CM_BF537E_H__
7
Mike Frysingerf348ab82009-04-24 17:22:40 -04008#include <asm/config-pre.h>
Mike Frysinger8a9bab02008-10-12 21:41:06 -04009
10
11/*
12 * Processor Settings
13 */
Mike Frysingerfbcf8e82010-12-23 14:58:37 -050014#define CONFIG_BFIN_CPU bf537-0.2
Mike Frysinger8a9bab02008-10-12 21:41:06 -040015#define CONFIG_BFIN_BOOT_MODE BFIN_BOOT_BYPASS
16
17
18/*
19 * Clock Settings
20 * CCLK = (CLKIN * VCO_MULT) / CCLK_DIV
21 * SCLK = (CLKIN * VCO_MULT) / SCLK_DIV
22 */
23/* CONFIG_CLKIN_HZ is any value in Hz */
24#define CONFIG_CLKIN_HZ 25000000
25/* CLKIN_HALF controls the DF bit in PLL_CTL 0 = CLKIN */
26/* 1 = CLKIN / 2 */
27#define CONFIG_CLKIN_HALF 0
28/* PLL_BYPASS controls the BYPASS bit in PLL_CTL 0 = do not bypass */
29/* 1 = bypass PLL */
30#define CONFIG_PLL_BYPASS 0
31/* VCO_MULT controls the MSEL (multiplier) bits in PLL_CTL */
32/* Values can range from 0-63 (where 0 means 64) */
33#define CONFIG_VCO_MULT 21
34/* CCLK_DIV controls the core clock divider */
35/* Values can be 1, 2, 4, or 8 ONLY */
36#define CONFIG_CCLK_DIV 1
37/* SCLK_DIV controls the system clock divider */
38/* Values can range from 1-15 */
39#define CONFIG_SCLK_DIV 4
40
Harald Krapfenbauerfd04a052009-10-14 08:37:32 -040041/* Decrease core voltage */
42#define CONFIG_VR_CTL_VAL (VLEV_115 | CLKBUFOE | GAIN_20 | FREQ_1000)
43
Mike Frysinger8a9bab02008-10-12 21:41:06 -040044
45/*
46 * Memory Settings
47 */
48#define CONFIG_MEM_ADD_WDTH 9
49#define CONFIG_MEM_SIZE 32
50
51#define CONFIG_EBIU_SDRRC_VAL 0x3f8
52#define CONFIG_EBIU_SDGCTL_VAL 0x9111cd
53
54#define CONFIG_EBIU_AMGCTL_VAL (AMBEN_ALL)
55#define CONFIG_EBIU_AMBCTL0_VAL (B1WAT_7 | B1RAT_11 | B1HT_2 | B1ST_3 | B0WAT_7 | B0RAT_11 | B0HT_2 | B0ST_3)
56#define CONFIG_EBIU_AMBCTL1_VAL (B3WAT_7 | B3RAT_11 | B3HT_2 | B3ST_3 | B2WAT_7 | B2RAT_11 | B2HT_2 | B2ST_3)
57
Sonic Zhang6e6b2212013-12-09 12:45:29 +080058#define CONFIG_SYS_MONITOR_LEN (768 * 1024)
Mike Frysinger8a9bab02008-10-12 21:41:06 -040059#define CONFIG_SYS_MALLOC_LEN (128 * 1024)
60
61
62/*
63 * Network Settings
64 */
65#ifndef __ADSPBF534__
66#define ADI_CMDS_NETWORK 1
67#define CONFIG_BFIN_MAC
Harald Krapfenbauerfff18be2011-05-17 15:25:54 -040068#define CONFIG_SMC911X 1
69#define CONFIG_SMC911X_BASE 0x20308000
70#define CONFIG_SMC911X_16_BIT
Mike Frysinger8a9bab02008-10-12 21:41:06 -040071#define CONFIG_NETCONSOLE 1
Mike Frysinger8a9bab02008-10-12 21:41:06 -040072#endif
73#define CONFIG_HOSTNAME cm-bf537e
Mike Frysinger8a9bab02008-10-12 21:41:06 -040074
75/*
76 * Flash Settings
77 */
78#define CONFIG_FLASH_CFI_DRIVER
79#define CONFIG_CFI_FLASH_USE_WEAK_ACCESSORS
80#define CONFIG_SYS_FLASH_BASE 0x20000000
81#define CONFIG_SYS_FLASH_CFI
82#define CONFIG_SYS_FLASH_PROTECTION
83#define CONFIG_SYS_MAX_FLASH_BANKS 1
Harald Krapfenbauerc2fbcb62009-08-18 04:49:57 -040084#define CONFIG_SYS_MAX_FLASH_SECT 35
Mike Frysinger8a9bab02008-10-12 21:41:06 -040085
86
87/*
Harald Krapfenbauerc94101a2011-05-17 15:39:54 -040088 * SPI Settings
89 */
90#define CONFIG_BFIN_SPI
91#define CONFIG_ENV_SPI_MAX_HZ 30000000
92
93
94/*
Mike Frysinger8a9bab02008-10-12 21:41:06 -040095 * Env Storage Settings
96 */
97#define CONFIG_ENV_IS_IN_FLASH 1
Harald Krapfenbauerba5c1222011-05-17 15:45:36 -040098#define CONFIG_ENV_OFFSET 0x8000
99#define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE + CONFIG_ENV_OFFSET)
100#define CONFIG_ENV_SIZE CONFIG_ENV_SECT_SIZE
101#define CONFIG_ENV_SECT_SIZE 0x8000
Mike Frysinger8a9bab02008-10-12 21:41:06 -0400102#if (CONFIG_BFIN_BOOT_MODE == BFIN_BOOT_BYPASS)
103#define ENV_IS_EMBEDDED
Mike Frysinger8a9bab02008-10-12 21:41:06 -0400104#endif
Mike Frysinger9ff67e52009-06-14 06:29:07 -0400105#ifdef ENV_IS_EMBEDDED
106/* WARNING - the following is hand-optimized to fit within
107 * the sector before the environment sector. If it throws
108 * an error during compilation remove an object here to get
109 * it linked after the configuration sector.
110 */
111# define LDS_BOARD_TEXT \
Masahiro Yamadae2906a52013-11-11 14:36:00 +0900112 arch/blackfin/lib/built-in.o (.text*); \
113 arch/blackfin/cpu/built-in.o (.text*); \
Mike Frysinger9ff67e52009-06-14 06:29:07 -0400114 . = DEFINED(env_offset) ? env_offset : .; \
Mike Frysingerc70e7dd2010-11-19 19:28:56 -0500115 common/env_embedded.o (.text*);
Mike Frysinger9ff67e52009-06-14 06:29:07 -0400116#endif
Mike Frysinger8a9bab02008-10-12 21:41:06 -0400117
118
119/*
120 * I2C Settings
121 */
Scott Jiangc4697032014-11-13 15:30:55 +0800122#define CONFIG_SYS_I2C
Scott Jiangfea9b692014-11-13 15:30:53 +0800123#define CONFIG_SYS_I2C_ADI
Mike Frysinger8a9bab02008-10-12 21:41:06 -0400124
125
126/*
Harald Krapfenbauerc94101a2011-05-17 15:39:54 -0400127 * SPI_MMC Settings
128 */
129#define CONFIG_MMC
130#define CONFIG_GENERIC_MMC
131#define CONFIG_MMC_SPI
132
133
134/*
Mike Frysinger8a9bab02008-10-12 21:41:06 -0400135 * Misc Settings
136 */
137#define CONFIG_BAUDRATE 115200
138#define CONFIG_MISC_INIT_R
139#define CONFIG_RTC_BFIN
140#define CONFIG_UART_CONSOLE 0
Harald Krapfenbauerfd04a052009-10-14 08:37:32 -0400141#define CONFIG_BOOTCOMMAND "run flashboot"
142#define FLASHBOOT_ENV_SETTINGS \
Harald Krapfenbauerba5c1222011-05-17 15:45:36 -0400143 "flashboot=flread 20040000 1000000 3c0000;" \
Harald Krapfenbauerfd04a052009-10-14 08:37:32 -0400144 "bootm 0x1000000\0"
Sonic Zhang6e6b2212013-12-09 12:45:29 +0800145#define CONFIG_BOARD_SIZE_LIMIT $$((384 * 1024))
Mike Frysinger8a9bab02008-10-12 21:41:06 -0400146
147/*
148 * Pull in common ADI header for remaining command/environment setup
149 */
150#include <configs/bfin_adi_common.h>
151
Mike Frysinger8a9bab02008-10-12 21:41:06 -0400152#endif