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gerrit.devboardsforandroid.linaro.org / platform / external / u-boot / a38a3c4af4ed72a2ed6192203f8fe17ccdd2389f / . / include / configs / socfpga_cyclone5.h
blob: 33d04fdc4a994a530775455836954b37d357a066 [file] [log] [blame]
Dinh Nguyen77754402012-10-04 06:46:02 +0000[diff] [blame]1/*
Pavel Machek5095ee02014-09-08 14:08:45 +0200[diff] [blame]2 * Copyright (C) 2014 Marek Vasut <marex@denx.de>
Dinh Nguyen77754402012-10-04 06:46:02 +0000[diff] [blame]3 *
Wolfgang Denk1a459662013-07-08 09:37:19 +0200[diff] [blame]4 * SPDX-License-Identifier: GPL-2.0+
Dinh Nguyen77754402012-10-04 06:46:02 +0000[diff] [blame]5 */
Pavel Machek5095ee02014-09-08 14:08:45 +0200[diff] [blame]6#ifndef __CONFIG_SOCFPGA_CYCLONE5_H__
7#define __CONFIG_SOCFPGA_CYCLONE5_H__
Dinh Nguyen77754402012-10-04 06:46:02 +0000[diff] [blame]8
9#include <asm/arch/socfpga_base_addrs.h>
Chin Liang See5d649d22013-09-11 11:24:48 -0500[diff] [blame]10#include "../../board/altera/socfpga/pinmux_config.h"
Chin Liang Seedc4d4aa2014-06-10 01:17:42 -0500[diff] [blame]11#include "../../board/altera/socfpga/iocsr_config.h"
Chin Liang Seeddfeb0a2014-03-04 22:13:53 -0600[diff] [blame]12#include "../../board/altera/socfpga/pll_config.h"
Dinh Nguyen77754402012-10-04 06:46:02 +0000[diff] [blame]13
Marek Vasut47f9b4e2014-09-08 14:08:45 +0200[diff] [blame]14/* U-Boot Commands */
15#define CONFIG_SYS_NO_FLASH
Marek Vasut47f9b4e2014-09-08 14:08:45 +0200[diff] [blame]16#define CONFIG_DOS_PARTITION
17#define CONFIG_FAT_WRITE
18#define CONFIG_HW_WATCHDOG
19
20#define CONFIG_CMD_ASKENV
21#define CONFIG_CMD_BOOTZ
22#define CONFIG_CMD_CACHE
Marek Vasute5e87172014-12-30 20:04:20 +0100[diff] [blame]23#define CONFIG_CMD_DFU
Marek Vasut47f9b4e2014-09-08 14:08:45 +0200[diff] [blame]24#define CONFIG_CMD_DHCP
25#define CONFIG_CMD_EXT4
26#define CONFIG_CMD_EXT4_WRITE
27#define CONFIG_CMD_FAT
Marek Vasut2f210632014-09-19 13:28:47 +0200[diff] [blame]28#define CONFIG_CMD_FS_GENERIC
Marek Vasut47f9b4e2014-09-08 14:08:45 +0200[diff] [blame]29#define CONFIG_CMD_GREPENV
30#define CONFIG_CMD_MII
31#define CONFIG_CMD_MMC
Marek Vasut47f9b4e2014-09-08 14:08:45 +0200[diff] [blame]32#define CONFIG_CMD_PING
Marek Vasute5e87172014-12-30 20:04:20 +0100[diff] [blame]33#define CONFIG_CMD_USB
34#define CONFIG_CMD_USB_MASS_STORAGE
Marek Vasut47f9b4e2014-09-08 14:08:45 +0200[diff] [blame]35
Marek Vasut47f9b4e2014-09-08 14:08:45 +0200[diff] [blame]36
Pavel Machek5095ee02014-09-08 14:08:45 +0200[diff] [blame]37/* Memory configurations */
Marek Vasut47f9b4e2014-09-08 14:08:45 +0200[diff] [blame]38#define PHYS_SDRAM_1_SIZE 0x40000000 /* 1GiB on SoCDK */
Dinh Nguyen77754402012-10-04 06:46:02 +0000[diff] [blame]39
Marek Vasut47f9b4e2014-09-08 14:08:45 +0200[diff] [blame]40/* Booting Linux */
41#define CONFIG_BOOTDELAY 3
42#define CONFIG_BOOTFILE "zImage"
Anatolij Gustschin116f5d52014-11-07 01:12:03 +0100[diff] [blame]43#define CONFIG_BOOTARGS "console=ttyS0," __stringify(CONFIG_BAUDRATE)
Chin Liang See97ce2742014-09-19 05:33:19 -0500[diff] [blame]44#ifdef CONFIG_SOCFPGA_VIRTUAL_TARGET
Marek Vasut47f9b4e2014-09-08 14:08:45 +0200[diff] [blame]45#define CONFIG_BOOTCOMMAND "run ramboot"
Chin Liang See97ce2742014-09-19 05:33:19 -0500[diff] [blame]46#else
Marek Vasut47f9b4e2014-09-08 14:08:45 +0200[diff] [blame]47#define CONFIG_BOOTCOMMAND "run mmcload; run mmcboot"
48#endif
49#define CONFIG_LOADADDR 0x8000
50#define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
51
Pavel Machek5095ee02014-09-08 14:08:45 +0200[diff] [blame]52/* Ethernet on SoC (EMAC) */
53#if defined(CONFIG_CMD_NET)
Marek Vasut5a1d0ad2014-10-10 01:50:23 +0200[diff] [blame]54#define CONFIG_EMAC_BASE SOCFPGA_EMAC1_ADDRESS
Marek Vasut47f9b4e2014-09-08 14:08:45 +0200[diff] [blame]55#define CONFIG_PHY_INTERFACE_MODE PHY_INTERFACE_MODE_RGMII
Marek Vasut47f9b4e2014-09-08 14:08:45 +0200[diff] [blame]56
57/* PHY */
Marek Vasut47f9b4e2014-09-08 14:08:45 +0200[diff] [blame]58#define CONFIG_PHY_MICREL
59#define CONFIG_PHY_MICREL_KSZ9021
60#define CONFIG_KSZ9021_CLK_SKEW_ENV "micrel-ksz9021-clk-skew"
61#define CONFIG_KSZ9021_CLK_SKEW_VAL 0xf0f0
62#define CONFIG_KSZ9021_DATA_SKEW_ENV "micrel-ksz9021-data-skew"
63#define CONFIG_KSZ9021_DATA_SKEW_VAL 0x0
64
Chin Liang See97ce2742014-09-19 05:33:19 -0500[diff] [blame]65#endif
Dinh Nguyen77754402012-10-04 06:46:02 +0000[diff] [blame]66
Marek Vasute5e87172014-12-30 20:04:20 +0100[diff] [blame]67/* USB */
68#ifdef CONFIG_CMD_USB
69#define CONFIG_USB_DWC2_REG_ADDR SOCFPGA_USB1_ADDRESS
70#endif
71#define CONFIG_G_DNL_MANUFACTURER "Altera"
72
Pavel Machek5095ee02014-09-08 14:08:45 +0200[diff] [blame]73/* Extra Environment */
74#define CONFIG_HOSTNAME socfpga_cyclone5
Dinh Nguyen77754402012-10-04 06:46:02 +0000[diff] [blame]75
76#define CONFIG_EXTRA_ENV_SETTINGS \
77 "verify=n\0" \
Marek Vasut5368c552012-09-23 17:41:24 +0200[diff] [blame]78 "loadaddr= " __stringify(CONFIG_SYS_LOAD_ADDR) "\0" \
Dinh Nguyen77754402012-10-04 06:46:02 +0000[diff] [blame]79 "ramboot=setenv bootargs " CONFIG_BOOTARGS ";" \
80 "bootm ${loadaddr} - ${fdt_addr}\0" \
Chin Liang See97ce2742014-09-19 05:33:19 -0500[diff] [blame]81 "bootimage=zImage\0" \
Dinh Nguyen77754402012-10-04 06:46:02 +0000[diff] [blame]82 "fdt_addr=100\0" \
Chin Liang See97ce2742014-09-19 05:33:19 -0500[diff] [blame]83 "fdtimage=socfpga.dtb\0" \
84 "fsloadcmd=ext2load\0" \
85 "bootm ${loadaddr} - ${fdt_addr}\0" \
86 "mmcroot=/dev/mmcblk0p2\0" \
87 "mmcboot=setenv bootargs " CONFIG_BOOTARGS \
88 " root=${mmcroot} rw rootwait;" \
89 "bootz ${loadaddr} - ${fdt_addr}\0" \
90 "mmcload=mmc rescan;" \
Marek Vasut2f210632014-09-19 13:28:47 +0200[diff] [blame]91 "load mmc 0:1 ${loadaddr} ${bootimage};" \
92 "load mmc 0:1 ${fdt_addr} ${fdtimage}\0" \
Dinh Nguyen77754402012-10-04 06:46:02 +0000[diff] [blame]93 "qspiroot=/dev/mtdblock0\0" \
94 "qspirootfstype=jffs2\0" \
95 "qspiboot=setenv bootargs " CONFIG_BOOTARGS \
96 " root=${qspiroot} rw rootfstype=${qspirootfstype};"\
97 "bootm ${loadaddr} - ${fdt_addr}\0"
98
Pavel Machek5095ee02014-09-08 14:08:45 +0200[diff] [blame]99/* The rest of the configuration is shared */
100#include <configs/socfpga_common.h>
Dinh Nguyen77754402012-10-04 06:46:02 +0000[diff] [blame]101
Pavel Machek5095ee02014-09-08 14:08:45 +0200[diff] [blame]102#endif /* __CONFIG_SOCFPGA_CYCLONE5_H__ */