blob: 81846eba77d40d323cb33db6865b8cbcae0870da [file] [log] [blame]
roy zang87c4db02006-11-02 18:59:15 +08001/*
2 * (C) Copyright 2005 Freescale Semiconductor, Inc.
3 *
4 * Roy Zang <tie-fei.zang@freescale.com>
5 *
6 * See file CREDITS for list of people who contributed to this
7 * project.
8 *
9 * This program is free software; you can redistribute it and/or
10 * modify it under the terms of the GNU General Public License as
11 * published by the Free Software Foundation; either version 2 of
12 * the License, or (at your option) any later version.
13 *
14 * This program is distributed in the hope that it will be useful,
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 * GNU General Public License for more details.
18 *
19 * You should have received a copy of the GNU General Public License
20 * along with this program; if not, write to the Free Software
21 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
22 * MA 02111-1307 USA
23 *
24 * modifications for the Tsi108 Emul Board by avb@Tundra
25 */
26
27/*
roy zangee311212006-12-01 11:47:36 +080028 * board support/init functions for the
roy zang87c4db02006-11-02 18:59:15 +080029 * Freescale MPC7448 HPC2 (High-Performance Computing 2 Platform).
30 */
31
32#include <common.h>
33#include <74xx_7xx.h>
34#if defined(CONFIG_OF_FLAT_TREE)
35#include <ft_build.h>
roy zangee311212006-12-01 11:47:36 +080036extern void ft_cpu_setup (void *blob, bd_t *bd);
roy zang87c4db02006-11-02 18:59:15 +080037#endif
38
39#undef DEBUG
40
Wolfgang Denk1218abf2007-09-15 20:48:41 +020041DECLARE_GLOBAL_DATA_PTR;
42
roy zangee311212006-12-01 11:47:36 +080043extern void flush_data_cache (void);
44extern void invalidate_l1_instruction_cache (void);
45extern void tsi108_init_f (void);
roy zang87c4db02006-11-02 18:59:15 +080046
roy zangee311212006-12-01 11:47:36 +080047int display_mem_map (void);
roy zang87c4db02006-11-02 18:59:15 +080048
roy zangee311212006-12-01 11:47:36 +080049void after_reloc (ulong dest_addr)
roy zang87c4db02006-11-02 18:59:15 +080050{
roy zang87c4db02006-11-02 18:59:15 +080051 /*
52 * Jump to the main U-Boot board init code
53 */
roy zangee311212006-12-01 11:47:36 +080054 board_init_r ((gd_t *) gd, dest_addr);
roy zang87c4db02006-11-02 18:59:15 +080055 /* NOTREACHED */
56}
57
58/*
59 * Check Board Identity:
roy zang87c4db02006-11-02 18:59:15 +080060 * report board type
61 */
62
roy zangee311212006-12-01 11:47:36 +080063int checkboard (void)
roy zang87c4db02006-11-02 18:59:15 +080064{
65 int l_type = 0;
66
roy zangee311212006-12-01 11:47:36 +080067 printf ("BOARD: %s\n", CFG_BOARD_NAME);
roy zang87c4db02006-11-02 18:59:15 +080068 return (l_type);
69}
70
71/*
72 * Read Processor ID:
73 *
74 * report calling processor number
75 */
76
roy zangee311212006-12-01 11:47:36 +080077int read_pid (void)
roy zang87c4db02006-11-02 18:59:15 +080078{
79 return 0; /* we are on single CPU platform for a while */
80}
81
roy zangee311212006-12-01 11:47:36 +080082long int dram_size (int board_type)
roy zang87c4db02006-11-02 18:59:15 +080083{
84 return 0x20000000; /* 256M bytes */
85}
86
roy zangee311212006-12-01 11:47:36 +080087long int initdram (int board_type)
roy zang87c4db02006-11-02 18:59:15 +080088{
roy zangee311212006-12-01 11:47:36 +080089 return dram_size (board_type);
roy zang87c4db02006-11-02 18:59:15 +080090}
91
roy zang87c4db02006-11-02 18:59:15 +080092#if defined(CONFIG_OF_FLAT_TREE) && defined(CONFIG_OF_BOARD_SETUP)
93void
roy zangee311212006-12-01 11:47:36 +080094ft_board_setup (void *blob, bd_t *bd)
roy zang87c4db02006-11-02 18:59:15 +080095{
96 u32 *p;
97 int len;
98
roy zangee311212006-12-01 11:47:36 +080099 ft_cpu_setup (blob, bd);
roy zang87c4db02006-11-02 18:59:15 +0800100
roy zangee311212006-12-01 11:47:36 +0800101 p = ft_get_prop (blob, "/memory/reg", &len);
roy zang87c4db02006-11-02 18:59:15 +0800102 if (p != NULL) {
roy zangee311212006-12-01 11:47:36 +0800103 *p++ = cpu_to_be32 (bd->bi_memstart);
104 *p = cpu_to_be32 (bd->bi_memsize);
roy zang87c4db02006-11-02 18:59:15 +0800105 }
106}
107#endif