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wdenkaffae2b2002-08-17 09:36:01 +00001/*
2 * (C) Copyright 2000
3 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
4 *
Wolfgang Denk1a459662013-07-08 09:37:19 +02005 * SPDX-License-Identifier: GPL-2.0+
wdenkaffae2b2002-08-17 09:36:01 +00006 */
7
8#include <common.h>
9#include <mpc8xx.h>
10
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +020011flash_info_t flash_info[CONFIG_SYS_MAX_FLASH_BANKS]; /* info for FLASH chips */
wdenkaffae2b2002-08-17 09:36:01 +000012
Jean-Christophe PLAGNIOL-VILLARD5a1aceb2008-09-10 22:48:04 +020013#if defined(CONFIG_ENV_IS_IN_FLASH)
Jean-Christophe PLAGNIOL-VILLARD0e8d1582008-09-10 22:48:06 +020014# ifndef CONFIG_ENV_ADDR
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +020015# define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE + CONFIG_ENV_OFFSET)
wdenkaffae2b2002-08-17 09:36:01 +000016# endif
Jean-Christophe PLAGNIOL-VILLARD0e8d1582008-09-10 22:48:06 +020017# ifndef CONFIG_ENV_SIZE
18# define CONFIG_ENV_SIZE CONFIG_ENV_SECT_SIZE
wdenkaffae2b2002-08-17 09:36:01 +000019# endif
Jean-Christophe PLAGNIOL-VILLARD0e8d1582008-09-10 22:48:06 +020020# ifndef CONFIG_ENV_SECT_SIZE
21# define CONFIG_ENV_SECT_SIZE CONFIG_ENV_SIZE
wdenkaffae2b2002-08-17 09:36:01 +000022# endif
23#endif
24
wdenk99edcfb2004-06-09 21:54:22 +000025#define QUAD_ID(id) ((((ulong)(id) & 0xFF) << 24) | \
26 (((ulong)(id) & 0xFF) << 16) | \
27 (((ulong)(id) & 0xFF) << 8) | \
28 (((ulong)(id) & 0xFF) << 0) \
29 )
30
wdenkaffae2b2002-08-17 09:36:01 +000031/*-----------------------------------------------------------------------
32 * Functions
33 */
wdenkbf9e3b32004-02-12 00:47:09 +000034static ulong flash_get_size (vu_long * addr, flash_info_t * info);
35static int write_word (flash_info_t * info, ulong dest, ulong data);
wdenkaffae2b2002-08-17 09:36:01 +000036
37/*-----------------------------------------------------------------------
38 */
wdenkaffae2b2002-08-17 09:36:01 +000039unsigned long flash_init (void)
40{
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +020041 volatile immap_t *immap = (immap_t *) CONFIG_SYS_IMMR;
wdenkaffae2b2002-08-17 09:36:01 +000042 volatile memctl8xx_t *memctl = &immap->im_memctl;
wdenk99edcfb2004-06-09 21:54:22 +000043 vu_long *bcsr = (vu_long *)BCSR_ADDR;
44 unsigned long pd_size, total_size, bsize, or_am;
wdenkaffae2b2002-08-17 09:36:01 +000045 int i;
46
47 /* Init: no FLASHes known */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +020048 for (i = 0; i < CONFIG_SYS_MAX_FLASH_BANKS; ++i) {
wdenkaffae2b2002-08-17 09:36:01 +000049 flash_info[i].flash_id = FLASH_UNKNOWN;
wdenk99edcfb2004-06-09 21:54:22 +000050 flash_info[i].size = 0;
51 flash_info[i].sector_count = 0;
52 flash_info[i].start[0] = 0xFFFFFFFF; /* For TFTP */
53 }
54
55 switch ((bcsr[2] & BCSR2_FLASH_PD_MASK) >> BCSR2_FLASH_PD_SHIFT) {
56 case 2:
57 case 4:
58 case 6:
59 pd_size = 0x800000;
60 or_am = 0xFF800000;
61 break;
62
63 case 5:
64 case 7:
65 pd_size = 0x400000;
66 or_am = 0xFFC00000;
67 break;
68
69 case 8:
70 pd_size = 0x200000;
71 or_am = 0xFFE00000;
72 break;
73
74 default:
75 pd_size = 0;
76 or_am = 0xFFE00000;
Wolfgang Denk9b55a252008-07-11 01:16:00 +020077 printf("## Unsupported flash detected by BCSR: 0x%08lX\n", bcsr[2]);
wdenkaffae2b2002-08-17 09:36:01 +000078 }
79
80 total_size = 0;
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +020081 for (i = 0; i < CONFIG_SYS_MAX_FLASH_BANKS && total_size < pd_size; ++i) {
82 bsize = flash_get_size((vu_long *)(CONFIG_SYS_FLASH_BASE + total_size),
wdenk99edcfb2004-06-09 21:54:22 +000083 &flash_info[i]);
wdenkaffae2b2002-08-17 09:36:01 +000084
wdenkbf9e3b32004-02-12 00:47:09 +000085 if (flash_info[i].flash_id == FLASH_UNKNOWN) {
wdenk99edcfb2004-06-09 21:54:22 +000086 printf ("## Unknown FLASH on Bank %d - Size = 0x%08lx = %ld MB\n",
87 i, bsize, bsize >> 20);
wdenkaffae2b2002-08-17 09:36:01 +000088 }
89
wdenk99edcfb2004-06-09 21:54:22 +000090 total_size += bsize;
wdenkaffae2b2002-08-17 09:36:01 +000091 }
92
wdenk99edcfb2004-06-09 21:54:22 +000093 if (total_size != pd_size) {
94 printf("## Detected flash size %lu conflicts with PD data %lu\n",
95 total_size, pd_size);
wdenkaffae2b2002-08-17 09:36:01 +000096 }
97
98 /* Remap FLASH according to real size */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +020099 memctl->memc_or0 = or_am | CONFIG_SYS_OR_TIMING_FLASH;
wdenkaffae2b2002-08-17 09:36:01 +0000100
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200101 for (i = 0; i < CONFIG_SYS_MAX_FLASH_BANKS && flash_info[i].size != 0; ++i) {
102#if CONFIG_SYS_MONITOR_BASE >= CONFIG_SYS_FLASH_BASE
wdenkaffae2b2002-08-17 09:36:01 +0000103 /* monitor protection ON by default */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200104 if (CONFIG_SYS_MONITOR_BASE >= flash_info[i].start[0])
wdenk99edcfb2004-06-09 21:54:22 +0000105 flash_protect (FLAG_PROTECT_SET,
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200106 CONFIG_SYS_MONITOR_BASE,
107 CONFIG_SYS_MONITOR_BASE + monitor_flash_len - 1,
wdenk99edcfb2004-06-09 21:54:22 +0000108 &flash_info[i]);
wdenkaffae2b2002-08-17 09:36:01 +0000109#endif
110
Jean-Christophe PLAGNIOL-VILLARD5a1aceb2008-09-10 22:48:04 +0200111#ifdef CONFIG_ENV_IS_IN_FLASH
wdenkaffae2b2002-08-17 09:36:01 +0000112 /* ENV protection ON by default */
Jean-Christophe PLAGNIOL-VILLARD0e8d1582008-09-10 22:48:06 +0200113 if (CONFIG_ENV_ADDR >= flash_info[i].start[0])
wdenk99edcfb2004-06-09 21:54:22 +0000114 flash_protect (FLAG_PROTECT_SET,
Jean-Christophe PLAGNIOL-VILLARD0e8d1582008-09-10 22:48:06 +0200115 CONFIG_ENV_ADDR,
116 CONFIG_ENV_ADDR + CONFIG_ENV_SIZE - 1,
wdenk99edcfb2004-06-09 21:54:22 +0000117 &flash_info[i]);
wdenkaffae2b2002-08-17 09:36:01 +0000118#endif
wdenkaffae2b2002-08-17 09:36:01 +0000119 }
120
wdenk99edcfb2004-06-09 21:54:22 +0000121 return total_size;
wdenkaffae2b2002-08-17 09:36:01 +0000122}
123
124/*-----------------------------------------------------------------------
125 */
wdenkbf9e3b32004-02-12 00:47:09 +0000126void flash_print_info (flash_info_t * info)
wdenkaffae2b2002-08-17 09:36:01 +0000127{
128 int i;
129
wdenkbf9e3b32004-02-12 00:47:09 +0000130 if (info->flash_id == FLASH_UNKNOWN) {
wdenkaffae2b2002-08-17 09:36:01 +0000131 printf ("missing or unknown FLASH type\n");
132 return;
133 }
134
wdenkbf9e3b32004-02-12 00:47:09 +0000135 switch (info->flash_id & FLASH_VENDMASK) {
136 case FLASH_MAN_AMD:
137 printf ("AMD ");
138 break;
139 case FLASH_MAN_FUJ:
140 printf ("FUJITSU ");
141 break;
142 case FLASH_MAN_BM:
143 printf ("BRIGHT MICRO ");
144 break;
145 default:
146 printf ("Unknown Vendor ");
147 break;
wdenkaffae2b2002-08-17 09:36:01 +0000148 }
149
wdenkbf9e3b32004-02-12 00:47:09 +0000150 switch (info->flash_id & FLASH_TYPEMASK) {
151 case FLASH_AM040:
152 printf ("29F040 or 29LV040 (4 Mbit, uniform sectors)\n");
153 break;
154 case FLASH_AM080:
155 printf ("29F080 or 29LV080 (8 Mbit, uniform sectors)\n");
156 break;
157 case FLASH_AM400B:
158 printf ("AM29LV400B (4 Mbit, bottom boot sect)\n");
159 break;
160 case FLASH_AM400T:
161 printf ("AM29LV400T (4 Mbit, top boot sector)\n");
162 break;
163 case FLASH_AM800B:
164 printf ("AM29LV800B (8 Mbit, bottom boot sect)\n");
165 break;
166 case FLASH_AM800T:
167 printf ("AM29LV800T (8 Mbit, top boot sector)\n");
168 break;
169 case FLASH_AM160B:
170 printf ("AM29LV160B (16 Mbit, bottom boot sect)\n");
171 break;
172 case FLASH_AM160T:
173 printf ("AM29LV160T (16 Mbit, top boot sector)\n");
174 break;
175 case FLASH_AM320B:
176 printf ("AM29LV320B (32 Mbit, bottom boot sect)\n");
177 break;
178 case FLASH_AM320T:
179 printf ("AM29LV320T (32 Mbit, top boot sector)\n");
180 break;
181 default:
182 printf ("Unknown Chip Type\n");
183 break;
wdenkaffae2b2002-08-17 09:36:01 +0000184 }
185
wdenkbf9e3b32004-02-12 00:47:09 +0000186 printf (" Size: %ld MB in %d Sectors\n", info->size >> 20,
187 info->sector_count);
wdenkaffae2b2002-08-17 09:36:01 +0000188
189 printf (" Sector Start Addresses:");
190
wdenkbf9e3b32004-02-12 00:47:09 +0000191 for (i = 0; i < info->sector_count; ++i) {
192 if ((i % 5) == 0) {
wdenkaffae2b2002-08-17 09:36:01 +0000193 printf ("\n ");
194 }
195
196 printf (" %08lX%s",
wdenkbf9e3b32004-02-12 00:47:09 +0000197 info->start[i], info->protect[i] ? " (RO)" : " ");
wdenkaffae2b2002-08-17 09:36:01 +0000198 }
199
200 printf ("\n");
wdenkaffae2b2002-08-17 09:36:01 +0000201}
202
203/*-----------------------------------------------------------------------
wdenk99edcfb2004-06-09 21:54:22 +0000204 * The following code can not run from flash!
wdenkaffae2b2002-08-17 09:36:01 +0000205 */
wdenkbf9e3b32004-02-12 00:47:09 +0000206static ulong flash_get_size (vu_long * addr, flash_info_t * info)
wdenkaffae2b2002-08-17 09:36:01 +0000207{
208 short i;
wdenkbf9e3b32004-02-12 00:47:09 +0000209
wdenkaffae2b2002-08-17 09:36:01 +0000210 /* Write auto select command: read Manufacturer ID */
wdenkaffae2b2002-08-17 09:36:01 +0000211 addr[0x0555] = 0xAAAAAAAA;
212 addr[0x02AA] = 0x55555555;
213 addr[0x0555] = 0x90909090;
wdenkaffae2b2002-08-17 09:36:01 +0000214
wdenk99edcfb2004-06-09 21:54:22 +0000215 switch (addr[0]) {
216 case QUAD_ID(AMD_MANUFACT):
wdenkbf9e3b32004-02-12 00:47:09 +0000217 info->flash_id = FLASH_MAN_AMD;
218 break;
wdenkaffae2b2002-08-17 09:36:01 +0000219
wdenk99edcfb2004-06-09 21:54:22 +0000220 case QUAD_ID(FUJ_MANUFACT):
wdenkbf9e3b32004-02-12 00:47:09 +0000221 info->flash_id = FLASH_MAN_FUJ;
222 break;
wdenkaffae2b2002-08-17 09:36:01 +0000223
wdenkbf9e3b32004-02-12 00:47:09 +0000224 default:
225 info->flash_id = FLASH_UNKNOWN;
226 info->sector_count = 0;
227 info->size = 0;
228 break;
wdenkaffae2b2002-08-17 09:36:01 +0000229 }
230
wdenk99edcfb2004-06-09 21:54:22 +0000231 switch (addr[1]) { /* device ID */
232 case QUAD_ID(AMD_ID_F040B):
233 case QUAD_ID(AMD_ID_LV040B):
wdenkbf9e3b32004-02-12 00:47:09 +0000234 info->flash_id += FLASH_AM040;
235 info->sector_count = 8;
236 info->size = 0x00200000;
237 break; /* => 2 MB */
wdenkaffae2b2002-08-17 09:36:01 +0000238
wdenk99edcfb2004-06-09 21:54:22 +0000239 case QUAD_ID(AMD_ID_F080B):
wdenkbf9e3b32004-02-12 00:47:09 +0000240 info->flash_id += FLASH_AM080;
241 info->sector_count = 16;
242 info->size = 0x00400000;
243 break; /* => 4 MB */
wdenk99edcfb2004-06-09 21:54:22 +0000244#if 0
wdenkbf9e3b32004-02-12 00:47:09 +0000245 case AMD_ID_LV400T:
246 info->flash_id += FLASH_AM400T;
247 info->sector_count = 11;
248 info->size = 0x00100000;
249 break; /* => 1 MB */
wdenkaffae2b2002-08-17 09:36:01 +0000250
wdenkbf9e3b32004-02-12 00:47:09 +0000251 case AMD_ID_LV400B:
252 info->flash_id += FLASH_AM400B;
253 info->sector_count = 11;
254 info->size = 0x00100000;
255 break; /* => 1 MB */
wdenkaffae2b2002-08-17 09:36:01 +0000256
wdenkbf9e3b32004-02-12 00:47:09 +0000257 case AMD_ID_LV800T:
258 info->flash_id += FLASH_AM800T;
259 info->sector_count = 19;
260 info->size = 0x00200000;
261 break; /* => 2 MB */
wdenkaffae2b2002-08-17 09:36:01 +0000262
wdenkbf9e3b32004-02-12 00:47:09 +0000263 case AMD_ID_LV800B:
264 info->flash_id += FLASH_AM800B;
265 info->sector_count = 19;
266 info->size = 0x00200000;
267 break; /* => 2 MB */
wdenkaffae2b2002-08-17 09:36:01 +0000268
wdenkbf9e3b32004-02-12 00:47:09 +0000269 case AMD_ID_LV160T:
270 info->flash_id += FLASH_AM160T;
271 info->sector_count = 35;
272 info->size = 0x00400000;
273 break; /* => 4 MB */
wdenkaffae2b2002-08-17 09:36:01 +0000274
wdenkbf9e3b32004-02-12 00:47:09 +0000275 case AMD_ID_LV160B:
276 info->flash_id += FLASH_AM160B;
277 info->sector_count = 35;
278 info->size = 0x00400000;
279 break; /* => 4 MB */
wdenk99edcfb2004-06-09 21:54:22 +0000280
wdenkbf9e3b32004-02-12 00:47:09 +0000281 case AMD_ID_LV320T:
282 info->flash_id += FLASH_AM320T;
283 info->sector_count = 67;
284 info->size = 0x00800000;
285 break; /* => 8 MB */
wdenkaffae2b2002-08-17 09:36:01 +0000286
wdenkbf9e3b32004-02-12 00:47:09 +0000287 case AMD_ID_LV320B:
288 info->flash_id += FLASH_AM320B;
289 info->sector_count = 67;
290 info->size = 0x00800000;
291 break; /* => 8 MB */
wdenk99edcfb2004-06-09 21:54:22 +0000292#endif /* 0 */
wdenkbf9e3b32004-02-12 00:47:09 +0000293 default:
294 info->flash_id = FLASH_UNKNOWN;
295 return (0); /* => no or unknown flash */
wdenkaffae2b2002-08-17 09:36:01 +0000296 }
297
298#if 0
299 /* set up sector start address table */
300 if (info->flash_id & FLASH_BTYPE) {
wdenkbf9e3b32004-02-12 00:47:09 +0000301 /* set sector offsets for bottom boot block type */
wdenkaffae2b2002-08-17 09:36:01 +0000302 info->start[0] = base + 0x00000000;
303 info->start[1] = base + 0x00008000;
304 info->start[2] = base + 0x0000C000;
305 info->start[3] = base + 0x00010000;
306 for (i = 4; i < info->sector_count; i++) {
307 info->start[i] = base + (i * 0x00020000) - 0x00060000;
308 }
309 } else {
wdenkbf9e3b32004-02-12 00:47:09 +0000310 /* set sector offsets for top boot block type */
wdenkaffae2b2002-08-17 09:36:01 +0000311 i = info->sector_count - 1;
312 info->start[i--] = base + info->size - 0x00008000;
313 info->start[i--] = base + info->size - 0x0000C000;
314 info->start[i--] = base + info->size - 0x00010000;
315 for (; i >= 0; i--) {
316 info->start[i] = base + i * 0x00020000;
317 }
318 }
319#else
wdenk99edcfb2004-06-09 21:54:22 +0000320 /* set sector offsets for uniform sector type */
321 for (i = 0; i < info->sector_count; i++)
322 info->start[i] = (ulong)addr + (i * 0x00040000);
wdenkaffae2b2002-08-17 09:36:01 +0000323#endif
324
325 /* check for protected sectors */
wdenkbf9e3b32004-02-12 00:47:09 +0000326 for (i = 0; i < info->sector_count; i++) {
wdenkaffae2b2002-08-17 09:36:01 +0000327 /* read sector protection at sector address, (A7 .. A0) = 0x02 */
328 /* D0 = 1 if protected */
wdenkbf9e3b32004-02-12 00:47:09 +0000329 addr = (volatile unsigned long *) (info->start[i]);
wdenkaffae2b2002-08-17 09:36:01 +0000330 info->protect[i] = addr[2] & 1;
331 }
332
wdenkbf9e3b32004-02-12 00:47:09 +0000333 if (info->flash_id != FLASH_UNKNOWN) {
334 addr = (volatile unsigned long *) info->start[0];
wdenkaffae2b2002-08-17 09:36:01 +0000335 *addr = 0xF0F0F0F0; /* reset bank */
wdenkaffae2b2002-08-17 09:36:01 +0000336 }
337
338 return (info->size);
339}
340
wdenkaffae2b2002-08-17 09:36:01 +0000341/*-----------------------------------------------------------------------
342 */
wdenkbf9e3b32004-02-12 00:47:09 +0000343int flash_erase (flash_info_t * info, int s_first, int s_last)
wdenkaffae2b2002-08-17 09:36:01 +0000344{
wdenkbf9e3b32004-02-12 00:47:09 +0000345 vu_long *addr = (vu_long *) (info->start[0]);
wdenkaffae2b2002-08-17 09:36:01 +0000346 int flag, prot, sect, l_sect;
347 ulong start, now, last;
348
349 if ((s_first < 0) || (s_first > s_last)) {
350 if (info->flash_id == FLASH_UNKNOWN) {
351 printf ("- missing\n");
352 } else {
353 printf ("- no sectors to erase\n");
354 }
wdenk99edcfb2004-06-09 21:54:22 +0000355 return ERR_INVAL;
wdenkaffae2b2002-08-17 09:36:01 +0000356 }
357
358 if ((info->flash_id == FLASH_UNKNOWN) ||
359 (info->flash_id > FLASH_AMD_COMP)) {
360 printf ("Can't erase unknown flash type - aborted\n");
wdenk99edcfb2004-06-09 21:54:22 +0000361 return ERR_UNKNOWN_FLASH_TYPE;
wdenkaffae2b2002-08-17 09:36:01 +0000362 }
363
364 prot = 0;
wdenkbf9e3b32004-02-12 00:47:09 +0000365 for (sect = s_first; sect <= s_last; ++sect) {
wdenkaffae2b2002-08-17 09:36:01 +0000366 if (info->protect[sect]) {
367 prot++;
368 }
369 }
370
371 if (prot) {
wdenkbf9e3b32004-02-12 00:47:09 +0000372 printf ("- Warning: %d protected sectors will not be erased!\n", prot);
wdenkaffae2b2002-08-17 09:36:01 +0000373 } else {
374 printf ("\n");
375 }
376
377 l_sect = -1;
378
379 /* Disable interrupts which might cause a timeout here */
wdenkbf9e3b32004-02-12 00:47:09 +0000380 flag = disable_interrupts ();
wdenkaffae2b2002-08-17 09:36:01 +0000381
wdenkaffae2b2002-08-17 09:36:01 +0000382 addr[0x0555] = 0xAAAAAAAA;
383 addr[0x02AA] = 0x55555555;
384 addr[0x0555] = 0x80808080;
385 addr[0x0555] = 0xAAAAAAAA;
386 addr[0x02AA] = 0x55555555;
wdenkaffae2b2002-08-17 09:36:01 +0000387
388 /* Start erase on unprotected sectors */
wdenkbf9e3b32004-02-12 00:47:09 +0000389 for (sect = s_first; sect <= s_last; sect++) {
wdenkaffae2b2002-08-17 09:36:01 +0000390 if (info->protect[sect] == 0) { /* not protected */
wdenkbf9e3b32004-02-12 00:47:09 +0000391 addr = (vu_long *) (info->start[sect]);
wdenkaffae2b2002-08-17 09:36:01 +0000392 addr[0] = 0x30303030;
wdenkaffae2b2002-08-17 09:36:01 +0000393 l_sect = sect;
394 }
395 }
396
397 /* re-enable interrupts if necessary */
398 if (flag)
wdenkbf9e3b32004-02-12 00:47:09 +0000399 enable_interrupts ();
wdenkaffae2b2002-08-17 09:36:01 +0000400
401 /* wait at least 80us - let's wait 1 ms */
402 udelay (1000);
403
404 /*
405 * We wait for the last triggered sector
406 */
407 if (l_sect < 0)
408 goto DONE;
409
410 start = get_timer (0);
wdenkbf9e3b32004-02-12 00:47:09 +0000411 last = start;
412 addr = (vu_long *) (info->start[l_sect]);
wdenkaffae2b2002-08-17 09:36:01 +0000413 while ((addr[0] & 0xFFFFFFFF) != 0xFFFFFFFF)
wdenkaffae2b2002-08-17 09:36:01 +0000414 {
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200415 if ((now = get_timer (start)) > CONFIG_SYS_FLASH_ERASE_TOUT) {
wdenkaffae2b2002-08-17 09:36:01 +0000416 printf ("Timeout\n");
wdenk99edcfb2004-06-09 21:54:22 +0000417 return ERR_TIMOUT;
wdenkaffae2b2002-08-17 09:36:01 +0000418 }
419 /* show that we're waiting */
420 if ((now - last) > 1000) { /* every second */
421 putc ('.');
422 last = now;
423 }
424 }
425
wdenkbf9e3b32004-02-12 00:47:09 +0000426 DONE:
wdenkaffae2b2002-08-17 09:36:01 +0000427 /* reset to read mode */
wdenkbf9e3b32004-02-12 00:47:09 +0000428 addr = (volatile unsigned long *) info->start[0];
wdenkaffae2b2002-08-17 09:36:01 +0000429 addr[0] = 0xF0F0F0F0; /* reset bank */
wdenkaffae2b2002-08-17 09:36:01 +0000430
431 printf (" done\n");
wdenk99edcfb2004-06-09 21:54:22 +0000432
wdenkaffae2b2002-08-17 09:36:01 +0000433 return 0;
434}
435
436/*-----------------------------------------------------------------------
437 * Copy memory to flash, returns:
438 * 0 - OK
439 * 1 - write timeout
440 * 2 - Flash not erased
441 */
wdenkbf9e3b32004-02-12 00:47:09 +0000442int write_buff (flash_info_t * info, uchar * src, ulong addr, ulong cnt)
wdenkaffae2b2002-08-17 09:36:01 +0000443{
444 ulong cp, wp, data;
445 int i, l, rc;
446
447 wp = (addr & ~3); /* get lower word aligned address */
448
449 /*
450 * handle unaligned start bytes
451 */
452 if ((l = addr - wp) != 0) {
453 data = 0;
wdenkbf9e3b32004-02-12 00:47:09 +0000454 for (i = 0, cp = wp; i < l; ++i, ++cp) {
455 data = (data << 8) | (*(uchar *) cp);
wdenkaffae2b2002-08-17 09:36:01 +0000456 }
wdenkbf9e3b32004-02-12 00:47:09 +0000457 for (; i < 4 && cnt > 0; ++i) {
wdenkaffae2b2002-08-17 09:36:01 +0000458 data = (data << 8) | *src++;
459 --cnt;
460 ++cp;
461 }
wdenkbf9e3b32004-02-12 00:47:09 +0000462 for (; cnt == 0 && i < 4; ++i, ++cp) {
463 data = (data << 8) | (*(uchar *) cp);
wdenkaffae2b2002-08-17 09:36:01 +0000464 }
465
wdenkbf9e3b32004-02-12 00:47:09 +0000466 if ((rc = write_word (info, wp, data)) != 0) {
wdenkaffae2b2002-08-17 09:36:01 +0000467 return (rc);
468 }
469 wp += 4;
470 }
471
472 /*
473 * handle word aligned part
474 */
475 while (cnt >= 4) {
476 data = 0;
wdenkbf9e3b32004-02-12 00:47:09 +0000477 for (i = 0; i < 4; ++i) {
wdenkaffae2b2002-08-17 09:36:01 +0000478 data = (data << 8) | *src++;
479 }
wdenkbf9e3b32004-02-12 00:47:09 +0000480 if ((rc = write_word (info, wp, data)) != 0) {
wdenkaffae2b2002-08-17 09:36:01 +0000481 return (rc);
482 }
wdenkbf9e3b32004-02-12 00:47:09 +0000483 wp += 4;
wdenkaffae2b2002-08-17 09:36:01 +0000484 cnt -= 4;
485 }
486
487 if (cnt == 0) {
488 return (0);
489 }
490
491 /*
492 * handle unaligned tail bytes
493 */
494 data = 0;
wdenkbf9e3b32004-02-12 00:47:09 +0000495 for (i = 0, cp = wp; i < 4 && cnt > 0; ++i, ++cp) {
wdenkaffae2b2002-08-17 09:36:01 +0000496 data = (data << 8) | *src++;
497 --cnt;
498 }
wdenkbf9e3b32004-02-12 00:47:09 +0000499 for (; i < 4; ++i, ++cp) {
500 data = (data << 8) | (*(uchar *) cp);
wdenkaffae2b2002-08-17 09:36:01 +0000501 }
502
wdenkbf9e3b32004-02-12 00:47:09 +0000503 return (write_word (info, wp, data));
wdenkaffae2b2002-08-17 09:36:01 +0000504}
505
506/*-----------------------------------------------------------------------
507 * Write a word to Flash, returns:
508 * 0 - OK
509 * 1 - write timeout
510 * 2 - Flash not erased
511 */
wdenkbf9e3b32004-02-12 00:47:09 +0000512static int write_word (flash_info_t * info, ulong dest, ulong data)
wdenkaffae2b2002-08-17 09:36:01 +0000513{
wdenkbf9e3b32004-02-12 00:47:09 +0000514 vu_long *addr = (vu_long *) (info->start[0]);
wdenkaffae2b2002-08-17 09:36:01 +0000515 ulong start;
516 int flag;
517
518 /* Check if Flash is (sufficiently) erased */
wdenkbf9e3b32004-02-12 00:47:09 +0000519 if ((*((vu_long *) dest) & data) != data) {
wdenk99edcfb2004-06-09 21:54:22 +0000520 return ERR_NOT_ERASED;
wdenkaffae2b2002-08-17 09:36:01 +0000521 }
522 /* Disable interrupts which might cause a timeout here */
wdenkbf9e3b32004-02-12 00:47:09 +0000523 flag = disable_interrupts ();
wdenkaffae2b2002-08-17 09:36:01 +0000524
wdenkaffae2b2002-08-17 09:36:01 +0000525 addr[0x0555] = 0xAAAAAAAA;
526 addr[0x02AA] = 0x55555555;
527 addr[0x0555] = 0xA0A0A0A0;
wdenkaffae2b2002-08-17 09:36:01 +0000528
wdenkbf9e3b32004-02-12 00:47:09 +0000529 *((vu_long *) dest) = data;
wdenkaffae2b2002-08-17 09:36:01 +0000530
531 /* re-enable interrupts if necessary */
532 if (flag)
wdenkbf9e3b32004-02-12 00:47:09 +0000533 enable_interrupts ();
wdenkaffae2b2002-08-17 09:36:01 +0000534
535 /* data polling for D7 */
536 start = get_timer (0);
wdenkbf9e3b32004-02-12 00:47:09 +0000537 while ((*((vu_long *) dest) & 0x80808080) != (data & 0x80808080))
wdenkaffae2b2002-08-17 09:36:01 +0000538 {
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200539 if (get_timer (start) > CONFIG_SYS_FLASH_WRITE_TOUT) {
wdenk99edcfb2004-06-09 21:54:22 +0000540 return ERR_TIMOUT;
wdenkaffae2b2002-08-17 09:36:01 +0000541 }
542 }
543 return (0);
544}