| Angelo Dureghello | b5867b1 | 2019-03-13 21:46:41 +0100 | [diff] [blame] | 1 | Freescale ColdFire DSPI controller |
| 2 | |
| 3 | Required properties: |
| 4 | - compatible : "fsl,mcf-dspi" |
| 5 | - #address-cells: <1>, as required by generic SPI binding |
| 6 | - #size-cells: <0>, also as required by generic SPI binding |
| 7 | - reg : offset and length of the register set for the device |
| 8 | |
| 9 | Optional properties: |
| 10 | - spi-max-frequency : max supported spi frequency |
| 11 | - num-cs : the number of the chipselect signals |
| 12 | - spi-mode: spi motorola mode, 0 to 3 |
| 13 | - ctar-params: CTAR0 to 7 register configuration, as an array |
| 14 | of 8 integer fields for each register, where each register |
| 15 | is defined as: <fmsz, pcssck, pasc, pdt, cssck, asc, dt, br>. |
| 16 | |
| 17 | Example: |
| 18 | |
| 19 | dspi0: dspi@fc05c000 { |
| 20 | compatible = "fsl,mcf-dspi"; |
| 21 | #address-cells = <1>; |
| 22 | #size-cells = <0>; |
| 23 | reg = <0xfc05c000 0x100>; |
| 24 | spi-max-frequency = <50000000>; |
| 25 | num-cs = <4>; |
| 26 | spi-mode = <0>; |
| 27 | ctar-fields = <7, 0, 0, 0, 0, 0, 1, 6>, |
| 28 | <7, 0, 0, 0, 0, 0, 1, 6>, |
| 29 | <7, 0, 0, 0, 0, 0, 1, 6>; |
| 30 | }; |